Si5476DU Datasheet

New Product
Si5476DU
Vishay Siliconix
N-Channel 60-V (D-S) MOSFET
FEATURES
PRODUCT SUMMARY
VDS (V)
ID (A)a
RDS(on) (Ω)
60
0.034 at VGS = 10 V
12
0.041 at VGS = 4.5 V
12
Qg (Typ.)
10.5 nC
PowerPAK ChipFET Single
1
2
3
D
D
Lot Traceability
and Date Code
4
G
D
7
XXX
D
D
8
AA
Part # Code
S
6
RoHS
COMPLIANT
APPLICATIONS
Marking Code
D
• Halogen-free
• TrenchFET® Power MOSFET
• New Thermally Enhanced PowerPAK®
ChipFET® Package
- Small Footprint Area
- Low On-Resistance
- Thin 0.8 mm Profile
S
5
D
• Load Switch for Portable Applications
• DC-DC Switch for Low Power Synchronous
Rectification
• Intermediate Switch Driver
G
for DC/DC Applications
Bottom View
S
Ordering Information: Si5476DU-T1-GE3 (Lead (Pb)-free and Halogen-free)
N-Channel MOSFET
ABSOLUTE MAXIMUM RATINGS TA = 25 °C, unless otherwise noted
Parameter
Symbol
Limit
Drain-Source Voltage
VDS
60
Gate-Source Voltage
VGS
± 20
TC = 25 °C
Continuous Drain Current (TJ = 150 °C)
TC = 70 °C
TA = 25 °C
Continuous Source-Drain Diode Current
12a
ID
7b, c
Avalanche Current
Single Pulse Avalanche Energy
5.6b, c
25
IDM
TC = 25 °C
TA = 25 °C
L = 0.1 mH
TC = 70 °C
TA = 25 °C
IAS
2.6b, c
15
EAS
11.2
mJ
31
20
PD
W
3.1b, c
TA = 70 °C
2b, c
- 55 to 150
TJ, Tstg
Operating Junction and Storage Temperature Range
A
12a
IS
TC = 25 °C
Maximum Power Dissipation
V
12a
TA = 70 °C
Pulsed Drain Current
Unit
Soldering Recommendations (Peak Temperature)d, e
°C
260
THERMAL RESISTANCE RATINGS
Parameter
Maximum Junction-to-Ambientb, f
Maximum Junction-to-Case (Drain)
Symbol
Typical
Maximum
t≤5s
RthJA
34
40
Steady State
RthJC
3
4
Unit
°C/W
Notes:
a. Package limited.
b. Surface Mounted on 1" x 1" FR4 board.
c. t = 5 s.
d. See Solder Profile (http://www.vishay.com/ppg?73257). The PowerPAK ChipFET is a leadless package. The end of the lead terminal is exposed
copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and
is not required to ensure adequate bottom side solder interconnection.
e. Rework Conditions: manual soldering with a soldering iron is not recommended for leadless components.
f. Maximum under Steady State conditions is 90 °C/W.
Document Number: 73663
S-81448-Rev. B, 23-Jun-08
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1
New Product
Si5476DU
Vishay Siliconix
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
Parameter
Symbol
Test Conditions
Min.
VDS
VGS = 0 V, ID = 1 mA
60
Typ.
Max.
Unit
Static
Drain-Source Breakdown Voltage
VDS Temperature Coefficient
ΔVDS/TJ
VGS(th) Temperature Coefficient
ΔVGS(th)/TJ
Gate-Source Threshold Voltage
ID = 250 µA
VGS(th)
VDS = VGS, ID = 250 µA
Gate-Source Leakage
IGSS
VDS = 0 V, VGS = ± 20 V
Zero Gate Voltage Drain Current
IDSS
On-State Drain Currenta
ID(on)
Drain-Source On-State Resistancea
Forward Transconductancea
RDS(on)
gfs
V
55
mV/°C
- 6.3
1
3
V
± 100
nA
VDS = 60 V, VGS = 0 V
1
VDS = 60 V, VGS = 0 V, TJ = 55 °C
10
VDS ≥ 5 V, VGS = 10 V
25
µA
A
VGS = 10 V, ID = 4.6 A
0.028
0.034
VGS = 4.5 V, ID = 4.2 A
0.033
0.041
VDS = 15 V, ID = 4.6 A
20
Ω
S
b
Dynamic
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
Total Gate Charge
Qg
Gate-Source Charge
Qgs
Gate-Drain Charge
Qgd
Gate Resistance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Rg
1100
VDS = 30 V, VGS = 0 V, f = 1 MHz
VDS = 30 V, VGS = 10 V, ID = 4.6 A
VDS = 30 V, VGS = 4.5 V, ID = 4.6 A
td(off)
21
32
10.5
16
3.5
f = 1 MHz
VDD = 30 V, RL = 5.4 Ω
ID ≅ 5.6 A, VGEN = 4.5 V, Rg = 1 Ω
Ω
3.3
20
30
150
225
20
30
tf
60
90
td(on)
10
15
15
25
22
40
10
15
tr
td(off)
nC
4.2
td(on)
tr
pF
90
55
VDD = 30 V, RL = 5.4 Ω
ID ≅ 5.6 A, VGEN = 10 V, Rg = 1 Ω
tf
ns
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
IS
Pulse Diode Forward Current
ISM
Body Diode Voltage
VSD
Body Diode Reverse Recovery Time
trr
Body Diode Reverse Recovery Charge
Qrr
Reverse Recovery Fall Time
ta
Reverse Recovery Rise Time
tb
TC = 25 °C
12
25
IS = 5.5 A, VGS = 0 V
IF = 5.5 A, dI/dt = 100 A/µs, TJ = 25 °C
A
0.85
1.2
V
25
50
ns
25
50
nC
19
6
ns
Notes:
a. Pulse test; pulse width ≤ 300 µs, duty cycle ≤ 2 %.
b. Guaranteed by design, not subject to production testing.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
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Document Number: 73663
S-81448-Rev. B, 23-Jun-08
New Product
Si5476DU
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
5
25
VGS = 10 thru 4 V
15
10
VGS = 3 V
5
0
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
3
TC = 125 °C
2
1
1.8
TC = 25 °C
0
0.0
2.0
0.5
1.0
1.5
2.0
2.5
VDS - Drain-to-Source Voltage (V)
VGS - Gate-to-Source Voltage (V)
Output Characteristics
Transfer Characteristics
3.0
3.5
1500
0.040
1200
0.036
VGS = 4.5 V
C - Capacitance (pF)
R DS(on) - On-Resistance (mΩ)
TC = - 55 °C
4
ID - Drain Current (A)
ID - Drain Current (A)
20
0.032
VGS = 10 V
0.028
Ciss
900
600
300
Coss
0.024
0
5
10
15
20
25
0
10
20
30
40
50
ID - Drain Current (A)
VDS - Drain-to-Source Voltage (V)
On-Resistance vs. Drain Current and Gate Voltage
Capacitance
60
2.0
10
ID = 4.6 A
1.8
8
R DS(on) - On-Resistance
(Normalized)
V GS - Gate-to-Source Voltage (V)
Crss
0
6
VDS = 30 V
VDS = 48 V
4
VGS = 10 V
ID = 4.6 A
1.6
1.4
1.2
1.0
2
0.8
0
0
5
Document Number: 73663
S-81448-Rev. B, 23-Jun-08
10
15
20
25
0.6
- 50
- 25
0
25
50
75
100
125
Qg - Total Gate Charge (nC)
TJ - Junction Temperature (°C)
Gate Charge
On-Resistance vs. Junction Temperature
150
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New Product
Si5476DU
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
30
0.08
10
TJ = 25 C
On-Resistance (Ω)
RDS(on) - Drain-to-Source
TJ = 150 C
I S - Source Current (A)
ID = 4.6 A
0.07
0.06
TA = 125 C
0.05
0.04
0.03
TA = 25 C
1
0.0
0.02
0.2
0.4
0.6
0.8
1.0
1.2
0
2
4
6
8
10
VSD - Source-to-Drain Voltage (V)
VGS - Gate-to-Source Voltage (V)
Source-Drain Diode Forward Voltage
On-Resistance vs. Gate-to-Source Voltage
2.6
50
2.4
2.0
Power (W)
VGS(th) (V)
40
ID = 250 µA
2.2
1.8
1.6
30
20
1.4
10
1.2
1.0
- 50
- 25
0
25
50
75
100
125
0
0.001
150
0.01
0.1
TJ - Temperature (°C)
1
10
100
1000
Time (s)
Threshold Voltage
Single Pulse Power, Junction-to-Ambient
100
BVDSS Limited
Limited by R DS(on)*
100 µs
ID - Drain Current (A)
10
1 ms
1
10 ms
100 ms
0.1
TA = 25 C
Single Pulse
0.01
0.1
* VGS
1s
10 s
DC
1
1 00
10
VDS - Drain-to-Source Voltage (V)
minimum VGS at which R DS(on) is specified
Safe Operating Area, Junction-to-Ambient
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Document Number: 73663
S-81448-Rev. B, 23-Jun-08
New Product
Si5476DU
Vishay Siliconix
24
35
20
30
Power Dissipation (W)
ID - Drain Current (A)
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
16
Package Limited
12
8
4
25
20
15
10
5
0
0
0
25
50
75
100
125
150
25
50
75
100
125
TC - Case Temperature (°C)
TC - Case Temperature (°C)
Current Derating*
Power Derating
150
* The power dissipation PD is based on TJ(max) = 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper
dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package
limit.
Document Number: 73663
S-81448-Rev. B, 23-Jun-08
www.vishay.com
5
New Product
Si5476DU
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
1
Normalized Effective Transient
Thermal Impedance
Duty Cycle = 0.5
0.2
Notes:
0.1
0.1
PDM
0.05
t1
t2
1. Duty Cycle, D =
t1
t2
2. Per Unit Base = RthJA = 75 C/W
0.02
3. TJM - T A = PDMZthJA(t)
Single Pulse
4. Surface Mounted
0.01
10-4
10-3
10-2
10-1
1
Square Wave Pulse Duration (s)
10
100
1000
Normalized Thermal Transient Impedance, Junction-to-Ambient
1
Normalized Effective Transient
Thermal Impedance
Duty Cycle = 0.5
0.2
0.1
0.05
0.02
0.1
10-4
Single Pulse
10-3
10-2
Square Wave Pulse Duration (s)
10-1
1
Normalized Thermal Transient Impedance, Junction-to-Case
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see http://www.vishay.com/ppg?73663.
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Document Number: 73663
S-81448-Rev. B, 23-Jun-08
Package Information
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Vishay Siliconix
PowerPAK® ChipFET® Case Outline
D
(7)
(6)
(5)
(1)
(2)
(3)
(4)
E
(8)
Pin #1
indicator
Side view of single
e
b
H
D1
D(2)
D2
K
D(3)
L
G(4)
K1
D2
SI(1)
GI(2)
S2(3)
D1(8)
D1(7)
D2(6)
Detail Z
G2(4)
K2
L
D(1)
A1
C
A
Z
Side view of dual
E1
E2
E3
H
D3
D(8)
D(7)
D(6)
S(5)
K3
Backside view of dual pad
Backside view of single pad
DIM.
D2(5)
MILLIMETERS
INCHES
MIN.
NOM.
MAX.
MIN.
NOM.
MAX.
A
0.70
0.75
0.85
0.028
0.030
0.033
A1
0
-
0.05
0
-
0.002
b
0.25
0.30
0.35
0.010
0.012
0.014
C
0.15
0.20
0.25
0.006
0.008
0.010
D
2.92
3.00
3.08
0.115
0.118
0.121
D1
1.75
1.87
2.00
0.069
0.074
0.079
D2
1.07
1.20
1.32
0.042
0.047
0.052
D3
0.20
0.25
0.30
0.008
0.010
0.012
E
1.82
1.90
1.98
0.072
0.075
0.078
E1
1.38
1.50
1.63
0.054
0.059
0.064
E2
0.92
1.05
1.17
0.036
0.041
0.046
E3
0.45
0.50
0.55
0.018
0.020
0.022
e
0.65 BSC
0.026 BSC
H
0.15
0.20
0.25
0.006
0.008
0.010
K
0.25
-
-
0.010
-
-
K1
0.30
-
-
0.012
-
-
K2
0.20
-
-
0.008
-
-
K3
0.20
-
-
0.008
-
-
L
0.30
0.35
0.40
0.012
0.014
0.016
C14-0630-Rev. E, 21-Jul-14
DWG: 5940
Note
• Millimeters will govern
Document Number: 73203
1
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Revision: 21-Jul-14
Application Note 826
Vishay Siliconix
RECOMMENDED MINIMUM PADS FOR PowerPAK® ChipFET® Single
0.225
(0.009)
0.350
(0.014)
0.650
(0.026)
0.200
(0.008)
0.300
(0.012)
0.300
(0.012)
0.100
(0.004)
1.500
(0.059)
1.900
(0.075)
0.250
(0.010)
0.500
(0.020)
0.350
(0.014)
0.350
(0.014)
1.870
(0.074)
0.305
(0.012)
2.575
(0.101)
Recommended Minimum Pads
Dimensions in mm/(Inches)
Return to Index
APPLICATION NOTE
Document Number: 69948
Revision: 21-Jan-08
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Revision: 02-Oct-12
1
Document Number: 91000