DATASHEET

CD4503BMS
December 1992
File Number
CMOS Hex Buffer
Features
CD4503BMS is a hex noninverting buffer with 3 state
outputs having high sink and source current capability. Two
disable controls are provided, one of which controls four
buffers and the other controls the remaining two buffers.
• High Voltage Type (20V Rating)
The CD4503BMS is supplied in these 16-lead outline packages:
• 2 Output Disable Controls
Braze Seal DIP
Frit Seal DIP
Ceramic Flatpack
• 3 State Outputs
H4T
H1E
H6W
3335
• 3 State Non-Inverting Type
• 1 TTL Load Output Drive Capability
• Pin Compatible with
MC14503, and 340097
Industry
Types MM80C97,
• 5V, 10V and 15V Parametric Ratings
• Maximum Input Current of 1µA at 18V Over Full Package Temperature Range; 100nA at 18V and +25oC
• Meets All Requirements of JEDEC Tentative Standard
No. 13B, “Standard Specifications for Description of
‘B’ Series CMOS Devices”
Applications
• 3 State Hex Buffer for Interfacing ICs with Data Buses
• COS/MOS to TTL Hex Buffer
Pinout
Functional Diagram
CD4503BMS
TOP VIEW
DISABLE A
DIS A
1
16 VDD
D1
2
15 DIS B
Q1
3
14 D6
D2
4
13 DQ6
Q2
5
12 D5
D3
6
11 Q5
Q3
7
10 D4
8
9 Q4
VSS
D1
D2
D3
D4
D5
D6
DISABLE B
1
2
3
4
5
6
7
10
9
12
11
14
13
Q1
Q2
Q3
Q4
Q5
Q6
15
VDD = 16
VSS = 8
4-1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
CD4503BMS
Absolute Maximum Ratings
Reliability Information
DC Supply Voltage Range, (VDD) . . . . . . . . . . . . . . . . -0.5V to +20V
(Voltage Referenced to VSS Terminals)
Input Voltage Range, All Inputs . . . . . . . . . . . . . -0.5V to VDD +0.5V
DC Input Current, Any One Input. . . . . . . . . . . . . . . . . . . . . . . . .±10mA
Operating Temperature Range . . . . . . . . . . . . . . . -55oC to +125oC
Package Types D, F, K, H
Storage Temperature Range (TSTG). . . . . . . . . . . -65oC to +150oC
Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . +265oC
At Distance 1/16 ± 1/32 Inch (1.59mm ± 0.79mm) from case for
10s Maximum
Thermal Resistance. . . . . . . . . . . . . . . .
θja
θjc
Ceramic DIP and FRIT Package . . . .
80oC/W
20oC/W
Flatpack Package . . . . . . . . . . . . . . . .
70oC/W
20oC/W
Maximum Package Power Dissipation (PD) at +125oC
For TA = -55oC to +100oC (Package Type D, F, K) . . . . . .500mW
For TA = +100oC to +125oC (Package Type D, F, K) . . . . . Derate
Linearity at 12mW/oC to 200mW
Device Dissipation per Output Transistor. . . . . . . . . . . . . . . .100mW
For TA = Full Package Temperature Range (All Package Types)
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+175oC
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
Supply Current
SYMBOL
IDD
TEMPERATURE
MIN
MAX
UNITS
1
+25oC
-
2
µA
2
+125oC
-
200
µA
3
-55oC
-
2
µA
1
+25oC
-100
-
nA
2
+125oC
-1000
-
nA
VDD = 18V
3
-55oC
-100
-
nA
VDD = 20
1
+25oC
-
100
nA
2
+125oC
-
1000
nA
3
-55oC
-
100
nA
-
50
mV
14.95
-
V
2.1
-
mA
VDD = 20V, VIN = VDD or GND
VDD = 18V, VIN = VDD or GND
Input Leakage Current
Input Leakage Current
IIL
IIH
VIN = VDD or GND
VIN = VDD or GND
LIMITS
GROUP A
SUBGROUPS
CONDITIONS (NOTE 1)
VDD = 20
VDD = 18V
Output Voltage
VOL15
VDD = 15V, No Load
1, 2, 3
Output Voltage
VOH15
VDD = 15V, No Load (Note 3)
1, 2, 3
+25oC, +125oC, -55oC
+25oC, +125oC, -55oC
Output Current (Sink)
IOL5
VDD = 5V, VOUT = 0.4V
1
+25oC
Output Current (Sink)
IOL10
VDD = 10V, VOUT = 0.5V
1
+25oC
5.5
-
mA
Output Current (Sink)
IOL15
VDD = 15V, VOUT = 1.5V
1
+25oC
16.1
-
mA
Output Current (Source)
IOH5A
VDD = 5V, VOUT = 4.6V
1
+25oC
-
-1.02
mA
Output Current (Source)
IOH5B
VDD = 5V, VOUT = 2.5V
1
+25oC
-
-4.8
mA
Output Current (Source)
IOH10
VDD = 10V, VOUT = 9.5V
1
+25oC
-
-2.6
mA
Output Current (Source)
IOH15
VDD = 15V, VOUT = 13.5V
1
+25oC
-
-6.8
mA
N Threshold Voltage
VNTH
VDD = 10V, ISS = -10µA
1
+25oC
-2.8
-0.7
V
VSS = 0V, IDD = 10µA
1
+25oC
0.7
2.8
V
VDD = 2.8V, VIN = VDD or GND
7
+25oC
VDD = 20V, VIN = VDD or GND
7
+25oC
VDD = 18V, VIN = VDD or GND
8A
+125oC
VDD = 3V, VIN = VDD or GND
8B
-55oC
P Threshold Voltage
Functional
VPTH
F
VOH > VOL <
VDD/2 VDD/2
V
Input Voltage Low
(Note 2)
VIL
VDD = 5V, VOH > 4.5V, VOL < 0.5V
1, 2, 3
+25oC, +125oC, -55oC
-
1.5
V
Input Voltage High
(Note 2)
VIH
VDD = 5V, VOH > 4.5V, VOL < 0.5V
1, 2, 3
+25oC, +125oC, -55oC
3.5
-
V
Input Voltage Low
(Note 2)
VIL
VDD = 15V, VOH > 13.5V,
VOL < 1.5V
1, 2, 3
+25oC, +125oC, -55oC
-
4
V
Input Voltage High
(Note 2)
VIH
VDD = 15V, VOH > 13.5V,
VOL < 1.5V
1, 2, 3
+25oC, +125oC, -55oC
11
-
V
Tri-State Output
Leakage
IOZL
VIN = VDD or GND
VOUT = 0V
1
+25oC
-0.4
-
µA
2
+125oC
-12
-
µA
VDD = 18V
3
-55oC
-0.4
-
µA
VDD = 20V
1
+25oC
-
0.4
µA
2
+125oC
-
12
µA
3
-55oC
-
0.4
µA
Tri-State Output
Leakage
IOZH
VIN = VDD or GND
VOUT = VDD
VDD = 20V
VDD = 18V
NOTES: 1. All voltages referenced to device GND, 100% testing being implemented.
2. Go/No Go test with limits applied to inputs.
4-2
3. For accuracy, voltage is measured differentially to VDD. Limit is
0.050V max.
CD4503BMS
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
Propagation Delay
Propagation Delay
Propagation Delay3 State
Propagation Delay3 State
Transition Time
Transition Time
SYMBOL
TPHL
TPLH
TPHZ
TPZH
CONDITIONS
VDD = 5V, VIN = VDD or GND
(Note 1, 2)
VDD = 5V, VIN = VDD or GND
(Note 1, 2)
VDD = 5V, VIN = VDD or GND
(Note 2, 3)
TPZL
TPLZ
VDD = 5V, VIN = VDD or GND
(Note 2, 3)
TTHL
VDD = 5V, VIN = VDD or GND
(Note 1, 2)
TTLH
VDD = 5V, VIN = VDD or GND
(Note 1, 2)
LIMITS
GROUP A
SUBGROUPS
TEMPERATURE
MIN
MAX
UNITS
9
+25oC
-
110
ns
10, 11
+125oC, -55oC
-
149
ns
9
+25oC
-
150
ns
10, 11
+125oC, -55oC
-
203
ns
9
+25oC
-
140
ns
10, 11
+125oC, -55oC
-
189
ns
9
+25oC
-
180
ns
10, 11
+125oC, -55oC
-
243
ns
9
+25oC
-
70
ns
10, 11
+125oC, -55oC
-
95
ns
9
+25oC
-
90
ns
10, 11
+125oC, -55oC
-
122
ns
NOTES:
1. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
2. -55oC and +125oC limits guaranteed, 100% testing being implemented.
3. CL = 50pF, RL = 1K, Input TR, TF < 20ns.
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
LIMITS
PARAMETER
Supply Current
SYMBOL
IDD
CONDITIONS
VDD = 5V, VIN = VDD or GND
VDD = 10V, VIN = VDD or GND
VDD = 15V, VIN = VDD or GND
NOTES
TEMPERATURE
MIN
1, 2
-55oC, +25oC
+125oC
1, 2
1, 2
MAX
UNITS
-
1
µA
-
30
µA
-55oC, +25oC
-
2
µA
+125oC
-
60
µA
-55oC, +25oC
+125oC
-
2
µA
-
120
µA
Output Voltage
VOL
VDD = 5V, No Load
1, 2
+25oC, +125oC, 55oC
-
50
mV
Output Voltage
VOL
VDD = 10V, No Load
1, 2
+25oC, +125oC, 55oC
-
50
mV
Output Voltage
VOH
VDD = 5V, No Load
1, 2
+25oC, +125oC, 55oC
4.95
-
V
Output Voltage
VOH
VDD = 10V, No Load
1, 2
+25oC, +125oC, 55oC
9.95
-
V
Output Current (Sink)
IOL5
VDD = 5V, VOUT = 0.4V
1, 2
+125oC
1.3
-
mA
-55oC
2.6
-
mA
mA
Output Current (Sink)
Output Current (Sink)
Output Current (Source)
Output Current (Source)
Output Current (Source)
Output Current (Source)
IOL10
IOL15
IOH5A
IOH5B
IOH10
IOH15
4-3
VDD = 10V, VOUT = 0.5V
VDD = 15V, VOUT = 1.5V
VDD = 5V, VOUT = 4.6V
VDD = 5V, VOUT = 2.5V
VDD = 10V, VOUT = 9.5V
VDD =15V, VOUT = 13.5V
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
+125oC
3.8
-
-55oC
6.5
-
mA
+125oC
11.2
-
mA
-55oC
19.2
-
mA
+125oC
-
-0.7
mA
-55oC
-
-1.2
mA
+125oC
-
-3.0
mA
-55oC
-
-5.8
mA
+125oC
-
-1.8
mA
-55oC
-
-3.1
mA
+125oC
-
-4.8
mA
-55oC
-
-8.2
mA
CD4503BMS
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)
LIMITS
PARAMETER
SYMBOL
CONDITIONS
NOTES
TEMPERATURE
MIN
MAX
UNITS
Input Voltage Low
VIL
VDD = 10V, VOH > 9V, VOL < 1V
1, 2
+25oC, +125oC, 55oC
-
3
V
Input Voltage High
VIH
VDD = 10V, VOH > 9V, VOL < 1V
1, 2
+25oC, +125oC, 55oC
+7
-
V
Propagation Delay
TPHL
VDD = 10V
1, 2, 3
+25oC
-
50
ns
VDD = 15V
1, 2, 3
+25oC
-
35
ns
VDD = 10V
1, 2, 3
+25oC
-
70
ns
VDD = 15V
1, 2, 3
+25oC
-
50
ns
Propagation Delay
Propagation Delay
Propagation Delay
Transition Time
Transition Time
Input Capacitance
TPLH
TPHZ
TPZH
VDD = 10V
1, 2, 4
+25oC
-
60
ns
VDD = 15V
1, 2, 4
+25oC
-
50
ns
TPZL
TPLZ
VDD = 10V
1, 2, 4
+25oC
-
80
ns
VDD = 15V
1, 2, 4
+25oC
-
70
ns
VDD = 10V
1, 2, 3
+25oC
-
40
ns
VDD = 15V
1, 2, 3
+25oC
-
25
ns
VDD = 10V
1, 2, 3
+25oC
-
45
ns
VDD = 15V
1, 2, 3
+25oC
-
35
ns
1, 2
+25oC
-
7.5
pF
TTHL
TTLH
CIN
Any Inputs
NOTES:
1. All voltages referenced to device GND.
2. The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterized on initial
design release and upon design changes which would affect these characteristics.
3. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
4. CL = 50pF, RL = 1K, Input TR, TF < 20ns.
TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS
LIMITS
PARAMETER
Supply Current
N Threshold Voltage
SYMBOL
IDD
VNTH
N Threshold Voltage
Delta
∆VTN
P Threshold Voltage
VTP
P Threshold Voltage
Delta
Functional
∆VTP
F
CONDITIONS
NOTES
TEMPERATURE
MIN
MAX
UNITS
1, 4
+25oC
-
7.5
µA
1, 4
+25oC
-2.8
-0.2
V
VDD = 10V, ISS = -10µA
1, 4
+25oC
-
±1
V
VSS = 0V, IDD = 10µA
1, 4
+25oC
0.2
2.8
V
1, 4
+25oC
-
±1
V
1
+25oC
VOH >
VDD/2
VOL <
VDD/2
V
1, 2, 3, 4
+25oC
-
1.35 x
+25oC
Limit
ns
VDD = 20V, VIN = VDD or GND
VDD = 10V, ISS = -10µA
VSS = 0V, IDD = 10µA
VDD = 18V, VIN = VDD or GND
VDD = 3V, VIN = VDD or GND
Propagation Delay Time
TPHL
TPLH
VDD = 5V
3. See Table 2 for +25oC limit.
NOTES: 1. All voltages referenced to device GND.
2. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
4. Read and Record
TABLE 5. BURN-IN AND LIFE TEST DELTA PARAMETERS +25oC
PARAMETER
SYMBOL
DELTA LIMIT
Supply Current - MSI-1
IDD
± 0.2µA
Output Current (Sink)
IOL5
± 20% x Pre-Test Reading
IOH5A
± 20% x Pre-Test Reading
Output Current (Source)
4-4
CD4503BMS
TABLE 6. APPLICABLE SUBGROUPS
MIL-STD-883
METHOD
GROUP A SUBGROUPS
Initial Test (Pre Burn-In)
100% 5004
1, 7, 9
IDD, IOL5, IOH5A
Interim Test 1 (Post Burn-In)
100% 5004
1, 7, 9
IDD, IOL5, IOH5A
IDD, IOL5, IOH5A
CONFORMANCE GROUP
Interim Test 2 (Post Burn-In)
PDA (Note 1)
Interim Test 3 (Post Burn-In)
PDA (Note 1)
Final Test
1, 7, 9
1, 7, 9, Deltas
100% 5004
1, 7, 9
100% 5004
1, 7, 9, Deltas
IDD, IOL5, IOH5A
100% 5004
2, 3, 8A, 8B, 10, 11
Sample 5005
1, 2, 3, 7, 8A, 8B, 9, 10, 11
Subgroup B-5
Sample 5005
1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas
Subgroup B-6
Sample 5005
1, 7, 9
Sample 5005
1, 2, 3, 8A, 8B, 9
Group A
Group B
100% 5004
100% 5004
Group D
READ AND RECORD
Subgroups 1, 2, 3, 9, 10, 11
Subgroups 1, 2 3
NOTE: 1. 5% Parameteric, 3% Functional; Cumulative for Static 1 and 2.
TABLE 7. TOTAL DOSE IRRADIATION
CONFORMANCE GROUPS
Group E Subgroup 2
TEST
READ AND RECORD
MIL-STD-883
METHOD
PRE-IRRAD
POST-IRRAD
PRE-IRRAD
POST-IRRAD
5005
1, 7, 9
Table 4
1, 9
Table 4
TABLE 8. BURN-IN AND IRRADIATION TEST CONNECTIONS
OSCILLATOR
FUNCTION
OPEN
GROUND
VDD
Static Burn-In 1
(Note 1)
3, 5, 7, 9, 11, 13
1, 2, 4, 6, 8,10, 12,
14, 15
16
Static Burn-In 2
(Note 1)
3, 5, 7, 9, 11, 13
8
1, 2, 4, 6, 10, 12,
14-16
Dynamic BurnIn (Note 1)
-
1, 8, 15
16
3, 5, 7, 9, 11, 13
8
1, 2, 4, 6, 10, 12,
14-16
Irradiation
(Note 2)
9V ± -0.5V
50kHz
3, 5, 7, 9, 11, 13
2, 4, 6, 10, 12, 14
25kHz
NOTES:
1. Each pin except VDD and GND will have a series resistor of 10K ± 5%, VDD = 18V ± 0.5V
2. Each pin except VDD and GND will have a series resistor of 47K ± 5%; Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures,
VDD = 10V ± 0.5V
4-5
CD4503BMS
Logic Diagram
VDD
DI *
TRUTH TABLE
2 (4, 6, 10, 12, 14)
QN
3 (5, 7, 9, 11, 13)
DIS A (B) *
1 (15)
VSS
VDD
DN
DIS A (B)
Qn
0
0
0
1
0
1
X
1
High Z
X = Don’t Care
DISABLE TO OTHER
BUFFERS
*
ALL INPUTS ARE PROTECTED
BY CMOS PROTECTION
NETWORK
VSS
FIGURE 1. LOGIC DIAGRAM OF 1 TO 6 IDENTICAL BUFFERS
AMBIENT TEMPERATURE (TA) = +25oC
OUTPUT LOW (SINK) CURRENT (IOL) (mA)
70
GATE-TO-SOURCE VOLTAGE (VGS) = 15V
60
50
40
10V
30
20
10
5V
0
1
2
3
4
5
6
7
8
DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
9
10
FIGURE 2. TYPICAL N-CHANNEL OUTPUT LOW (SINK)
CURRENT CHARACTERISTICS
DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
-6
-4
-2
-8
-7
-5
-3
-1
0
-10
-20
-30
-40
-50
-60
-15V
-70
AMBIENT TEMPERATURE (TA) = +25oC
FIGURE 4. TYPICAL P-CHANNEL OUTPUT HIGH (SOURCE)
CURRENT CHARACTERISTICS
4-6
GATE-TO-SOURCE VOLTAGE (VGS) = 15V
50
10V
40
30
20
5V
10
0
-9
GATE-TO-SOURCE VOLTAGE (VGS) = -5V
-10V
60
1
2
3
4
5
6
7
8
DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
9
10
FIGURE 3. MINIMUM N-CHANNEL OUTPUT LOW (SINK)
CURRENT CHARACTERISTICS
OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA)
-9
AMBIENT TEMPERATURE (TA) = +25oC
70
DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
-8
-7
-6
-5
-4
-3
-2
-1
0
GATE-TO-SOURCE VOLTAGE (VGS) = -5V
-5
-10
-15
-10V
-20
-25
-15V
-30
-35
AMBIENT TEMPERATURE (TA) = +25oC
OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA)
OUTPUT LOW (SINK) CURRENT (IOL) (mA)
Typical Performance Characteristics
FIGURE 5. MINIMUM P-CHANNEL OUTPUT HIGH (SOURCE)
CURRENT CHARACTERISTICS
CD4503BMS
(Continued)
AMBIENT TEMPERATURE (TA) = +25oC
AMBIENT TEMPERATURE (TA) = +25oC
TRANSITION TIME (tTHL, tTLH) (ns)
PROPAGATION DELAY TIME (tPLH, tPHL) (ns)
Typical Performance Characteristics
175
tPLH
tPHL
150
125
100
VDD = 5V
75
50
VDD = 10V
25
70
60
50
40
5V (tTLH)
5V (tTHL)
30
10V (tTLH)
20 15V (tTLH)
10
10V (tTHL)
15V (tTHL)
VDD = 15V
0
10
20
30
40
50
60
70
80
90
100
0
10
30
20
LOAD CAPACITANCE (CL) (pF)
40
50
60
70
80
FIGURE 6. TYPICAL PROPAGATION DELAY TIME AS A
FUNCTION OF LOAD CAPACITANCE
POWER DISSIPATION (PD) (µW)
VDD = 5V
2
VDD = 10V
10K 8
6
4
2
VDD = 15V
1K
CL = 50pF
8
6
4
2
CL = 15pF
tr = tf = 20ns
8
6
4
AMBIENT TEMPERATURE (TA) = +25oC
2
10
2
1
4 68
2
10
4 6 8
2
4 6 8
2
4 6 8
103
102
FREQUENCY (f) (kHz)
104
FIGURE 8. TYPICAL POWER DISSIPATION AS A FUNCTION OF FREQUENCY
Chip Dimensions and Pad Layout
Dimensions in parenthesis are in millimeters and are
derived from the basic inch dimensions as indicated.
Grid graduations are in mils (10-3 inch).
METALLIZATION:
PASSIVATION:
BOND PADS:
Thickness: 11kÅ − 14kÅ,
AL.
10.4kÅ - 15.6kÅ, Silane
0.004 inches X 0.004 inches MIN
DIE THICKNESS: 0.0198 inches - 0.0218 inches
4-7
100
FIGURE 7. TYPICAL TRANSITION TIME AS A FUNCTION OF
LOAD CAPACITANCE
8
6
4
100
90
LOAD CAPACITANCE (CL) (pF)
CD4503BMS
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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Sales Office Headquarters
NORTH AMERICA
Intersil Corporation
P. O. Box 883, Mail Stop 53-204
Melbourne, FL 32902
TEL: (321) 724-7000
FAX: (321) 724-7240
4-8
EUROPE
Intersil SA
Mercure Center
100, Rue de la Fusee
1130 Brussels, Belgium
TEL: (32) 2.724.2111
FAX: (32) 2.724.22.05
ASIA
Intersil (Taiwan) Ltd.
7F-6, No. 101 Fu Hsing North Road
Taipei, Taiwan
Republic of China
TEL: (886) 2 2716 9310
FAX: (886) 2 2715 3029
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