DATASHEET

CD4504BMS
CMOS Hex Voltage Level Shifter for
TTL-to-CMOS or CMOS-to-CMOS Operation
December 1992
Features
Pinout
• High Voltage Type (20V Rating)
CD4504BMS
TOP VIEW
• Independence of Power Supply Sequence Considerations
- VCC can Exceed VDD
- Input Signals can Exceed Both VCC and VDD
VCC
16 VDD
1
15 FOUT
AOUT 2
AIN
3
14 FIN
BOUT
4
13 SELECT
BIN
5
12 EOUT
COUT
6
11 EIN
CIN
7
10 DOUT
VSS
8
• Up and Down Level Shifting Capability
• Shiftable Input Threshold for Either CMOS or TTL
Compatibility
• 100% Tested for Quiescent Current at 20V
• 5V, 10V and 15V Parametric Ratings
9 DIN
• Standardized Symmetrical Output Characteristics
• Maximum Input Current of 1µA at 18V Over Full Package Temperature Range; 100nA at 18V and +25oC
• Meets All Requirements of JEDEC Tentative Standard
No. 13B, “Standard Specifications for Description of
‘B’ Series CMOS Devices”
Functional Diagram
VCC
Description
CD4504BMS hex voltage level shifter consists of six circuits
which shift input signals from the VCC logic level to the VDD
logic level. To shift TTL signals to CMOS logic levels, the
SELECT input is at the VCC HIGH logic state. When the
SELECT input is at a LOW logic state, each circuit translates
signals from one CMOS level to another.
VDD
* IN
LEVEL
SHIFTER
(3, 5, 7, 9, 11, 14)
SELECT
*
13
OUT
(2, 4, 6, 10, 12, 15)
VCC = PIN 1
VDD = PIN 16
VSS = PIN 8
TTL/CMOS
MODE SELECT
The CD4504BMS is supplied in these 16-lead outline packages:
Frit Seal DIP
Ceramic Flatpack
H1F
H6W
VDD
*
ALL INPUTS ARE PROTECTED
BY CMOS PROTECTION
NETWORK
VSS
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
7-1140
File Number
3336
Specifications CD4504BMS
Absolute Maximum Ratings
Reliability Information
DC Supply Voltage Range, (VDD) . . . . . . . . . . . . . . . -0.5V to +20V
(Voltage Referenced to VSS Terminals)
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VDD +0.5V
DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA
Operating Temperature Range . . . . . . . . . . . . . . . . -55oC to +125oC
Package Types D, F, K, H
Storage Temperature Range (TSTG) . . . . . . . . . . . -65oC to +150oC
Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . +265oC
At Distance 1/16 ± 1/32 Inch (1.59mm ± 0.79mm) from case for
10s Maximum
Thermal Resistance . . . . . . . . . . . . . . . .
θja
θjc
Ceramic DIP and FRIT Package . . . . . 80oC/W
20oC/W
Flatpack Package . . . . . . . . . . . . . . . . 70oC/W
20oC/W
o
Maximum Package Power Dissipation (PD) at +125 C
For TA = -55oC to +100oC (Package Type D, F, K) . . . . . . 500mW
For TA = +100oC to +125oC (Package Type D, F, K) . . . . . Derate
Linearity at 12mW/oC to 200mW
Device Dissipation per Output Transistor . . . . . . . . . . . . . . . 100mW
For TA = Full Package Temperature Range (All Package Types)
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
Supply Current
SYMBOL
IDD
CONDITIONS (NOTE 1)
VDD = 20V, VIN = VDD or GND
VDD = 18V, VIN = VDD or GND
Input Leakage Current
IIL
VIN = VDD or GND
VDD = 20
VDD = 18V
Input Leakage Current
IIH
VIN = VDD or GND
VDD = 20
GROUP A
SUBGROUPS
LIMITS
TEMPERATURE
MIN
+25
-
2
µA
+125oC
-
200
µA
3
-55oC
-
2
µA
1
+25o
C
-100
-
nA
2
+125oC
-1000
-
nA
3
-55oC
-100
-
nA
1
+25oC
-
100
nA
2
+125oC
-
1000
nA
-
100
nA
-
50
mV
-
V
3
Output Voltage
VOL15
VDD = 15V, No Load
1, 2, 3
+25oC, +125oC, -55oC
Output Voltage
VOH15
VDD = 15V, No Load (Note 3)
1, 2, 3
+25oC, +125oC, -55oC 14.95
Output Current (Sink)
IOL5
VDD = 5V, VOUT = 0.4V
UNITS
1
-55oC
VDD = 18V
MAX
2
oC
1
+25oC
0.53
-
mA
Output Current (Sink)
IOL10
VDD = 10V, VOUT = 0.5V
1
+25oC
1.4
-
mA
Output Current (Sink)
IOL15
VDD = 15V, VOUT = 1.5V
1
+25oC
3.5
-
mA
1
+25oC
-
-0.53
mA
1
+25oC
-
-1.8
mA
Output Current (Source)
Output Current (Source)
IOH5A
IOH5B
VDD = 5V, VOUT = 4.6V
VDD = 5V, VOUT = 2.5V
Output Current (Source)
IOH10
VDD = 10V, VOUT = 9.5V
1
+25oC
-
-1.4
mA
Output Current (Source)
IOH15
VDD = 15V, VOUT = 13.5V
1
+25oC
-
-3.5
mA
1
+25oC
-2.8
-0.7
V
1
+25oC
0.7
2.8
V
VDD = 4.5V, VCC = 2.8,
VIN = VDD or GND
7
+25oC
VDD = 4.5V, VCC = 3.0,
VIN = VDD or GND
8B
-55oC
VDD = 18V, VCC = 18V,
VIN = GND or VCC
8A
+125oC
VDD = 18V, VCC = 4.5V,
VIN = VCC or GND
8A
+125oC
VDD = 4.5V, VCC = 18V,
VIN = VCC or GND
8A
+125oC
VDD = 20V, VCC = 20V,
VIN = GND or VCC
7
+25oC
VDD = 20V, VCC = 4.5V,
VIN = VCC or GND
7
+25oC
VDD = 4.5V, VCC = 20V,
VIN = VCC or GND
7
+25oC
N Threshold Voltage
P Threshold Voltage
Functional
VNTH
VPTH
F
VDD = 10V, ISS = -10µA
VSS = 0V, IDD = 10µA
7-1141
VOH > VOL <
VDD/2 VDD/2
V
Specifications CD4504BMS
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)
PARAMETER
GROUP A
SUBGROUPS
LIMITS
SYMBOL
CONDITIONS (NOTE 1)
TEMPERATURE
MIN
MAX
UNITS
Input Voltage Low
(Note 2) TTL-CMOS
VIL
VDD = 15V, VOH > 13.5V, VOL < 1V
VCC = 5V
1, 2, 3
+25oC, +125oC, -55oC
-
0.8
V
Input Voltage High
(Note 2) TTL-CMOS
VIH
VDD = 15V, VOH > 13.5V, VOL < 1V
VCC = 5V
1, 2, 3
+25oC, +125oC, -55oC
2
-
V
Input Voltage Low
(Note 2) CMOS-CMOS
VIL
VDD = 10V, VOH > 9V, VOL < 1V
VCC = 5V
1, 2, 3
+25oC, +125oC, -55oC
-
1.5
V
Input Voltage High
(Note 2)CMOS-CMOS
VIH
VDD = 10V, VOH > 9V, VOL < 1V
VCC = 5V
1, 2, 3
+25oC, +125oC, -55oC
3.5
-
V
Input Voltage Low
(Note 2) CMOS-CMOS
VIL
VDD = 15V, VOH > 13.5V, VOL <
1.5V, VCC = 10V
1, 2, 3
+25oC, +125oC, -55oC
-
3
V
Input Voltage High
(Note 2) CMOS-CMOS
VIH
VDD = 15V, VOH > 13.5V, VOL <
1.5V, VCC = 10V
1, 2, 3
+25oC, +125oC, -55oC
7
-
V
NOTES: 1. All voltages referenced to device GND, 100% testing being
implemented.
2. Go/No Go test with limits applied to inputs.
3. For accuracy, voltage is measured differentially to VDD. Limit
is 0.050V max.
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
SYMBOL
Propagation Delay
TTL to CMOS
VDD > VCC
TPHL1
Propagation Delay
CMOS to CMOS VDD >
VCC
TPHL2
Propagation Delay
CMOS to CMOS VCC >
VDD
TPHL3
Propagation Delay
TTL to CMOS
VDD > VCC
TPLH1
Propagation Delay
CMOS to CMOS VDD >
VCC
TPLH2
Propagation Delay
CMOS to CMOS VCC >
VDD
TPLH3
Transition Time
TTHL
TTLH
CONDITIONS (NOTE 1, 2)
GROUP A
SUBGROUPS TEMPERATURE
VDD = 10V, VIN = VCC or GND
VCC = 5V
VDD = 10V, VIN = VCC or GND
VCC = 5V
VDD = 5V, VIN = VCC or GND
VCC = 10V
VDD = 10V, VIN = VCC or GND
VCC = 5V
VDD = 10V, VIN = VCC or GND
VCC = 5V
VDD = 5V, VIN = VCC or GND
VCC = 10V
All Modes
NOTES:
1. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
2. -55oC and +125oC limits guaranteed, 100% testing being implemented.
7-1142
9
10, 11
9
10, 11
+25oC
+125oC,
-55oC
+25oC
+125oC,
-55oC
LIMITS
MIN
MAX
UNITS
-
280
ns
-
378
ns
-
240
ns
-
324
ns
9
+25oC
-
550
ns
10, 11
+125oC, -55oC
-
743
ns
9
+25oC
-
280
ns
-
378
ns
-
240
ns
-
324
ns
-
400
ns
-
540
ns
10, 11
9
10, 11
9
10, 11
+125oC,
-55oC
+25oC
+125oC,
-55oC
+25oC
+125oC,
-55oC
9
+25oC
-
200
ns
10, 11
+125oC, -55oC
-
270
ns
Specifications CD4504BMS
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
LIMITS
PARAMETER
Supply Current
SYMBOL
CONDITIONS
NOTES
TEMPERATURE
MIN
MAX
UNITS
IDD
VDD = 5V, VIN = VDD or GND
1, 2
-55oC, +25oC
-
1
µA
+125oC
-
30
µA
µA
VDD = 10V, VIN = VDD or GND
VDD = 15V, VIN = VDD or GND
Output Voltage
VOL
VDD = 5V, No Load
1, 2
1, 2
1, 2
-55oC,
+25oC
-
2
+125oC
-
60
µA
-55oC, +25oC
-
2
µA
+125oC
-
120
µA
+25oC, +125oC,
-
50
mV
-55oC
Output Voltage
VOL
VDD = 10V, No Load
1, 2
+25oC, +125oC,
-55oC
-
50
mV
Output Voltage
VOH
VDD = 5V, No Load
1, 2
+25oC, +125oC,
-55oC
4.95
-
V
Output Voltage
VOH
VDD = 10V, No Load
1, 2
+25oC, +125oC,
-55oC
9.95
-
V
Output Current (Sink)
IOL5
VDD = 5V, VOUT = 0.4V
1, 2
+125oC
0.36
-
mA
-55oC
0.64
-
mA
+125oC
0.9
-
mA
-55oC
1.6
-
mA
+125oC
2.4
-
mA
-55oC
4.2
-
mA
+125oC
-
-0.36
mA
-55oC
-
-0.64
mA
+125oC
-
-1.15
mA
-55oC
-
-2.0
mA
+125oC
-
-0.9
mA
-55oC
-
-1.6
mA
+125oC
-
-2.4
mA
-55oC
Output Current (Sink)
Output Current (Sink)
Output Current (Source)
Output Current (Source)
Output Current (Source)
Output Current (Source)
IOL10
IOL15
IOH5A
IOH5B
IOH10
IOH15
VDD = 10V, VOUT = 0.5V
VDD = 15V, VOUT = 1.5V
VDD = 5V, VOUT = 4.6V
1, 2
1, 2
1, 2
VDD = 5V, VOUT = 2.5V
1, 2
VDD = 10V, VOUT = 9.5V
VDD =15V, VOUT = 13.5V
1, 2
1, 2
-
-4.2
mA
Input Voltage Low
TTL - CMOS
VIL
VDD = 10V, VOH > 9V,
VOL < 1V, VCC = 5V
1, 2
+25oC, +125oC,
-55oC
-
0.8
V
Input Voltage High
TTL - CMOS
VIH
VDD = 10V, VOH > 9V,
VOL < 1V, VCC = 5V
1, 2
+25oC, +125oC,
-55oC
2
-
V
Input Voltage Low
CMOS - CMOS
VIL
VDD = 15V, VOH > 13.5V,
VOL < 1.5V, VCC = 5V
1, 2
+25oC, +125oC,
-55oC
-
1.5
V
Input Voltage High
CMOS - CMOS
VIH
VDD = 15V, VOH > 13.5V,
VOL < 1.5V, VCC = 5V
1, 2
+25oC, +125oC,
-55oC
3.5
-
V
Propagation Delay
TTL - CMOS, VDD > VCC
TPHL1
VDD = 15V, VCC = 5V
1, 2, 3
+25oC
-
280
ns
Propagation Delay
CMOS - CMOS,
VDD > VCC
TPHL2
VDD = 15V, VCC = 5V
1, 2, 3
+25oC
-
240
ns
VDD = 15V, VCC = 10V
1, 2, 3
+25oC
-
140
ns
Propagation Delay
CMOS - CMOS,
VCC > VDD
TPHL3
VDD = 5V, VCC = 15V
1, 2, 3
+25oC
-
550
ns
VDD = 10V, VCC = 15V
1, 2, 3
+25oC
-
140
ns
Propagation Delay
TTL - CMOS, VDD > VCC
TPLH1
VDD = 15V, VCC = 5V
1, 2, 3
+25oC
-
280
ns
7-1143
Specifications CD4504BMS
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)
LIMITS
PARAMETER
SYMBOL
Propagation Delay
CMOS - CMOS,
VDD > VCC
TPLH2
Propagation Delay
CMOS - CMOS
VCC > VDD
TPLH3
Transition Time
TTHL
TTLH
Input Capacitance
CONDITIONS
NOTES
TEMPERATURE
MIN
MAX
UNITS
VDD = 15V, VCC = 5V
1, 2, 3
+25oC
-
240
ns
VDD = 15V, VCC = 10V
1, 2, 3
+25oC
-
140
ns
VDD = 5V, VCC = 15V
1, 2, 3
+25oC
-
400
ns
VDD = 10V, VCC = 15V
1, 2, 3
+25 C
-
120
ns
VDD = 10V
1, 2, 3
+25oC
-
100
ns
1, 2, 3
+25oC
-
80
ns
1, 2
+25oC
-
7.5
pF
VDD = 15V
CIN
o
Any Input
NOTES:
1. All voltages referenced to device GND.
2. The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterized
on initial design release and upon design changes which would affect these characteristics.
3. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS
LIMITS
PARAMETER
SYMBOL
CONDITIONS
NOTES
TEMPERATURE
MIN
MAX
UNITS
IDD
VDD = 20V, VIN = VDD or GND
1, 4
+25oC
-
7.5
µA
1, 4
+25oC
-2.8
-0.2
V
VDD = 10V, ISS = -10µA
1, 4
+25oC
-
±1
V
VSS = 0V, IDD = 10µA
1, 4
+25oC
0.2
2.8
V
1, 4
+25oC
-
±1
V
1
+25oC
VOH >
VDD/2
VOL <
VDD/2
V
1, 2, 3, 4
+25oC
-
1.35 x
+25oC
Limit
ns
Supply Current
N Threshold Voltage
VNTH
N Threshold Voltage
Delta
∆VTN
P Threshold Voltage
VTP
P Threshold Voltage
Delta
∆VTP
Functional
F
VDD = 10V, ISS = -10µA
VSS = 0V, IDD = 10µA
VDD = 18V, VIN = VDD or GND
VDD = 3V, VIN = VDD or GND
Propagation Delay Time
TPHL
TPLH
VDD = 5V
3. See Table 2 for +25oC limit.
NOTES: 1. All voltages referenced to device GND.
2. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
4. Read and Record
TABLE 5. BURN-IN AND LIFE TEST DELTA PARAMETERS +25oC
PARAMETER
SYMBOL
DELTA LIMIT
Supply Current - MSI-1
IDD
± 0.2µA
Output Current (Sink)
IOL5
± 20% x Pre-Test Reading
IOH5A
± 20% x Pre-Test Reading
Output Current (Source)
TABLE 6. APPLICABLE SUBGROUPS
MIL-STD-883
METHOD
GROUP A SUBGROUPS
Initial Test (Pre Burn-In)
100% 5004
1, 7, 9
IDD, IOL5, IOH5A
Interim Test 1 (Post Burn-In)
100% 5004
1, 7, 9
IDD, IOL5, IOH5A
Interim Test 2 (Post Burn-In)
100% 5004
1, 7, 9
IDD, IOL5, IOH5A
100% 5004
1, 7, 9, Deltas
CONFORMANCE GROUP
PDA (Note 1)
7-1144
READ AND RECORD
Specifications CD4504BMS
TABLE 6. APPLICABLE SUBGROUPS (Continued)
MIL-STD-883
METHOD
GROUP A SUBGROUPS
100% 5004
1, 7, 9
100% 5004
1, 7, 9, Deltas
100% 5004
2, 3, 8A, 8B, 10, 11
Sample 5005
1, 2, 3, 7, 8A, 8B, 9, 10, 11
Subgroup B-5
Sample 5005
1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas
Subgroup B-6
Sample 5005
1, 7, 9
Sample 5005
1, 2, 3, 8A, 8B, 9
CONFORMANCE GROUP
Interim Test 3 (Post Burn-In)
PDA (Note 1)
Final Test
Group A
Group B
Group D
READ AND RECORD
IDD, IOL5, IOH5A
Subgroups 1, 2, 3, 9, 10, 11
Subgroups 1, 2 3
NOTE: 1. 5% Parameteric, 3% Functional; Cumulative for Static 1 and 2.
TABLE 7. TOTAL DOSE IRRADIATION
CONFORMANCE GROUPS
Group E Subgroup 2
TEST
READ AND RECORD
MIL-STD-883
METHOD
PRE-IRRAD
POST-IRRAD
PRE-IRRAD
POST-IRRAD
5005
1, 7, 9
Table 4
1, 9
Table 4
TABLE 8. BURN-IN AND IRRADIATION TEST CONNECTIONS
OSCILLATOR
FUNCTION
OPEN
GROUND
VDD
9V ± -0.5V
Static Burn-In 1
(Note 1)
2, 4, 6, 10, 12, 15
3, 5, 7-9, 11, 14
16
1, 13
Static Burn-In 2
(Note 1)
2, 4, 6, 10, 12, 15
8
16
1, 3, 5, 7, 9, 11,
13, 14
Dynamic BurnIn (Note 1, 3)
-
8
16
1, 2, 4, 6, 10, 12,
15
2, 4, 6, 10, 12, 15
8
1, 3, 5, 7, 9, 11, 13,
14, 16
Irradiation
(Note 2)
50kHz
25kHz
3, 5, 7, 9, 11, 14
NOTES:
1. Each pin except VCC, VDD and GND will have a series resistor of 10K ± 5%, VDD = 18V ± 0.5V
2. Each pin except VCC, VDD and GND will have a series resistor of 47K ± 5%; Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures,
VDD = 10V ± 0.5V
3. Oscillator output to be VDD/2.
7-1145
CD4504BMS
30
GATE-TO-SOURCE VOLTAGE (VGS) = 15V
25
20
15
10V
10
5
5V
0
AMBIENT TEMPERATURE (TA) = +25oC
15.0
GATE-TO-SOURCE VOLTAGE (VGS) = 15V
12.5
10.0
10V
7.5
5.0
2.5
5
10
15
DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
5V
0
5
10
15
DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
FIGURE 1. TYPICAL OUTPUT LOW (SINK) CURRENT
CHARACTERISTICS
FIGURE 2. MINIMUM OUTPUT LOW (SINK) CURRENT
CHARACTERISTICS
DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
-15
-10
-5
DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
-15
-10
-5
AMBIENT TEMPERATURE (TA) = +25oC
GATE-TO-SOURCE VOLTAGE (VGS) = -5V
0
-5
-10
-15
-10V
-20
-25
-15V
-30
-5
-10V
INPUT SWITCHING VOLTAGE (VSWITCH) (V)
INPUT SWITCHING VOLTAGE (VSWITCH) (V)
*VSWITCH
VSS
VCC = 15V
VDD
VOUT
6
50%
VSS
ENABLE = VCC
4
2
VCC = 5V
0
2.5
5
7.5
10
VCC = 10V
*VSWITCH = INPUT VOLTAGE
AT WHICH OUTPUT LEVEL
IS 50% OF VDD - VSS
12.5
15
17.5
-15
FIGURE 4. MINIMUM OUTPUT HIGH (SOURCE) CURRENT
CHARACTERISTICS
VCC
8
-10
-15V
AMBIENT TEMPERATURE (TA) = +25oC
VIN
0
GATE-TO-SOURCE VOLTAGE (VGS) = -5V
FIGURE 3. TYPICAL OUTPUT HIGH (SOURCE) CURRENT
CHARACTERISTICS
10
0
AMBIENT TEMPERATURE (TA) = +25oC
OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA)
0
OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA)
AMBIENT TEMPERATURE (TA) = +25oC
1/6 OUTPUT LOW (SINK) CURRENT (IOL) (mA)
1/6 OUTPUT LOW (SINK) CURRENT (IOL) (mA)
Typical Performance Characteristics
20
*VSWITCH = INPUT VOLTAGE
AT WHICH OUTPUT LEVEL
IS 50% OF VDD - VSS
VCC
10
VIN
VDD
6
VOUT
50%
VSS
4
ENABLE = VCC
2
AMBIENT TEMPERATURE (TA) = +25oC
0
2.5
SUPPLY VOLTAGE (VDD) (V)
*VSWITCH
VSS
8
5
7.5
10
12.5
15
17.5
20
SUPPLY VOLTAGE (VDD) (V)
FIGURE 5. TYPICAL INPUT SWITCHING AS A FUNCTION OF
HIGH LEVEL SUPPLY VOLTAGE (SELECT AT
VCC-CMOS MODE)
FIGURE 6. TYPICAL INPUT SWITCHING AS A FUNCTION OF
HIGH LEVEL SUPPLY VOLTAGE (SELECT AT
VSS-TTL MODE)
7-1146
CD4504BMS
SUPPLY VOLTAGE (VDD) (V)
Typical Performance Characteristics
25
(Continued)
AMBIENT TEMPERATURE
(TA) = +25oC
CMOS MODE =
RECOMMENDED
OPERATING
CONDITIONS
TTL MODE =
20
15
10
5
0
5
10
15
20
25
SUPPLY VOLTAGE (VCC) (V)
FIGURE 7. HIGH LEVEL SUPPLY VOLTAGE vs LOW LEVEL SUPPLY VOLTAGE
Chip Dimensions and Pad Layout
Dimensions in parenthesis are in millimeters and are
derived from the basic inch dimensions as indicated.
Grid graduations are in mils (10-3 inch).
METALLIZATION:
PASSIVATION:
Thickness: 11kÅ − 14kÅ,
AL.
10.4kÅ - 15.6kÅ, Silane
BOND PADS: 0.004 inches X 0.004 inches MIN
DIE THICKNESS: 0.0198 inches - 0.0218 inches
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Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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1147
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