REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes made in accordance with NOR 5962-R156-98. 98-07-31 Monica L. Poelking B Incorporate revision A. Update boilerplate to MIL-PRF-38535 requirements. Editorial changes throughout. – LTG 04-03-23 Thomas M. Hess C Update radiation features in section 1.5 and SEP table IB. Update boilerplate paragraphs to MIL-PRF-38535. Delete class M requirement throughout - MAA 14-09-09 Thomas M. Hess REV SHEET REV C C C C C C C C SHEET 15 16 17 18 19 20 21 22 REV STATUS REV C C C C C C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Rick C. Officer STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http://www.landandmaritime.dla.mil CHECKED BY Thanh V. Nguyen APPROVED BY THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE Monica L. Poelking DRAWING APPROVAL DATE MICROCIRCUIT, DIGITAL, RADIATION HARDENED, HIGH SPEED CMOS, 8-BIT SERIAL-IN/PARALLEL-OUT SHIFT REGISTER, MONOLITHIC SILICON 95-11-22 AMSC N/A REVISION LEVEL C SIZE CAGE CODE A 67268 SHEET DSCC FORM 2233 APR 97 5962-95785 1 OF 22 5962-E152-14 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability device class Q and space application device class V. A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 R 95785 Federal stock class designator \ RHA designator (see 1.2.1) 01 V X C Device type (see 1.2.2) Device class designator (see 1.2.3) Case outline (see 1.2.4) Lead finish (see 1.2.5) / \/ Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number 01 Circuit function HCS164 Radiation hardened, SOS, high speed CMOS, 8-bit serial-in/parallel-out Shift register 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style C CDIP2-T14 14 Dual-in-line X CDFP3-F14 14 Flat pack 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-95785 A REVISION LEVEL C SHEET 2 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VCC)......................................................................................... DC input voltage range (VIN) ....................................................................................... DC output voltage range (VOUT) .................................................................................. DC input current, any one input (IIN) ........................................................................... DC output current, any one output (IOUT) .................................................................... Storage temperature range (TSTG) .............................................................................. Lead temperature (soldering, 10 seconds) ................................................................. Thermal resistance, junction-to-case (θJC): Case C .................................................................................................................... Case X ..................................................................................................................... Thermal resistance, junction-to-ambient (θJA): Case C .................................................................................................................... Case X ..................................................................................................................... Junction temperature (TJ) ........................................................................................... Maximum power dissipation at TA = +125°C (PD): 4/ Case C .................................................................................................................... Case X ..................................................................................................................... -0.5 V dc to +7.0 V dc -0.5 V dc to VCC + 0.5 V dc -0.5 V dc to VCC + 0.5 V dc ±10 mA ±25 mA -65°C to +150°C +265°C 24°C/W 30°C/W 74°C/W 116°C/W +175°C 0.68 W 0.43 W 1.4 Recommended operating conditions. 2/ 3/ Supply voltage range (VCC)......................................................................................... Case operating temperature range (TC)...................................................................... Input voltage range (VIN)............................................................................................. Output voltage range (VOUT) ....................................................................................... Maximum low level input voltage (VIL) ........................................................................ Minimum high level input voltage (VIH) ....................................................................... Maximum input rise and fall time at VCC = 4.5 V (tr, tf) ................................................ 1.5 Radiation features. +4.5 V dc to +5.5 V dc -55°C to +125°C 0 V to VCC 0 V to VCC 30% of VCC 70% of VCC 500 ns 5/ Maximum total dose available (dose rate = 50 – 300 rads (Si)/s) ........... 200 krads(Si) Single event phenomenon (SEP): 2 No SEL occurs at effective LET (see 4.4.4.2) ....................................... ≤ 100 MeV/(mg/cm ) 2 No SEU occurs at effective LET (see 4.4.4.2) ....................................... ≤ 100 MeV/(mg/cm ) 1/ 2/ 3/ 4/ 5/ 6/ 7/ 6/ 7 6/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. Unless otherwise specified, all voltages are referenced to GND. The limits for the parameters specified herein shall apply over the full specified VCC range and case temperature range of -55°C to +125°C unless otherwise noted. If device power exceeds package dissipation capability, provide heat sinking or derate linearly (the derating is based on θJA) at the following rate: Case C ....................................................................................................................... 13.5 mW/°C Case X ....................................................................................................................... 8.6 mW/°C Radiation testing is performed on the standard evaluation circuit. Limits are guaranteed by design or process but not production tested unless specified by the customer through the purchase order or contract. Devices use Silicon on Sapphire (SOS) technology and latch-up is physically not possible. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-95785 A REVISION LEVEL C SHEET 3 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 MIL-STD-1835 - Test Method Standard Microcircuits. Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 MIL-HDBK-780 - List of Standard Microcircuit Drawings. Standard Microcircuit Drawings. (Copies of these documents are available online at http://quicksearch.dla.mil/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of the documents are the issues of the documents cited in the solicitation or contract. ASTM INTERNATIONAL (ASTM) ASTM F1192 - Standard Guide for the Measurement of Single Event Phenomena (SEP) Induced by Heavy Ion Irradiation of Semiconductor Devices. (Copies of these documents are available online at http://www.astm.org or from: ASTM International, 100 Barr Harbor Drive, P.O. Box C700, West Conshohocken, PA 19428-2959.) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. 3.1.1 Microcircuit die. For requirements for microcircuit die, see appendix A to this document. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-95785 A REVISION LEVEL C SHEET 4 3.2.6 Radiation exposure circuit. The radiation exposure circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing and acquiring activity upon request. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be marked as listed in MIL-HDBK-103. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the "5962-" on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a "QML" or "Q" as required in MIL-PRF-38535. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). The certificate of compliance submitted to DLA Land and Maritime -VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturer's product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 shall be provided with each lot of microcircuits delivered to this drawing. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-95785 A REVISION LEVEL C SHEET 5 TABLE IA. Electrical performance characteristics. Test Symbol Test conditions 1/ -55°C ≤ TC ≤ +125°C unless otherwise specified Device type VCC Group A subgroups Limits 2/ All 4.5 V 1, 2, 3 4.40 1 4.40 1, 2, 3 5.40 1 5.40 Min High level output voltage VOH For all inputs affecting output under test VIN = 3.15 V or 1.35 V For all other inputs VIN = VCC or GND IOH = -50 µA M, D, P, L, R 3/ For all inputs affecting output under test VIN = 3.85 V or 1.65 V For all other inputs VIN = VCC or GND IOH = -50 µA M, D, P, L, R 3/ Low level output voltage VOL For all inputs affecting output under test VIN = 3.15 V or 1.35 V For all other inputs VIN = VCC or GND IOL = 50 µA M, D, P, L, R 3/ For all inputs affecting output under test VIN = 3.85 V or 1.65 V For all other inputs VIN = VCC or GND IOL = 50 µA M, D, P, L, R 3/ Input current high IIH For input under test, VIN = 5.5 V For all other inputs VIN = VCC or GND M, D, P, L, R 3/ Input current low IIL For input under test, VIN = GND For all other inputs VIN = VCC or GND M, D, P, L, R 3/ All All 5.5 V All All 4.5 V All All 5.5 V All All 5.5 V All All All 5.5 V Unit Max V 1, 2, 3 0.1 1 0.1 1, 2, 3 0.1 1 0.1 1 +0.5 2, 3 +5.0 1 +5.0 1 -0.5 2, 3 -5.0 1 -5.0 V µA µA See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-95785 A REVISION LEVEL C SHEET 6 TABLE IA. Electrical performance characteristics - Continued. Test Symbol Output current high (Source) IOH Test conditions 1/ -55°C ≤ TC ≤ +125°C unless otherwise specified Limits 2/ Device type VCC Group A subgroups All 4.5 V 1 -4.8 2, 3 -4.0 1 -4.0 1 4.8 2, 3 4.0 1 4.0 Min For all inputs affecting output under test VIN = 4.5 V or 0.0 V For all other inputs VIN = VCC or GND VOUT = 4.1 V M, D, P, L, R 3/ Output current low (Sink) IOL For all inputs affecting output under test VIN = 4.5 V or 0.0 V For all other inputs VIN = VCC or GND VOUT = 0.4 V M, D, P, L, R 3/ Quiescent supply current ICC VIN = VCC or GND M, D, P, L, R 3/ Input capacitance CIN Power dissipation capacitance 4/ CPD Functional test 5/ VIH = 5.0 V VIL = 0.0 V f = 1 MHz, see 4.4.1c VIH = 3.15 V, VIL = 1.35 V See 4.4.1b M, D, P, L, R 3/ Propagation delay time, CP or Qn 6/ tPHL1 All All All All 5.5 V All All tPLH1 CL = 50 pF Propagation delay time, MR to Qn 6/ tPHL2 750 750 5.0 V 4 10 pF 5.0 V 4 135 pF 5, 6 165 4.5 V 4.5 V All 4.5 V All All CL = 50 pF RL = 500Ω See figure 4 M, D, P, L, R 3/ All µA 1 RL = 500Ω See figure 4 M, D, P, L, R 3/ mA 2, 3 All All mA 40.0 RL = 500Ω See figure 4 M, D, P, L, R 3/ Max 1 All All CL = 50 pF 4.5 V Unit 4.5 V 7, 8 L H 7 L H 9 2.0 32.0 10, 11 2.0 37.0 9 2.0 37.0 9 2.0 32.0 10, 11 2.0 37.0 9 2.0 37.0 9 2.0 32.0 10, 11 2.0 37.0 9 2.0 37.0 ns ns See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-95785 A REVISION LEVEL C SHEET 7 TABLE IA. Electrical performance characteristics - Continued. Test Symbol Test conditions 1/ -55°C ≤ TC ≤ +125°C unless otherwise specified Limits 2/ Device type VCC Group A subgroups All 4.5 V 9 15.0 10, 11 22.0 Min Output transition time 7/ tTHL, tTLH Clock pulse width, low or high 7/ tW1 MR pulse width, low 7/ tW2 Setup time, high or low, DSn to CP 7/ ts Hold time, high or low, DSn to CP 7/ th All 4.5 V Recovery time, MR to CP 7/ tREC All 4.5 V Maximum clock frequency 7/ fMAX CL = 50 pF RL = 500Ω See figure 4 All All All All 4.5 V 4.5 V 4.5 V 4.5 V 9 16.0 10, 11 24.0 9 12.0 10, 11 18.0 9 12.0 10, 11 18.0 9 4.0 10, 11 4.0 9 16.0 10, 11 24.0 9 30.0 10, 11 20.0 Unit Max ns ns ns ns ns ns MHz 1/ Each input/output, as applicable, shall be tested at the specified temperature, for the specified limits, to the tests in table IA herein. Output terminals not designated shall be high level logic, low level logic, or open, except for the ICC test, the output terminals shall be open. When performing the ICC test, the current meter shall be placed in the circuit such that all current flows through the meter. 2/ For negative and positive voltage and current values, the sign designates the potential difference in reference to GND and the direction of current flow, respectively; and the absolute value of the magnitude, not the sign, is relative to the minimum and maximum limits, as applicable, listed herein. 3/ Devices supplied to this drawing meet all levels M, D, P, L, and R of irradiation. However, these devices are only tested at the 'R' level. Pre and post irradiation values are identical unless otherwise specified in table IA. When performing post irradiation electrical measurements for any RHA level, TA = +25°C. 4/ Power dissipation capacitance (CPD) determines both the power consumption (PD) and current consumption (IS). Where PD = (CPD + CL) (VCC x VCC)f + (ICC x VCC) IS = (CPD + CL) VCCf + ICC f is the frequency of the input signal. 5/ The test vectors used to verify the truth table shall, at a minimum, test all functions of each input and output. All possible input to output logic patterns per function shall be guaranteed, if not tested, to the truth table in figure 2 herein. For VOUT measurements, L ≤ 0.5 V and H ≥ 4.0 V. 6/ AC limits at VCC = 5.5 V are equal to the limits at VCC = 4.5 V. For propagation delay tests, all paths must be tested. 7/ This parameter is guaranteed but not tested. This parameter is characterized upon initial design or process changes which affect this characteristic. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-95785 A REVISION LEVEL C SHEET 8 TABLE IB. SEP test limits. 1/ 2/ 3/ Device type VDD = 4.5 V No SEU occurs at effective LET Bias VDD = 5.5 V for SEL test 3/ No SEL occurs at effective LET 01 LET ≤ 100 MeV/(mg/cm ) LET ≤ 100 MeV/(mg/cm ) 1/ 2/ 3/ 2 2 For SEP test conditions, see 4.4.4.2 herein. Technology characterization and model verification supplemented by in-line data may be used in lieu of end-of-line testing. Test plan must be approved by TRB and qualifying activity. Tested for worst case operating temperature, TA = +25°C ± 10°C for SEU and for latch up TA = +125°C ± 10°C. Device type All Case outlines C and X Terminal number Terminal symbol 1 2 3 4 5 6 7 8 9 10 11 12 13 14 DS1 DS2 Q0 Q1 Q2 Q3 GND CP MR Q4 Q5 Q6 Q7 VCC FIGURE 1. Terminal connections. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-95785 A REVISION LEVEL C SHEET 9 Operating mode Inputs Outputs MR CP DS1 DS2 Q0 Q1-Q7 Reset (clear) L X X X L L-L Shift H ↑ l l L q0-q6 H ↑ l h L q0-q6 H ↑ h l L q0-q6 H ↑ h h H q0-q6 H = High voltage level. h = High voltage level one setup time prior to the low-to-high clock transition. L = Low voltage level. l = Low voltage level one setup time prior to the low-to-high clock transition. X = Irrelevant. ↑ = Low-to-high clock transition. qn = Lower case letters indicate the state of the referenced input (or output) one setup time prior to the low-to-high clock transition. FIGURE 2. Truth table. FIGURE 3. Logic diagram. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-95785 A REVISION LEVEL C SHEET 10 FIGURE 4. Switching waveforms and test circuit. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-95785 A REVISION LEVEL C SHEET 11 NOTES: 1. CL = 50 pF minimum or equivalent (includes test jig and probe capacitance). 2. RL = 500Ω or equivalent. 3. Input signal from pulse generator: VIN = 0.0 V to VCC; PRR ≤ 10 MHz; tr ≤ 3.0 ns; tf ≤ 3.0 ns; tr and tf shall be measured from 10% VCC to 90% VCC and from 90% VCC to 10% VCC, respectively. FIGURE 4. Switching waveforms and test circuit - Continued. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-95785 A REVISION LEVEL C SHEET 12 4. VERIFICATION 4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with MIL-PRF-38535 or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. 4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted on all devices prior to qualification and technology conformance inspection. 4.2.1 Additional criteria for device classes Q and V. a. The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under document revision level control of the device manufacturer's Technology Review Board (TRB) in accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1015 of MIL-STD-883. b. Interim and final electrical test parameters shall be as specified in table IIA herein. c. Additional screening for device class V beyond the requirements of device class Q shall be as specified in MIL-PRF-38535, appendix B. 4.3 Qualification inspection for device classes Q and V. Qualification inspection for device classes Q and V shall be in accordance with MIL-PRF-38535. Inspections to be performed shall be those specified in MIL-PRF-38535 and herein for groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.4). 4.4 Conformance inspection. Technology conformance inspection for classes Q and V shall be in accordance with MIL-PRF-38535 including groups A, B, C, D, and E inspections and as specified herein except where option 2 of MIL-PRF-38535 permits alternate in-line control testing (see 4.4.1 through 4.4.4). 4.4.1 Group A inspection. a. Tests shall be as specified in table IIA herein. b. For device classes Q and V, subgroups 7 and 8 shall include verifying the functionality of the device; these tests shall have been fault graded in accordance with MIL-STD-883, test method 5012 (see 1.5 herein). c. Subgroup 4, 5, and 6 (CIN and CPD measurement) shall be measured only for the initial qualification and after process or design changes which may affect capacitance. CIN shall be measured between the designated terminal and GND at a frequency of 1 MHz. For CIN and CPD the tests shall be sufficient to validate the limits defined in table I herein. 4.4.2 Group C inspection. The group C inspection end-point electrical parameters shall be as specified in table II herein 4.4.2.1 Additional criteria for device classes Q and V. The steady-state life test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF38535. The test circuit shall be maintained under document revision level control by the device manufacturer's TRB in accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1005 of MIL-STD-883. 4.4.3 Group D inspection. The group D inspection end-point electrical parameters shall be as specified in table II herein. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-95785 A REVISION LEVEL C SHEET 13 TABLE IIA. Electrical test requirements. Test requirements Subgroups (in accordance with MIL-PRF-38535,table III) Device class Q Device class V 1,7,9 1,7,9 Final electrical parameters (see 4.2) 1,2,3,7,8,9,10,11 1/ 1,2,3,7,8,9,10,11 2/ 3/ Group A test requirements (see 4.4) 1,2,3,4,5,6,7,8,9,10,11 1,2,3,4,5,6,7,8,9, 10,11 Group C end-point electrical parameters (see 4.4) 1,2,3,7,8,9,10,11 1,2,3,7,8,9,10,11 3/ Group D end-point electrical parameters (see 4.4) 1,7,9 1,7,9 Group E end-point electrical parameters (see 4.4) 1,7,9 1,7,9 Interim electrical parameters (see 4.2) 1/ PDA applies to subgroups 1 and 7. 2/ PDA applies to subgroups 1, 7, 9, and deltas. 3/ Delta limits, as specified in table IIB, shall be required where specified, and the delta limits shall be completed with reference to the zero hour electrical parameters (see table I). TABLE IIB. Burn-in and operating life test, Delta parameters (+25°C). Parameter 1/ Symbol Delta Limits Supply current ICC +12 µA Output current (sink) IOL -15% Output current (source) IOH -15% 1/ These parameters shall be recorded before and after the required burn-in and life test to determine delta limits. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-95785 A REVISION LEVEL C SHEET 14 4.4.4 Group E inspection. Group E inspection is required only for parts intended to be marked as radiation hardness assured (see 3.5 herein). RHA levels for device classes Q and V shall be as specified in MIL-PRF-38535. End-point electrical parameters shall be as specified in table IIA herein. 4.4.4.1 Total dose irradiation testing. Total dose irradiation testing shall be performed in accordance with MIL-STD-883 method 1019, condition A, and as specified herein. 4.4.4.1.1 Accelerated annealing test. Accelerated annealing tests shall be performed on all devices requiring a RHA level greater than 5k rads (Si). The post-anneal end-point electrical parameter limits shall be as specified in table IA herein and shall be the pre-irradiation end-point electrical parameter limit at 25°C ±5°C. Testing shall be performed at initial qualification and after any design or process changes which may affect the RHA response of the device. 4.4.4.2 Single event phenomena (SEP). When specified in the purchase order or contract, SEP testing shall be performed on class V devices. SEP testing shall be performed on the Standard Evaluation Circuit (SEC) or alternate SEP test vehicle as approved by the qualifying activity at initial qualification and after any design or process changes which may affect the upset or latchup characteristics. Test four devices with zero failures. ASTM F1192 may be used as a guideline when performing SEP testing. The test conditions for SEP are as follows: a. The ion beam angle of incidence shall be between normal to the die surface and 60° to the normal, inclusive (i.e. 0° ≤ angle ≤ 60°). No shadowing of the ion beam due to fixturing or package related affects is allowed. b. The fluence shall be ≥ 100 errors or ≥ 10 ions/cm . c. The flux shall be between 10 and 10 ions/cm /s. The cross-section shall be verified to be flux independent by measuring the cross-section at two flux rates which differ by at least an order of magnitude. d. The particle range shall be ≥ 20 micron in silicon. e. The test temperature shall be +25°C for the upset measurements and the maximum rated operating temperature ±10°C for the latchup measurements. f. Bias conditions shall be defined by the manufacturer for the latchup measurements. g. For SEP test limits, see table IB herein. 7 2 STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 6 2 2 SIZE 5962-95785 A REVISION LEVEL C SHEET 15 4.5 Methods of inspection. Methods of inspection shall be as specified as follows: 4.5.1 Voltage and current. Unless otherwise specified, all voltages given are referenced to the microcircuit GND terminal. Currents given are conventional current and positive when flowing into the referenced terminal. 5. PACKAGING 5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535 for device classes Q and V. 6. NOTES 6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes. 6.1.1 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractor-prepared specification or drawing. 6.1.2 Substitutability. Device class Q devices will replace device class M devices. 6.2 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal. 6.3 Record of users. Military and industrial users should inform DLA Land and Maritime when a system application requires configuration control and which SMD's are applicable to that system. DLA Land and Maritime will maintain a record of users and this list will be used for coordination and distribution of changes to the drawings. Users of drawings covering microelectronic devices (FSC 5962) should contact DLA Land and Maritime -VA, telephone (614) 692-8108. 6.4 Comments. Comments on this drawing should be directed to DLA Land and Maritime -VA, Columbus, Ohio 432183990, or telephone (614) 692-0547. 6.5 Abbreviations, symbols, and definitions. The abbreviations, symbols, and definitions used herein are defined in MIL-PRF-38535 and MIL-HDBK-1331. 6.6 Sources of supply. 6.6.1 Sources of supply for device classes Q and V. Sources of supply for device classes Q and V are listed in QML-38535. The vendors listed in QML-38535 have submitted a certificate of compliance (see 3.6 herein) to DLA Land and Maritime -VA and have agreed to this drawing. 6.7 Additional information. A copy of the following additional data shall be maintained and available from the device manufacturer: a. RHA levels test conditions (SEP). b. Number of upsets (SEU). c. Number of transients (SET). d. Occurrence of latch-up (SEL). STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-95785 A REVISION LEVEL C SHEET 16 APPENDIX A APPENDIX A FORMS A PART OF SMD 5962-95785 A.1 SCOPE A.1.1 Scope. This appendix establishes minimum requirements for microcircuit die to be supplied under the Qualified Manufacturers List (QML) Program. QML microcircuit die meeting the requirements of MIL-PRF-38535 and the manufacturers approved QM plan for use in monolithic microcircuits, multi-chip modules (MCMs), hybrids, electronic modules, or devices using chip and wire designs in accordance with MIL-PRF-38534 are specified herein. Two product assurance classes consisting of military high reliability (device class Q) and space application (device class V) are reflected in the Part or Identification Number (PIN). When available, a choice of Radiation Hardiness Assurance (RHA) levels are reflected in the PIN. A.1.2 PIN. The PIN is as shown in the following example: 5962 R Federal stock class designator \ RHA designator (see A.1.2.1) 95785 01 V 9 A Device type (see A.1.2.2) Device class designator (see A.1.2.3) Die code Die details (see A.1.2.4) / \/ Drawing number A.1.2.1 RHA designator. Device classes Q and V RHA identified die meet the MIL-PRF-38535 specified RHA levels. A dash (-) indicates a non-RHA die. A.1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number 01 Circuit function HCS164 Radiation hardened, SOS, high speed CMOS, 8-bit serial-in/parallel-out shift register A.1.2.3 Device class designator. Device class Q or V STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 Device requirements documentation Certification and qualification to the die requirements of MIL-PRF-38535. SIZE 5962-95785 A REVISION LEVEL C SHEET 17 APPENDIX A APPENDIX A FORMS A PART OF SMD 5962-95785 A.1.2.4 Die details. The die details designation is a unique letter which designates the die's physical dimensions, bonding pad location(s) and related electrical function(s), interface materials, and other assembly related information, for each product and variant supplied to this appendix. A.1.2.4.1 Die physical dimensions. Die type Figure number 01 A-1 A.1.2.4.2 Die bonding pad locations and electrical functions. Die type Figure number 01 A-1 A.1.2.4.3 Interface materials. Die type Figure number 01 A-1 A.1.2.4.4 Assembly related information. Die type Figure number 01 A-1 A.1.3 Absolute maximum ratings. See paragraph 1.3 herein for details. A.1.4 Recommended operating conditions. See paragraph 1.4 herein for details. A.2 APPLICABLE DOCUMENTS. A.2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARD MIL-STD-883 - Test Method Standard Microcircuits. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http://quicksearch.dla.mil/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) A.2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-95785 A REVISION LEVEL C SHEET 18 APPENDIX A APPENDIX A FORMS A PART OF SMD 5962-95785 A.3 REQUIREMENTS A.3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturer’s Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. A.3.2 Design, construction and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and the manufacturer’s QM plan, for device classes Q and V and herein. A.3.2.1 Die physical dimensions. The die physical dimensions shall be as specified in A.1.2.4.1 and on figure A-1. A.3.2.2 Die bonding pad locations and electrical functions. The die bonding pad locations and electrical functions shall be as specified in A.1.2.4.2 and on figure A-1. A.3.2.3 Interface materials. The interface materials for the die shall be as specified in A.1.2.4.3 and on figure A-1. A.3.2.4 Assembly related information. The assembly related information shall be as specified in A.1.2.4.4 and on figure A1. A.3.2.5 Truth table. The truth table shall be as defined in paragraph 3.2.3 herein. A.3.2.6 Radiation exposure circuit. The radiation exposure circuit shall be as defined in paragraph 3.2.6 herein. A.3.3 Electrical performance characteristics and post-irradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and post-irradiation parameter limits are as specified in table I of the body of this document. A.3.4 Electrical test requirements. The wafer probe test requirements shall include functional and parametric testing sufficient to make the packaged die capable of meeting the electrical performance requirements in table I. A.3.5 Marking. As a minimum, each unique lot of die, loaded in single or multiple stack of carriers, for shipment to a customer, shall be identified with the wafer lot number, the certification mark, the manufacturer’s identification and the PIN listed in A.1.2 herein. The certification mark shall be a “QML” or “Q” as required by MIL-PRF-38535. A.3.6 Certification of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see A.6.4 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this appendix shall affirm that the manufacturer’s product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and the requirements herein. A.3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 shall be provided with each lot of microcircuit die delivered to this drawing. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-95785 A REVISION LEVEL C SHEET 19 APPENDIX A APPENDIX A FORMS A PART OF SMD 5962-95785 A.4 VERIFICATION A.4.1 Sampling and inspection. For device classes Q and V, die sampling and inspection procedures shall be in accordance with MIL-PRF-38535 or as modified in the device manufacturer’s Quality Management (QM) plan. The modifications in the QM plan shall not affect the form, fit, or function as described herein. A.4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and as defined in the manufacturer’s QM plan. As a minimum it shall consist of: a) Wafer Lot acceptance for Class V product using the criteria defined within MIL-STD-883 TM 5007. b) 100% wafer probe (see paragraph 30.4). c) 100% internal visual inspection to the applicable class Q or V criteria defined within MIL-STD-883 TM2010 or the alternate procedures allowed within MIL-STD-883 TM5004. A.4.3 Conformance inspection. A.4.3.1 Group E inspection. Group E inspection is required only for parts intended to be identified as radiation assured (see 30.5 herein). RHA levels for device classes Q and V shall be as specified in MIL-PRF-38535. End point electrical testing of packaged die shall be as specified in table IIA herein. Group E tests and conditions are as specified within paragraphs 4.4.4.1, 4.4.4.1.1, 4.4.4.2, 4.4.4.3, and 4.4.4.4. A.5 DIE CARRIER A.5.1 Die carrier requirements. The requirements for the die carrier shall be in accordance with the manufacturer’s QM plan or as specified in the purchase order by the acquiring activity. The die carrier shall provide adequate physical, mechanical and electrostatic protection. A.6 NOTES A.6.1 Intended use. Microcircuit die conforming to this drawing are intended for use in microcircuits built in accordance with MIL-PRF-38535 or MIL-PRF-38534 for government microcircuit applications (original equipment), design applications, and logistics purposes. A.6.2 Comments. Comments on this appendix should be directed to DLA Land and Maritime-VA, Columbus, Ohio, 432183990 or telephone (614) 692-0547. A.6.3 Abbreviations, symbols, and definitions. The abbreviations, symbols, and definitions used herein are defined in MIL-PRF-38535 and MIL-HDBK-1331. A.6.4 Sources of supply for device classes Q and V. Sources of supply for device classes Q and V are listed in QML-38535. The vendors listed within QML-38535 have submitted a certificate of compliance (see A.3.6 herein) to DLA Land and MaritimeVA and have agreed to this drawing. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-95785 A REVISION LEVEL C SHEET 20 APPENDIX A APPENDIX A FORMS A PART OF SMD 5962-95785 The following metallization diagram supplies the locations and electrical functions of the bonding pads. The internal metallization layout and alphanumeric information contained within this diagram may or may not represent the actual circuit defined by this SMD. NOTE: Pad numbers reflect terminal numbers when placed in case outlines C, X (see figure 1). FIGURE A-1 Die bonding locations and electrical functions. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-95785 A REVISION LEVEL C SHEET 21 APPENDIX A APPENDIX A FORMS A PART OF SMD 5962-95785 Die physical dimensions. Die size: 2380 x 2410 microns. Die thickness: 21 ±2 mils. Interface materials. Top metallization: SiAl Thickness: 11.0kÅ ±1kÅ Backside metallization: None Glassivation Type: SiO2 Thickness: 13kÅ ±2.6kÅ Substrate: Silicon on sapphire (SOS) Assembly related information. Substrate potential: Insulator Special assembly instructions: Bond pad #14 (VCC) first FIGURE A-1 Die bonding locations and electrical functions – Continued. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-95785 A REVISION LEVEL C SHEET 22 STANDARD MICROCIRCUIT DRAWING BULLETIN DATE: 14-09-09 Approved sources of supply for SMD 5962-95785 are listed below for immediate acquisition information only and shall be added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be revised to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a certificate of compliance has been submitted to and accepted by DLA Land and Maritime-VA. This information bulletin is superseded by the next dated revision of MIL-HDBK-103 and QML-38535. DLA Land and Maritime maintains an online database of all current sources of supply at http://www.landandmaritime.dla.mil/Programs/Smcr/ Standard microcircuit drawing PIN 1/ Vendor CAGE number Vendor similar PIN 2/ 5962R9578501VCC 34371 HCS164DMSR 5962R9578501VXC 34371 HCS164KMSR 5962R9578501V9A 3/ HCS164HMSR 1/ The lead finish shown for each PIN representing a hermetic package is the most readily available from the manufacturer listed for that part. If the desired lead finish is not listed contact the vendor to determine its availability. 2/ Caution. Do not use this number for item acquisition. Items acquired to this number may not satisfy the performance requirements of this drawing. 3/ Not available from an approved source of supply. Vendor CAGE number 34371 Vendor name and address Intersil Corporation 1001 Murphy Ranch Road Milpitas, CA 95035-6803 The information contained herein is disseminated for convenience only and the Government assumes no liability whatsoever for any inaccuracies in the information bulletin.