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Data Sheet
May 28, 2009
ISL54230
FN6825.2
Octal Multiprotocol Switch
Features
The Intersil ISL54230 is a multiprotocol Quad Double-Pole
Double-Throw (DPDT) analog switch that can operate from a
single +2.0V to +5.5V supply. It contains eight SPDT (Single
Pole/Double Throw) switches configured into four DPDT
blocks. Each DPDT block is independently controlled by a
logic input for Normally Open (NO) or Normally Closed (NC)
switch configuration.The part is designed for switching or
routing a combination of USB High-Speed, USB Full-Speed,
digital, and analog signals in portable battery powered
products.
• High Speed (480Mbps) and Full Speed (12Mbps)
Signaling Capability per USB 2.0
The digital inputs are 1.8V logic compatible when operated
with a 2.7V to 3.6V supply. The ISL54230 has two switch
enable pins to disable certain blocks of the switch. The
ISL54230 is available in a 36 ball 2.5mmx2.5mm WLCSP or a
32 Ld TQFN 5mmx5mm package. It operates over a
temperature range of -40 to +85°C.
• Two DPDT USB 2.0 FS/HS Capable Switches
• Compliant with USB 2.0 Short Circuit and Overvoltage
Requirements Without Additional External Components
• 1.8V Logic Compatible (+2.7V to +3.6V Supply)
• Switch Terminals Overvoltage Protected Up to +5.5V
• Enable Pin to disable Switch Blocks
• Two DPDT 1/6Switches
• USB Switch Low ON Capacitance. . . . . . . . . . . . . . . 12pF
• USB Switch Low ON-Resistance. . . . . . . . . . . . . . . . . 6
• Single Supply Operation (VDD) . . . . . . . . . . +2.0V to +5.5V
• Low Power Consumption (PD) . . . . . . . . . . . . . . . . . . 1µA
Applications
• Low I+ Current when VINH is not at the V+ Rail
• Cellular/Mobile Phones
• Available in 36 Ball WLCSP and 32 Ld 5mmx5mm TQFN
Package
• PDAs
• Pb-Free (RoHS Compliant)
• Digital Cameras and Camcorders
Ordering Information
• USB/UART/Audio Switching
Block Diagram
VDD
COM1A
IN1
COM1B
PART
PART NUMBER MARKING
NO1A
1
NC1A
NO1B
6
NC1B
COM2A
NO2A
HS_USB
NC2A
IN2
COM2B
NO2B
HS_USB
NC2B
COM3A
NO3A
HS_USB
NC3A
IN3
COM3B
HS_USB
COM4A
1
NO3B
NC3B
NO4A
NC4A
IN4
COM4B
OE1
OE2
NO4B
6
NC4B
GND
1
ISL54230IRTZ
(Note 1)
TEMP.
RANGE
(°C)
PACKAGE
(Pb-Free)
PKG.
DWG. #
54230 IRTZ -40 to +85 32 Ld 5x5 TQFN
L32.5x5A
ISL54230IRTZ-T* 54230 IRTZ -40 to +85 32 Ld 5x5 TQFN
(Note 1)
L32.5x5A
ISL54230IIZ-T*
(Note 2)
W6x6.36
230Z
-40 to +85 36 Ball 6x6 Array
WLCSP
*Please refer to TB347 for details on reel specifications.
NOTES:
1. These Intersil Pb-free plastic packaged products employ special Pbfree material sets, molding compounds/die attach materials, and
100% matte tin plate plus anneal (e3 termination finish, which is
RoHS compliant and compatible with both SnPb and Pb-free
soldering operations). Intersil Pb-free products are MSL classified
at Pb-free peak reflow temperatures that meet or exceed the Pbfree requirements of IPC/JEDEC J STD-020.
2. These Intersil Pb-free WLCSP and BGA packaged products
products employ special Pb-free material sets; molding
compounds/die attach materials and SnAgCu - e1 solder ball
terminals, which are RoHS compliant and compatible with both
SnPb and Pb-free soldering operations. Intersil Pb-free WLCSP
and BGA packaged products are MSL classified at Pb-free peak
reflow temperatures that meet or exceed the Pb-free requirements
of IPC/JEDEC J STD-020.
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas LLC.
Copyright Intersil Americas LLC. 2009. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
ISL54230
Pinouts
ISL54230
(36 BALL 6X6 ARRAY WLCSP)
TOP VIEW
*Columns A, B, C = Left Plane
*Columns D, E, F = Right Plane
*Refer to OE Control
Truth Table, pg. 3
A
B
C
D
E
F
1
COM
2A
COM
2B
COM
1B
COM
4B
COM
3B
COM
3A
2
COM
1A
NC
1A
OE1
OE2
NC
4A
COM
4A
3
NO
1A
NC
2A
N.C.
N.C.
NC
3A
NO
4A
4
NO
2A
NC
2B
N.C.
N.C.
NC
3B
NO
3A
5
NO
2B
NC
1B
VDD
GND
NC
4B
NO
3B
6
NO
1B
IN1
IN2
IN3
IN4
NO
4B
HS USB
Switches 2A and 3A
HS USB
Switches 2B and 3B
6
Switches 1B and 4B
1
Switches 1A and 4A
2
COM_3A
COM_3B
OE2
COM_4B
COM_1B
OE1
COM_2B
COM_2A
ISL54230
(32 LD 5X5 TQFN)
TOP VIEW
32
31
30
29
28
27
26
25
NC_4A
1
24
NC_1A
COM_4A
2
23
COM_1A
NC_3A
3
22
NC_2A
NO_4A
4
21
NO_1A
NO_3A
5
20
NO_2A
NC_3B
6
19
NC_2B
NO_3B
7
18
NO_2B
NC_4B
8
17
NC_1B
9
10
11
12
13
14
15
16
IN4
GND
IN3
IN2
VDD
IN1
NO_1B
*RIGHT PLANE
NO_4B
*LEFT PLANE
FN6825.2
May 28, 2009
ISL54230
Pinouts
SWITCHES 1 AND 2
SWITCHES 3 AND 4
VDD
1 SWITCH
COM1A
COM2B
NO1B
6 SWITCH
NC3B
NO2B
USB HS SWITCH
NO4A
1 SWITCH
COM4A
NC2A
NO3B
USB HS SWITCH
NO2A
USB HS SWITCH
IN1
IN2
OE1
OE2
NC3A
COM3B
NC1B
NO3A
USB HS SWITCH
COM3A
NC1A
COM1B
COM2A
VDD
NO1A
NC4A
COM4B
6 SWITCH
IN3
IN4
OE1
OE2
LOGIC
CONTROL
NO4B
NC4B
NC2B
LOGIC
CONTROL
GND
GND
NOTE: Switches shown in Logic “0” position. Logic “0” when INx
<0.5V
Input Select Truth Table
OE Control Truth Table
INx
NOx
NCx
0
OFF
ON
1
ON
OFF
Logic “0” when  0.5V, Logic “1” when  1.4V with a 2.7V to 3.6V
Supply.
SWITCH
ON
SWITCH
OFF
MODE,
WLCSP
MODE,
TQFN
0
COM2x,
COM3x
COM1x,
COM4x
USB
USB
0
1
COM3x,
COM4x
COM1x,
COM2x
Right
Plane
Left
Plane
1
0
COM1x,
COM2x
COM3x,
COM4x
Left
Plane
Right
Plane
1
1
ALL
NONE
All On
All On
OE1
OE2
0
Logic “0” when  0.5V, Logic “1” when  1.4V with a 2.7V to 3.6V
Supply.
Pin Descriptions
PIN NAME
COLUMN-ROW
WLCSP
PIN NUMBER
TQFN
VDD
C5
14
Power Supply Pin
GND
D5
11
Ground Connection
OE1
C2
27
Switch Enable Control 1
OE2
D2
30
Switch Enable Control 2
IN1
B6
15
Switch Input Select 1
IN2
C6
13
Switch Input Select 2
IN3
D6
12
Switch Input Select 3
IN4
E6
10
Switch Input Select 4
COM_1A
A2
23
HS Switch Common 1A
COM_1B
C1
28
HS Switch Common 1B
3
DESCRIPTION
FN6825.2
May 28, 2009
ISL54230
Pin Descriptions (Continued)
PIN NAME
COLUMN-ROW
WLCSP
PIN NUMBER
TQFN
COM_2A
A1
25
HS Switch Common 2A
COM_2B
B1
26
HS Switch Common 2B
COM_3A
F1
32
6Switch Common 3A
COM_3B
E1
31
1Switch Common 3B
COM_4A
F2
2
6Switch Common 4A
COM_4B
D1
29
1Switch Common 4B
NC_1A
B2
24
Switch Normally Closed 1A
NC_1B
B5
17
Switch Normally Closed 1B
NC_2A
B3
22
Switch Normally Closed 2A
NC_2B
B4
19
Switch Normally Closed 2B
NC_3A
E3
3
Switch Normally Closed 3A
NC_3B
E4
6
Switch Normally Closed 3B
NC_4A
E2
1
Switch Normally Closed 4A
NC_4B
E5
8
Switch Normally Closed 4B
NO_1A
A3
21
Switch Normally Open 1A
NO_1B
A6
16
Switch Normally Open 1B
NO_2A
A4
20
Switch Normally Open 2A
NO_2B
A5
18
Switch Normally Open 2B
NO_3A
F4
5
Switch Normally Open 3A
NO_3B
F5
7
Switch Normally Open 3B
NO_4A
F3
4
Switch Normally Open 4A
NO_4B
F6
9
Switch Normally Open 4B
N.C.
C3, C4, D3, D4
-
No Connect
4
DESCRIPTION
FN6825.2
May 28, 2009
ISL54230
Absolute Maximum Ratings
Thermal Information
VDD to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +6.5V
Input Voltages
NCx, NOx (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . - 0.3V to +6.5V
INx, OEx (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +6.5V
Output Voltages
COMx (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +6.5V
Continuous Current (NC2x, NO3x) . . . . . . . . . . . . . . . . . . . . ±40mA
Continuous Current (NC1x, NO4x) . . . . . . . . . . . . . . . . . . . ±150mA
Peak Current (NC2x, NO3x)
(Pulsed 1ms, 10% Duty Cycle, Max) . . . . . . . . . . . . . . . . . . ±100mA
Peak Current (NC1x, NO4x)
(Pulsed 1ms, 10% Duty Cycle, Max) . . . . . . . . . . . . . . . . . . ±300mA
ESD Rating:
Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .>8kV
Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .>400V
Charged Device Model. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .>2kV
Thermal Resistance (Typical, Notes 4, 5)
JA (°C/W)
JC (°C/W)
32 Ld 5x5mm TQFN Package . . . . . . .
30
1.5
36 Ball WLCSP Package . . . . . . . . . . .
60
Maximum Junction Temperature (Plastic Package). . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . . . -65°C to +150°C
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C
Logic Control Input Voltage . . . . . . . . . . . . . . . . . . . . . . . 0V to VDD
Analog Signal Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0V to VDD
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
3. Signals on NCx, NOx, COMx, INx, and OEx exceeding VDD or GND by specified amount are clamped. Limit current to maximum current ratings.
4. JA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379 for details.
5. For JC, the “case temperature” location is the center of the exposed metal pad on the package underside.
Electrical Specifications - 2.7V to 3.6V Supply
PARAMETER
Test Conditions: VDD = +2.7V, GND = 0V, VINxH = 1.4V, VINxL = 0.5V,
VOExH = 1.4V, VOExL = 0.5V, (Note 6), Unless Otherwise Specified.
TEST CONDITIONS
TEMP
MIN
MAX
(°C) (Notes 7, 8) TYP (Notes 7, 8) UNITS
ANALOG SWITCH CHARACTERISTICS
USB HS Switch, COM2x and COM3x
Analog Signal Range, VANALOG
Full
0
-
VDD
V
ON-Resistance, rON
High Speed
VDD = 2.7V, VOEx = VOExH, ICOMx = 40mA, VNOx or
VNCx = 0V to 400mV (see Figure 1)
25
-
8.3
-

Full
-
9.25
-

rON Matching Between Channels,
rON, High Speed
VDD = 2.7V, VOEx = VOExH, ICOMx = 40mA, VNOx or
VNCx = Voltage at max rON, (Note 10)
25
-
0.11
-

Full
-
0.22
-

rON Flatness, rFLAT(ON)
High Speed
VDD = 2.7V, VOEx = VOExH, ICOMx = 40mA, VNOx or
VNCx = 0V to 400mV, (Note 9)
25
-
1.45
-

Full
-
1.8
-

ON-Resistance, rON
Full Speed
VDD = 2.7V, VOEx = VOExH, ICOMx = 1mA, VNOx or
VNCx =0V to 2.7V (see Figure 1, Note 11)
25
-
130
150

Full
-
150
178

rON Matching Between Channels,
rON, Full-Speed
VDD = 2.7V, VOEx = VOExH, ICOMx = 1mA, VNOx or
VNCx = Voltage at max rON over signal range of 0V to 2.7V
(Note 10)
25
-
1.2
-

Full
-
2.6
-

rON Flatness, rFLAT(ON)
Full-Speed
VDD = 2.7V, VOEx = VOExH, ICOMx = 1mA, VNOx or
VNCx = 0V to 1V (Note 9)
25
-
4
-

ON-Resistance, rON
VDD = 2.7V, VOEx = VOExH, ICOMx = 1mA, VNOx or
VNCx = 0V to 1.8V (see Figure 1)
OFF Leakage Current, INOx(OFF) or VDD = 3.6V, VOEx = Such that switch is disabled,
INCx(OFF)
VCOMx = 0.3V, 3.3V, VNOx = 3.3V, 0.3V, VNCx = 3.3V, 0.3V
VDD = 3.6V, VOEx = VOExH, VCOMx = 0.3V, 3.3V,
VNOx = 0.3V, 3.3V, VNCx = 0.3V, 3.3V
ON Leakage Current, ICOMx(ON)
5
Full
-
5
-

25
-
128
-

Full
-
140
-

25
-20
4
20
nA
Full
-100
-
100
nA
25
-50
4
50
nA
Full
-100
-
100
nA
FN6825.2
May 28, 2009
ISL54230
Electrical Specifications - 2.7V to 3.6V Supply
PARAMETER
Test Conditions: VDD = +2.7V, GND = 0V, VINxH = 1.4V, VINxL = 0.5V,
VOExH = 1.4V, VOExL = 0.5V, (Note 6), Unless Otherwise Specified. (Continued)
TEST CONDITIONS
Power OFF Leakage Current, ID+, ID- VDD = 0V, VNOx = 0V to 5.25V, VNCx= 0V to 5.25V,
VINX = 0V, VOEX such that switch is disabled
(see Figure 5)
TEMP
MIN
MAX
(°C) (Notes 7, 8) TYP (Notes 7, 8) UNITS
25
-
2
100
nA
Full
-
-
2
µA
Full
0
-
VDD
V
25
-
1.26
1.5

Full
-
1.5
1.74

1Switch, COM1A and COM4A
Analog Signal Range, VANALOG
VDD = 2.7V, VOEx = VOExH, ICOMx = 100mA, VNOx or
VNCx = 0V to 2.7V (see Figure 1, Note 11)
ON-Resistance, rON
rON Matching Between Channels,
rON
VDD = 2.7V, VOEx = VOExH, ICOMx = 100mA, VNOx or
VNCx = Voltage at max rON over signal range of 0V to 2.7V,
(Note 10)
rON Flatness, rFLAT(ON)
VDD = 2.7V, VOEx = VOExH, ICOMx = 100mA, VNOx or
VNCx = 0V to 2.7V (Note 9)
VDD = 2.7V, VOEx = VOExH, ICOMx = 100mA, VNOx or
VNCx = 0V to 1.8V (see Figure 1)
ON-Resistance, rON
OFF Leakage Current, INOx(OFF) or VDD = 3.6V, VOEx = VOExL, VCOMx = 0.3V, 3.3V,
INCx(OFF)
VNOx = 3.3V, 0.3V, VNCx = 3.3V, 0.3V
VDD = 3.6V, VOEx = VOExH, VCOMx = 0.3V, 3.3V,
VNOx = 0.3V, 3.3V, VNCx = 0.3V, 3.3V
ON Leakage Current, ICOMx(ON)
25
-
0.05
-

Full
-
0.07
-

25
-
0.37
0.52

Full
-
0.37
0.6

25
-
1.3
-

Full
-
1.4
-

25
-20
4
20
nA
Full
-150
-
150
nA
25
-50
10
50
nA
Full
-300
-
300
nA
Full
0
-
VDD
V
25
-
8
9.2

6 Switch, COM1B and COM4B
Analog Signal Range, VANALOG
ON-Resistance, rON
VDD = 2.7V, VOEx = VOExH, ICOMx = 40mA, VNOx or
VNCx = 0V to 2.7V (see Figure 1, Note 11)
rON Matching Between Channels,
rON
VDD = 2.7V, VOEx = VOExH, ICOMx = 40mA, VNOx or
VNC x= Voltage at max rON over signal range of 0V to 2.7V,
(Note 10)
rON Flatness, rFLAT(ON)
VDD = 2.7V, VOEx = VOExH, ICOMx = 40mA, VNOx or
VNCx = 0V to 2.7V (Note 9)
VDD = 2.7V, VOEx = VOExH, ICOMx = 40mA, VNOx or
VNCx = 0V to 1.8V (see Figure 1)
ON-Resistance, rON
Full
-
9.2
10.8

25
-
0.08
-

Full
-
0.3
-

25
-
1.9
2.8

Full
-
1.9
3.3

25
-
8
-

Full
-
8.8
-

OFF Leakage Current, INOx(OFF) or VDD = 3.6V, VOEx = VOExL, VCOMx = 0.3V, 3.3V,
INCx(OFF)
VNOx = 3.3V, 0.3V, VNCx = 3.3V, 0.3V
25
-20
4
20
nA
Full
-100
-
100
nA
VDD = 3.6V, VOEx = VOExH, VCOMx = 0.3V, 3.3V,
VNOx = 0.3V, 3.3V, VNCx = 0.3V, 3.3V
25
-50
4
50
nA
Full
-130
-
130
nA
ON Leakage Current, ICOMx(ON)
DYNAMIC CHARACTERISTICS
USB HS Switch
Skew, tSKEW
VDD = 3.0V, VOEx = VOExH, RL = 45,CL = 10pF,
tR = tF = 720ps at 480Mbps, Duty Cycle = 50%
(see Figure 6)
25
-
50
-
ps
Total Jitter, tJ
VDD =3.0V, VOEx = VOExH, RL = 45,CL = 10pF,
tR = tF = 750ps at 480Mbps
25
-
210
-
ps
Propagation Delay, tPD
VDD = 3.0V, VOEx = VOExH, RL = 45,CL = 10pF
see Figure 6)
25
-
250
-
ps
OFF-Isolation
VDD = 3.0V, RL = 50, f = 240MHz (see Figure 2)
25
-
-15
-
dB
6
FN6825.2
May 28, 2009
ISL54230
Electrical Specifications - 2.7V to 3.6V Supply
PARAMETER
Test Conditions: VDD = +2.7V, GND = 0V, VINxH = 1.4V, VINxL = 0.5V,
VOExH = 1.4V, VOExL = 0.5V, (Note 6), Unless Otherwise Specified. (Continued)
TEST CONDITIONS
TEMP
MIN
MAX
(°C) (Notes 7, 8) TYP (Notes 7, 8) UNITS
HS Switch -3dB Bandwidth,
Signal = 50mVRMS, RL = 50
25
-
500
-
MHz
OFF Capacitance, CNOxOFF or
CNCxOFF
f = 1MHz, VDD = 3.0V, VOEx = VOExH, VNOx or VNCx = 0V
(see Figure 3)
25
-
6.2
-
pF
COM ON Capacitance, CCOMxON
f = 1MHz, VDD = 3.0V, VOEx = VOExH, VNOx or VNCx = 0V
(see Figure 3)
25
-
12.5
-
pF
Crosstalk
VDD = 3.0V, RL = 50, f = 10MHz (see Figure 4)
25
-
-90
-
dB
OFF-Isolation
VDD = 3.0V, RL = 50, f = 1MHz (see Figure 2)
25
-
55
-
dB
Switch -3dB Bandwidth
Signal = 50mVRMS, RL = 50
25
-
78
-
MHz
OFF Capacitance, CNOxOFF or
CNCxOFF
f = 1MHz, VDD = 3.0V, VOEx = VOExH, VNOx or VNCx = 0V
(see Figure 3)
25
-
21
-
pF
COM ON Capacitance, CCOMxON
f = 1MHz, VDD = 3.0V, VOEx = VOExH, VNOx or VNCx = 0V
(see Figure 3)
25
-
61
-
pF
Crosstalk
VDD = 3.0V, RL = 50, f = 10MHz (see Figure 4)
25
-
-67
-
dB
OFF-Isolation
VDD = 3.0V, RL = 50, f = 10MHz (see Figure 2)
25
-
50
-
dB
Switch -3dB Bandwidth
50mVRMS, RL = 50
25
-
310
-
MHz
OFF Capacitance, CNOxOFF or
CNCxOFF
f = 1MHz, VDD = 3.0V, VOEx = VOExH, VNOx or VNCx = 0V
(see Figure 3)
25
-
6
-
pF
COM ON Capacitance, CCOMxON
f = 1MHz, VDD = 3.0V, VOEx = VOExH, VNOx or VNCx = 0V
(see Figure 3)
25
-
15
-
pF
Full
2.7
3.6
V
1Switches
6Switches
POWER SUPPLY CHARACTERISTICS
Power Supply Range, VDD
VDD = 3.6V, VOEx = VINx = 0V, VNOx or VNCx = 0V,
VCOMx = 0V
Positive Supply Current, IDD
VDD = 3.6V, VLogic = 1.8V, VNOx or VNCx = 0V,
VCOMx = 0V. Driving one logic pin only.
Power Supply Current, IDD
25
-
1
2
µA
Full
-
1.24
-
µA
25
-
1
-
µA
DIGITAL INPUT CHARACTERISTICS
Input Voltage Low, VINLx, VOELx
VDD = 2.7V to 3.6V
Full
-
-
0.5
V
Input Voltage High, VINHx, VOEHx
VDD = 2.7V to 3.6V
Full
1.4
-
-
V
Input Current Low, IINLx, IOELx
VDD = 2.7V to 3.6V
Full
-50
20
50
nA
Input Current High, IINHx, IOEHx
VDD = 2.7V to 3.6V
Full
-2
1
2
µA
NOTES:
6. Vlogic = Input voltage to perform proper function.
7. The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
8. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
9. Flatness is defined as the difference between maximum and minimum value of on-resistance over the specified analog signal range
10. rON matching between channels is calculated by subtracting the channel with the highest max rON value from the channel with lowest max rON
value, between NCx or NOx.
11. Limits established by characterization and are not production tested.
7
FN6825.2
May 28, 2009
ISL54230
Test Circuits and Waveforms
VDD
VDD
C
C
50 SIGNAL
GENERATOR
NO OR NC
rON = V1/Icom
NOx OR NCx
IN
VNO/NC
Icom
INx
V1
COM
ANALYZER
VIN
COMx
0V OR V+
GND
RL
GND
Signal direction through switch is reversed, worst case values
are recorded.
Repeat test for all switches.
FIGURE 2. OFF-ISOLATION TEST CIRCUIT
FIGURE 1. rON TEST CIRCUIT
VDD
VDD
C
50SIGNAL
GENERATOR
NOx/NCx
NO1/NC1
INx
C
RL
COM1
INx
IMPEDANCE
ANALYZER
0V OR
VDD
COMx
VIN
50
COM is connected to NO or NC
during ON capacitance measurement.
NOx/NCx
COMx
ANALYZER
GND
NC
GND
Signal direction through switch is reversed, worst case values
are recorded. Repeat test for all switches.
FIGURE 3. CAPACITANCE TEST CIRCUIT
FIGURE 4. CROSSTALK TEST CIRCUIT
VDD
A
NOx OR NCx
5.25V
INx
COMx
GND
NOTE: OEx such that switch is disabled
FIGURE 5. POWER OFF LEAKAGE TEST CIRCUIT
8
FN6825.2
May 28, 2009
ISL54230
Test Circuits and Waveforms (Continued)
VDD
tri
C
90%
DIN+
10%
50%
VINx
tskew_i
DIN-
90%
INx
15.8
DIN+
50%
COM2A
143
10%
tfi
tro
DIN-
15.8
COM2B
NO2A
OR NC2A
NO2B
OR NC2B
OUT+
45
CL
OUT45
CL
143
90%
OUT+
OUT-
10%
50%
GND
tskew_o
|tro - tri| Delay Due to Switch for Rising Input and Rising Output Signals.
50%
90%
|tfo - tfi| Delay Due to Switch for Falling Input and Falling Output Signals.
10%
tf0
|tskew_0| Change in Skew through the Switch for Output Signals.
|tskew_i| Change in Skew through the Switch for Input Signals.
FIGURE 6A. MEASUREMENT POINTS
FIGURE 6B. TEST CIRCUIT
FIGURE 6. SKEW TEST
Detailed Description
Power Supply Considerations
The ISL54230 is a multiprotocol switch containing eight
switches configured as a Quad DPDT. Each DPDT switch is
independently controlled by a logic pin. The ISL54230 has
four switches that are compliant in passing USB2.0 signals
and four switches with low rON that can be used to pass
analog or digital signals such as audio or UART. It is offered
in a 36 ball WLCSP or a 32 Ld 5mmx5mm TQFN package
for applications which require small package size such as
cellphones and PDAs.
The power supply connected to the VDD and GND pins
provides the DC bias voltage necessary to operate the IC.
The ISL54230 can be operated with a supply voltage in the
range of +2.0V to +5.5V. For USB applications, the supply
voltage should be in the range of +3.0V to +5.5V to ensure
proper signal levels on the USB data lines.
The ISL54230 contains four switches capable of passing
USB2.0 Full-Speed and High-Speed signals with minimal
distortion, two 1switches and two 6switches for
analog/digital signals. The USB capable switches were
designed with low capacitance and high bandwidth to pass
USB HS signals (480Mbps) with minimal edge and phase
distortion. The 1switches are designed for passing low
bandwidth signals (<8MHz) and are ideal for switching
power lines since the low ON-resistance minimizes power
dissipation. The 6switches are designed to pass audio or
data signals up to 100MHz while maintaining a low rON for
good THD performance.
In addition to the four independent logic control pins that
control each DPDT switch, the ISL54230 contains two Output
Enable (OE) logic pins that permits the IC to disable certain
switches giving the user a high degree of flexibility in signal
routing. Please see “OE Control Truth Table” on page 3 for an
explanation of the OE pins. All logic pins on the ISL54230 are
1.8V logic compatible up to a +3.3V supply.
9
A decoupling capacitor in the range 0.01µF to 0.1µF should
be connected to the VDD supply pin of the IC to filter out any
power supply noise that may be present on the supply lines.
The capacitor should be place as closed as possible to the
VDD pin.
Supply Sequencing and Power-On Reset Protection
Proper power supply sequencing is necessary to protect the
ISL54230 from operating in fault conditions. The ISL54230
integrates Power-On Reset (POR) circuitry that prevents the
switches from turning ON until the supply voltage is at least
+1.4V. The POR has a 100mV hysteresis built in that will turn
the switches OFF when the supply has gone below +1.3V.
This function prevents signals from the switch input being
passed to the output when the device operating voltage has
not reached appropriate levels yet, protecting the switch
from fault conditions.
The POR circuitry also protects the switch from operating in
a fault condition should the power supply to the IC drop
below the POR threshold. Thus, the recommended
operational supply voltage is within +2.0V to +5.5V.
Operating at supply voltages below +2.0V may still be
functional but the noise margin between the POR threshold
and supply voltage will be reduced. The device may
FN6825.2
May 28, 2009
ISL54230
unexpectedly shut down if transient voltages trigger the
POR.
analog or digital signal routing such as audio, UART or
Full-Speed USB.
Overvoltage and Short Circuit Considerations
The low ON-resistance of these switches are well suited for
passing audio signals with good THD performance, even
with low impedance loads such as 32headphones
(see Figure 24 for THD performance curves).
The ISL54230 should be protected from overvoltage
conditions. The IC contains ESD protection diodes that are
back biased from the switch terminals to ground. Negative
voltages on the switch terminals that are large enough to
forward-bias these ESD protection diodes will result in a
large current flowing from ground that may destroy these
diodes. Thus, signals on the switch terminals should not
swing below ground and cannot exceed the specified
“Absolute Maximum Ratings” on page 5 for safe operation.
The ISL54230 can have signals that go above the positive
supply rail with no adverse effects up to +5.5V. The ESD
protection circuitry permits the signal from going beyond the
VDD supply (even with VDD = 0V) without inducing large
leakage currents on the switch pins when the supply voltage
is less than +5.5V. This feature complies with the USB 2.0
Specifications for short circuit protection in the event that the
5.25V VBUS line shorts to the USB signal lines.
Note: When the supply voltage is above the POR threshold
and a VBUS fault conditions occurs, the VBUS signal will be
passed to the other side of the switch if the logic control pins
are biased such that the switch is turned ON.
USB Switches (COM2x and COM3x)
The four USB FS and HS capable switches are bi-directional
analog switches that can pass rail-to-rail signals with
minimal distortion. With a 3.0V power supply, these switches
have a nominal ON-resistance of 6in the 0V to 400mV
signal range. The low capacitance and high bandwidth of the
switches makes them ideal for USB applications. They are
specifically designed to pass both USB FS (12Mbps) and
USB HS (480Mbps) differential signals while meeting the
USB 2.0 signal quality eye diagrams (Figures 25 and 26).
The USB switches are designed with integrated protection
circuitry for fault conditions as defined in the USB 2.0
Specifications-Section 7.1.1. If a condition where VBUS
(5.25V) is shorted to the D+ or D- pin this will not damage
the device, even without power to the IC.
1Switches(COM1A and COM4A) and 6
Switches(COM1B and COM4B)
The two 1switches are bi-directional analog switches that
can pass rail-to-rail signals, making them well suited for
analog or digital signal routing. The low ON-resistance of the
switches makes them ideal for switching ON/OFF power
supply lines for applications that interface with devices that
require power (ie: SIM cards or flash memory devices). With
a ON-resistance of 1the power dissipation through the
switch is minimal.
The two 6switches are bi-directional analog switches that
can pass rail-to-rail signals, making them well suited for
10
Logic Control Pins
The ISL54230 contains six logic control pins, IN1 through
IN4 for independently controlling each DPDT switch and two
OE enable pins. The logic control pins determine the state of
the switches. Refer to the “Input Select” and “OE Control”
Truth Tables on page 3.
When the OEx control pins are logic LOW, only the switches
on COM2x and COM3x are active and the switch state
determined by IN2 and IN3 respectively. When the OEx
control pins are logic HIGH, all switches are active and the
switch state determined by the INx control pins.
When the OEx control pins are in opposing logic states
either COM1x and COM2x are active or COM3x and COM4x
are active depending on what states OE1 and OE2 are at.
The active switches are controlled by the respective INx
control pin. This feature is useful for applications that
interface the ISL54230 to Master/Slave devices or
controlling two SIM cards in Dual SIM Card cellphones. The
OEx control pins permit total deactivation of each half of the
switch blocks to disable devices connected to those
switches.
LOGIC CONTROL VOLTAGE LEVELS
OEx = Logic “0” (Low) when VOEx 0.5V
OEx = Logic “1” (High) when VOEx 1.4V
INx = Logic “0” (Low) when VINx 0.5V
INx = Logic “1” (High) when VINx 1.4V
The logic control pins are +1.8V CMOS logic compatible (0.45V
VOLMAX and 1.35V VOHMIN) for supply voltages from +1.8V to
+3.6V. over a supply range of 1.8V to 3.3V (see Figure 23). At
3.6V the VIL level is 0.5V maximum. This is still below the 1.8V
CMOS guaranteed low output maximum level of 0.45V, but
noise margin is reduced. At 3.6V the VIH level is 1.4V minimum.
While this is above the 1.8V CMOS guaranteed high output
minimum of 1.35V under most operating conditions the switch
will recognize this as a valid logic high.
The digital input stages draws a larger supply current
whenever the digital input voltage is not at one of the supply
rails. Driving the digital input signals from GND to V+ with a
fast transition time minimizes power dissipation. The
ISL54230 has been designed to minimize the supply current
whenever the digital input voltage is not driven to the supply
rails (0V to V+). For example driving the device with 1.8V logic
high while operating with a 3.6V supply the device draws only
1µA of current.
FN6825.2
May 28, 2009
ISL54230
Application Block Diagram
VDD
MAIN
MICROPHONE
NO1A
COM1A
IN1
NC1A
NO1B
COM1B
COM2A
NC1B
EAR BUD
MICROPHONE
NO2A
BASEBAND
CODEC
NC2A
IN2
NO2B
COM2B
NC2B
MULTIMEDIA
CODEC
NO3A
USB
TRANSCEIVER A
USB
CONNECTOR
COM3A
NC3A
IN3
NO3B
COM3B
NO4A
COM4A
AUDIO JACK
USB
TRANSCEIVER B
NC3B
AUDIO
CODEC A
NC4A
IN4
NO4B
COM4B
OE1
OE2
NC4B
GND
AUDIO
CODEC B
µCONTROLLER
OR
BASEBAND
PROCESSOR
Typical Performance Curves
10
9
TA = +25°C, Unless Otherwise Specified.
8.0 T = +25°C
ICOM = 40mA
7.5
VDD = 3.0V
ICOM = 40mA
+85°C
7.0
7
+25°C
6
rON ()
rON ()
8
+2.7V
6.5
+3V
6.0
-40°C
5
5.5
4
5.0
3
0
0.05
0.10
0.15
0.20 0.25
VCOM (V)
0.30
0.35
0.40
0.45
FIGURE 7. ON-RESISTANCE vs SWITCH VOLTAGE; COM2x
AND COM3x
11
4.5
+3.6V
0
0.05
0.10
0.15
0.20 0.25
VCOM (V)
0.30
0.35
0.40
0.45
FIGURE 8. ON- RESISTANCE vs SWITCH VOLTAGE; COM2,
COM3
FN6825.2
May 28, 2009
ISL54230
Typical Performance Curves
160
TA = +25°C, Unless Otherwise Specified. (Continued)
160
VDD = 3.0V
ICOM = 1mA
140
140
120
120
+85°C
+25°C
80
100
rON ()
100
rON ()
T = +25°C
ICOM = 1mA
80
-40°C
60
+2.7V
+3V
60
+3.6V
40
40
20
20
0
0
0.5
1.0
1.5
2.0
VCOM (V)
2.5
3.0
0
0
3.5
FIGURE 9. ON-RESISTANCE vs SWITCH VOLTAGE; COM2x
AND COM3x
2.50
2.00
2.00
1.75
1.75
1.25
+25°C
1.00
-40°C
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
3.5
4.0
+2.7V
1.25
+3V
+3.6V
1.00
0.50
0
0.5
1.0
1.5
12
2.5
3.0
3.5
4.0
FIGURE 12. ON-RESISTANCE vs SWITCH VOLTAGE; COM1A
AND COM 4A
12
T = +25°C
11 ICOM = 100mA
VDD = 3.0V
ICOM = 100mA
11
2.0
VCOM (V)
FIGURE 11. ON-RESISTANCE vs SWITCH VOLTAGE; COM1A
AND COM4A
10
10
+85°C
9
8
7
+25°C
rON ()
9
rON ()
3.0
1.50
VCOM (V)
8
+2.7V
7
+3V
6
6
-40°C
5
+3.6V
5
4
4
3
2.0
2.5
VCOM (V)
0.75
0.75
0.50
1.5
T = +25°C
ICOM = 100mA
2.25
rON ()
rON ()
VDD = 3.0V
2.25 ICOM = 100mA
+85°C
1.0
FIGURE 10. ON-RESISTANCE vs SWITCH VOLTAGE; COM2x
AND COM3x
2.50
1.50
0.5
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
VCOM (V)
FIGURE 13. ON-RESISTANCE vs SWITCH VOLTAGE; COM1B
AND COM4B
12
3
0
0.5
1.0
1.5
2.0
2.5
VCOM (V)
3.0
3.5
4.0
FIGURE 14. ON-RESISTANCE vs SWITCH VOLTAGE; COM1B
AND COM4B
FN6825.2
May 28, 2009
ISL54230
Typical Performance Curves
TA = +25°C, Unless Otherwise Specified. (Continued)
0
1
VDD = 3.0V
-10 VIN = 50mVRMS
-1
-20
-2
-30
-3
OFF-ISOLATION (dB)
NORMALIZED GAIN (dB)
0
-4
-5
-6
-40
-50
-60
-70
VDD = 3.0V
-80
VIN = 0dBm 100mVDC OFFSET
-90
RL = 50
1M
10M
100M
FREQUENCY (Hz)
RL = 50
-100
1k
1G
FIGURE 15. FREQUENCY RESPONSE; COM2x and COM3x
10k
100k
1M
FREQUENCY(Hz)
10M
100M
1G
FIGURE 16. OFF-ISOLATION; COM2x and COM3x
1
0
VDD = 3.0V
-10 VIN = 50mVRMS
-20
OFF-ISOLATION (dB)
NORMALIZED GAIN (dB)
0
-1
-2
-3
-4
-5
1M
VDD = 3.0V
10M
100M
FREQUENCY (Hz)
-50
-60
-70
-100
1k
1G
10k
100k
1M
FREQUENCY(Hz)
10M
100M
FIGURE 18. OFF-ISOLATION; COM1A AND COM4A
0
VDD = 3.0V
-10 VIN = 50mVRMS
RL = 50
-20
OFF-ISOLATION (dB)
0
NORMALIZED GAIN (dB)
-40
-90
RL = 50
1
-1
-2
-3
-5
1M
-30
-80
VIN = 50mVRMS
FIGURE 17. FREQUENCY RESPONSE; COM1A AND COM4A
-4
RL = 50
-30
-40
-50
-60
-70
VDD = 3.0V
-80
VIN = 50mVRMS
-90
RL = 50
10M
100M
FREQUENCY (Hz)
1G
FIGURE 19. FREQUENCY RESPONSE; COM1B and COM4B
13
-100
1k
10k
100k
1M
FREQUENCY (Hz)
10M
100M
FIGURE 20. OFF-ISOLATION; COM1B and COM4B
FN6825.2
May 28, 2009
ISL54230
Typical Performance Curves
CROSSTALK (dB)
-20
0
VDD = 3.0V
VIN = 0dBm
-20 COM3A TO COM4B
RL = 50
COM3A TO COM4A
RL = 50
-40
-60
-80
-100
-40
-60
-80
-100
-120
1M
10M
100M
FREQUENCY (Hz)
-120
1M
1G
0.95
0.20
0.90
0.18
0.85
0.16
1G
COM1B AND COM 4B
0.14
0.80
THD + N (%)
THRESHOLD VOLTAGE (V)
10M
100M
FREQUENCY (Hz)
FIGURE 22. CROSSTALK
FIGURE 21. CROSSTALK
0.75
0.70
0.65
0.12
VDD = 3.3V
0.10
VIN = 100mVRMS WITH 1.5VDC OFFSET
RL = 32
0.08
0.06
0.60
0.04
0.55
0.50
2.6
VDD = 3.0V
VIN = 0dBm
CROSSTALK (dB)
0
TA = +25°C, Unless Otherwise Specified. (Continued)
COM1A AND COM 4A
0.02
2.7
2.8
2.9
3.0 3.1 3.2 3.3 3.4
SUPPLY VOLTAGE (V)
3.5
3.6
3.7
FIGURE 23. LOGIC INPUT THRESHOLD VOLTAGE vs SUPPLY
VOLTAGE
14
0
20
100
200
1k
2k
10k
20k
FREQUENCY (Hz)
FIGURE 24. TOTAL HARMONIC DISTORTION vs FREQUENCY
FN6825.2
May 28, 2009
ISL54230
Typical Performance Curves
TA = +25°C, Unless Otherwise Specified. (Continued)
VDD = 3.3V
FIGURE 25. EYE PATTERN: 12Mbps; COM2x or COM3x SWITCH IN THE SIGNAL PATH
15
FN6825.2
May 28, 2009
ISL54230
Typical Performance Curves
TA = +25°C, Unless Otherwise Specified. (Continued)
VDD = 3.3V
FIGURE 26. EYE PATTERN: 480Mbps; COM2x or COM 3x SWITCH IN THE SIGNAL PATH
Die Characteristics
SUBSTRATE POTENTIAL (POWERED UP):
GND
TRANSISTOR COUNT:
1216
PROCESS:
Submicron, Dual Gate, Analog CMOS
16
FN6825.2
May 28, 2009
ISL54230
Wafer Level Chip Scale Package (WLCSP)
W6x6.36
6x6 ARRAY 36 BALL WAFER LEVEL CHIP SCALE PACKAGE
E
PIN 1 ID
D
TOP VIEW
SYMBOL
MILLIMETERS
A
0.44 Min, 0.495 Nom, 0.55 Max
A1
0.190 ±0.030
A2
0.305 ±0.025
b
0.270 ±0.030
D
2.530 ±0.020
D1
2.000 BASIC
E
2.530 ±0.020
E1
2.000 BASIC
e
0.400 BASIC
SD
0.200 BASIC
SE
0.200 BASIC
Number of Bumps: 36
Rev. 0 6/08
NOTES:
1. Dimensions are in millimeters.
A
A2
A1
b
SIDE VIEW
E1
SE
e
SD
D1
b
BOTTOM VIEW
17
FN6825.2
May 28, 2009
ISL54230
Thin Quad Flat No-Lead Plastic Package (TQFN)
Thin Micro Lead Frame Plastic Package (TMLFP)
L32.5x5A
2X
0.15 C A
D
A
32 LEAD THIN QUAD FLAT NO-LEAD PLASTIC PACKAGE
(COMPLIANT TO JEDEC MO-220WJJD-1 ISSUE C)
D/2
MILLIMETERS
2X
6
INDEX
AREA
N
0.15 C B
1
2
3
SYMBOL
MIN
NOMINAL
MAX
NOTES
A
0.70
0.75
0.80
-
A1
-
-
0.05
-
0.30
5, 8
3.55
7, 8
A3
E/2
b
E
D
D2
B
TOP VIEW
0.20 REF
0.18
5.00 BSC
3.30
C
0.08 C
SEATING PLANE
A3
SIDE VIEW
A1
3.45
-
E
5.00 BSC
-
5.75 BSC
9
3.30
e
/ / 0.10 C
-
E1
E2
A
0.25
3.45
3.55
0.50 BSC
7, 8
-
k
0.20
-
-
-
L
0.30
0.40
0.50
8
N
32
2
Nd
8
3
Ne
8
3
Rev. 2 05/06
NX b
5
0.10 M C A B
D2
NX k
D2
2
(DATUM B)
8
7
N
(DATUM A)
6
INDEX
AREA
E2
E2/2
3
2
1
NX L
N
7
(Ne-1)Xe
REF.
8
NOTES:
1. Dimensioning and tolerancing conform to ASME Y14.5m-1994.
2. N is the number of terminals.
3. Nd and Ne refer to the number of terminals on each D and E.
4. All dimensions are in millimeters. Angles are in degrees.
5. Dimension b applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
6. The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 identifier may be
either a mold or mark feature.
7. Dimensions D2 and E2 are for the exposed pads which provide
improved electrical and thermal performance.
8. Nominal dimensions are provided to assist with PCB Land Pattern
Design efforts, see Intersil Technical Brief TB389.
e
8
(Nd-1)Xe
REF.
BOTTOM VIEW
A1
NX b
5
SECTION "C-C"
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9001 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
18
FN6825.2
May 28, 2009
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