Silicon Labs Timing Solutions for Broadcom Switches/PHYs www.silabs.com/timing Cross Reference Ideal for Broadcom Switches/PHYs Silicon Labs offers a broad portfolio of frequency flexible jitter attenuating clocks, clock generators, clock buffers and oscillators that enable hardware designers to simplify clock synthesis and distribution. Silicon Labs clocks generate any combination of frequencies/ formats with low jitter. Clock buffers provide integrated format/voltage level translation. By consolidating more timing functions into fewer devices, Silicon Labs delivers complete clock tree solutions that minimize system cost and complexity. Any-frequency synthesis Ultra low jitter Short, reliable lead times High PSRR Si3452 Quad PoE + PSE 54 V Broadcom Ethernet Switch/PHY RJ45's +3.3V (isolated) 156.25 MHz Si53302 CLK Buffer Si535 Low Jitter XO 25 MHz Si5335 CLK Generator 100 MHz SFP+ SFP+ Broadcom BCM56840 Switch Block Diagram The Si535, Si53302 and Si5335 provide ultra-low jitter reference timing for Broadcom switches and PHYs. Request a custom clock or XO/VCXO at www.silabs.com/custom-timing www.silabs.com/timing www.silabs.com/timing Timing Products Product Family Si51x/3x/5x/7x XO/VCXO Frequency Range Any-frequency programmable (100 kHz - 1.4 GHz) RMS Phase Jitter (12 kHz – 20 MHz) 0.2 ps (Si535) 0.3 ps (Si53x/Si57x) 0.5 ps (Si55x) 1.0 ps (Si51x) Si5335/38 Any-Frequency Clock Generators Generate 4 unique, non-integer related frequencies (5 MHz - 710 MHz) <1 ps Si531x/2x/6x/7x Any-Frequency Jitter Cleaning Clocks Generate any output frequency from any input frequency (2 kHz - 1.4 GHz) <0.3 ps Features Single/dual/quad any-rate frequency 20/50/100 ppm stability Guaranteed aging performance LVPECL, LVDS, HCSL, CML, CMOS 1.8, 2.5, 3.3 V 5 mm x 7 mm, 3.2 mm x 5 mm 2 week lead times Free-run & synchronous operation Any format on any output LVPECL, LVDS, CMOS, HCSL Independent VDDO per output 1.8, 2.5, 3.3 V PCI Express Gen 1/2/3, GbE, 10GbE jitter compliant Free-run, synchronous, holdover modes of operation Jitter cleaning w/ integrated adjustable loop filter (>4 Hz) 1-PLL and 4-PLL devices Ideal for OTN, 10G/40G/100G, broadcast video, mil/aero, test/measurement Broadcom Switch/PHY Jitter Requirements Silicon Labs timing devices easily meet Broadcom’s input reference clock jitter requirements Broadcom Device BCM5684x 10G/40G Switch+PHY Series BCM5685x 10G/40G Switch+PHY Series BCM84756 10GbE PHY Silicon Labs Device Frequency 4 x 156.25 MHz Si535 XO + Si53301 buffer (free-running) or Si5368 clock (synchronous) 25, 100 MHz Si5335 clock 7 x 156.25 MHz Si535 XO + Si53302 buffer 4 x 25 MHz (diff) Si5335 clock 156.25 MHz Si510 XO (for single-port) or Si5335 clock (for multi-port) For more information, visit www.silabs.com/timing Request a custom clock or XO/VCXO at www.silabs.com/custom-timing BRCM RMS Jitter Silicon Labs Requirement RMS Jitter 0.3 ps 10 kHz – 1 MHz 2 ps 12 kHz – 20 MHz 0.5 ps 12 kHz – 20 MHz 1 ps 12 kHz – 20 MHz 1 ps 10 kHz – 1 MHz 0.193 ps 0.213 ps 1 ps 0.193 ps 1 ps 0.65 ps 0.5 ps