Process Introduction 4um / 25V Bipolar Process Technology Process features z z z z z z z z z z z Key Design Rules Single isolation Deep N+ collector plug NPN transistor Lateral PNP transistor Vertical (substrate) PNP transistor Zener diode Implant Resistor (optional) MOS Capacitor (optional) Double metal (optional) Low cost Applications: analog, power linear 7 Masks Min. Width/Space(um) Diffusion(Iso) 6 Diffusion(others) 5 Contact 4 Metal 6/6 Electrical Specification Specification Device NPN transistor (18x18 um2 emitter) Lateral PNP Transistor (Wb=12um) Vertical (substrate) PNP Sheet Resistance Capacitance (SiO2) Parameter Min Typ Max Unit Hfe (Ic=1mA) 80 160 300 - BVceo(Ic=10uA) 26 - - V BVebo(Ic=10uA) 7.0 7.6 8.5 V Hfe (Ic=100uA) 30 100 160 - BVceo(Ic=10uA) 26 - - V Hfe (lc=100uA) 100 250 450 - BVceo(Ic=10uA) 30 - - V PBASE-R 200 225 250 Ω/□ Implant-R 1.80 2.05 2.3 kΩ/□ C(100x100um2) 3 4 5 pF -1- Process Introduction -2- Process Introduction -3- Process Introduction -4-