DCR1020N52

DCR1020N52
Phase Control Thyristor
DS5964-5 August 2014 (LN31842)
FEATURES
KEY PARAMETERS

Double Side Cooling

High Surge Capability
VDRM
IT(AV)
ITSM
dV/dt*
dI/dt
5200V
1018A
14800A
1500V/µs
800A/µs
APPLICATIONS
* Higher dV/dt selections available

Medium Voltage Soft Starts

High Voltage Power Supplies

Static Switches
VOLTAGE RATINGS
Part and
Ordering
Number
DCR1020N52*
DCR1020N50
Repetitive Peak
Voltages
VDRM and VRRM
V
5200
5000
Conditions
Tvj = -40°C to 125°C,
IDRM = IRRM = 100mA,
VDRM, VRRM tp = 10ms,
VDSM & VRSM =
VDRM & VRRM + 100V
respectively
Lower voltage grades available.
o
o
*5000V @ -40 C, 5200V @ 0 C
Outline type code: N
(See Package Details for further information)
Fig. 1 Package outline
ORDERING INFORMATION
When ordering, select the required part number
shown in the Voltage Ratings selection table.
For example:
DCR1020N52
Note: Please use the complete part number when ordering
and quote this number in any future correspondence
relating to your order.
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DCR1020N52
SEMICONDUCTOR
CURRENT RATINGS
Tcase = 60°C unless stated otherwise
Symbol
Parameter
Test Conditions
Max.
Units
1018
A
Double Side Cooled
IT(AV)
Mean on-state current
IT(RMS)
RMS value
-
1599
A
Continuous (direct) on-state current
-
1487
A
IT
Half wave resistive load
SURGE RATINGS
Symbol
ITSM
2
It
Parameter
Surge (non-repetitive) on-state current
Test Conditions
Max.
Units
10ms half sine, Tcase = 125°C
14.8
kA
VR = 0
1.097
MA s
Min.
Max.
Units
2
I t for fusing
2
THERMAL AND MECHANICAL RATINGS
Symbol
Rth(j-c)
Rth(c-h)
Parameter
Thermal resistance – junction to case
Thermal resistance – case to heatsink
Test Conditions
Double side cooled
DC
-
0.0221
°C/W
Single side cooled
Anode DC
-
0.041
°C/W
Cathode DC
-
0.0516
°C/W
Double side
-
0.004
°C/W
-
0.008
°C/W
-
125
°C
Clamping force 23 kN
(with mounting compound)
Blocking VDRM / VRRM
Single side
Tvj
Virtual junction temperature
Tstg
Storage temperature range
-55
125
°C
Fm
Clamping force
20.0
25.0
kN
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DCR1020N52
SEMICONDUCTOR
DYNAMIC CHARACTERISTICS
Symbol
IRRM/IDRM
Parameter
Test Conditions
Min.
Max.
Units
Peak reverse and off-state current
At VRRM/VDRM, Tcase = 125°C
-
100
mA
dV/dt
Max. linear rate of rise of off-state voltage
To 67% VDRM, Tj = 125°C, gate open
-
1500
V/µs
dI/dt
Rate of rise of on-state current
From 67% VDRM to 2x IT(AV)
Repetitive 50Hz
-
200
A/µs
Gate source 30V, 10,
Non-repetitive
-
800
A/µs
tr < 0.5µs, Tj = 125°C
VT(TO)
rT
tgd
Threshold voltage – Low level
300A to 750A at Tcase = 125°C
-
0.948
V
Threshold voltage – High level
750A to 4000A at Tcase = 125°C
-
1.078
V
On-state slope resistance – Low level
300A to 750A at Tcase = 125°C
-
0.783
m
On-state slope resistance – High level
750A to 4000A at Tcase = 125°C
-
0.610
m
VD = 67% VDRM, gate source 30V, 10
-
3
µs
1000
µs
90
115
A
2200
3800
µC
Delay time
tr = 0.5µs, Tj = 25°C
tq
Turn-off time
Tj = 125°C,I peak = 1000A, tp = 1000us,
VRM = 100V, dI/dt = -5A/µs,
dVDR/dt = 20V/µs linear to 2000V
IRR
Reverse recovery current
QS
Stored charge
IL
Latching current
Tj = 25°C, VD = 5V
-
3
A
IH
Holding current
Tj = 25°C, RG-K = , ITM = 500A, IT = 5A
-
300
mA
IT = 1000A, tp = 1000us,Tj = 125°C,
dI/dt = - 5A/µs, VR = 100V
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DCR1020N52
SEMICONDUCTOR
GATE TRIGGER CHARACTERISTICS AND RATINGS
Symbol
Parameter
Test Conditions
Max.
Units
VGT
Gate trigger voltage
VDRM = 5V, Tcase = 25°C
1.5
V
VGD
Gate non-trigger voltage
At 50% VDRM, Tcase = 125°C
0.4
V
IGT
Gate trigger current
VDRM = 5V, Tcase = 25°C
350
mA
IGD
Gate non-trigger current
At 50% VDRM, Tcase = 125°C
15
mA
CURVES
4500
Instantaneous on-state current, IT - (A)
4000
3500
3000
2500
2000
1500
min 25°C
1000
max 25°C
500
min 125°C
max 125°C
0
0.5
1.5
2.5
3.5
4.5
Instantaneous on-state voltage, V T - (V)
Fig.2 Maximum & minimum on-state characteristics
VTM EQUATION
VTM = A + Bln (IT) + C.IT+D.IT
Where
A = -0.069834
B = 0.220863
C = 0.000638
D = -0.013352
these values are valid for Tj = 125°C for IT 300A to 4000A
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DCR1020N52
SEMICONDUCTOR
130
16
180
120
90
60
30
120
14
Maximum case temperature, T case ( o C )
110
Mean power dissipation - (kW)
12
10
8
6
4
180
120
90
60
30
2
0
0
1000
2000
100
90
80
70
60
50
40
30
20
10
0
3000
0
Mean on-state current, IT(AV) - (A)
10
Mean power dissipation - (kW)
Maximum heatsink temperature, THeatsink - ( ° C)
12
75
50
25
8
6
4
d.c.
180
120
90
60
30
2
0
0
0
500
1000
1500
Fig.4 Maximum permissible case temperature,
double side cooled – sine wave
180
120
90
60
30
100
1000
Mean on-state current, I T(AV) - (A)
Fig.3 On-state power dissipation – sine wave
125
500
1500
Mean on-state current, IT(AV) - (A)
Fig.5 Maximum permissible heatsink temperature,
double side cooled – sine wave
0
1000
2000
3000
4000
Mean on-state current, IT(AV) - (A)
Fig.6 On-state power dissipation – rectangular wave
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DCR1020N52
SEMICONDUCTOR
125
d.c.
180
120
90
60
30
120
110
100
90
Maximum heatsink temperature Theatsink -( o C)
Maximum permissible case temperature , Tcase -(° C)
130
80
70
60
50
40
30
20
10
d.c.
180
120
90
60
30
100
75
50
25
0
0
0
500
1000
1500
2000
2500
0
500
Mean on-state current, IT(AV) - (A)
1000
Double side cooled
Thermal Impedance, Zth(j-c) ( °C/kW )
40.0
2500
Fig.8 Maximum permissible heatsink temperature,
double side cooled – rectangular wave
55.0
45.0
2000
Mean on-state current, IT(AV ) - (A)
Fig.7 Maximum permissible case temperature,
double side cooled – rectangular wave
50.0
1500
Zth Double Side Cooled
Anode side cooled
Zth Cathode Side Cooled
Cathode side cooled
Zth Anode Side Cooled
i 4
Ri (°C/kW)
1
3.4733
2
4.9047
3
9.1463
4
4.5220
Ti (s)
0.1457
0.0166
1.2832
0.3767
Ri (°C/kW)
7.6674
5.0530
9.7355
27.5992
Ti (s)
0.2241
0.0169
4.0566
8.2780
Ri (°C/kW)
6.0393
4.2782
5.1301
25.0874
Ti (s)
0.1356
0.0143
0.6594
7.2358
i
i
Zthth 
i
1 [ Ri  (1  exp(T / Ti )]
Z 
35.0
i 4
[ R  (1  exp(T / T )]
i 1
30.0
Rth(j-c) Conduction
25.0
Tables show the increments of thermal resistance Rth(j-c) when the device
operates at conduction angles other than d.c.
20.0
Double side cooling
Anode Side Cooling
Zth (z)
15.0
°
180
120
90
60
30
15
10.0
5.0
0.0
0.001
0.01
0.1
1
10
sine.
3.03
3.49
3.99
4.43
4.77
4.92
Cathode Sided Cooling
Zth (z)
rect.
2.07
2.95
3.43
3.94
4.49
4.77
°
180
120
90
60
30
15
sine.
3.03
3.49
3.99
4.43
4.76
4.92
Zth (z)
rect.
2.07
2.95
3.43
3.94
4.48
4.77
°
180
120
90
60
30
15
sine.
3.12
3.61
4.13
4.60
4.96
5.13
rect.
2.12
3.04
3.54
4.08
4.66
4.97
100
Time ( s )
Fig.9 Maximum (limit) transient thermal impedance – junction to case (°C/kW)
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DCR1020N52
SEMICONDUCTOR
40
Conditions:
Tcase= 125 C
VR = 0
half-sine wave
30
100
3
Conditions:
Tcase = 125 C
VR =0
Pulse width = 10ms
I2t
25
2
20
15
1
10
Surge current, ITSM- (kA)
ITSM
I2t (MA2s)
Surge current, ITSM - (kA)
35
10
5
0
0
1
10
1
100
1
Pulse width, tP - (ms)
Fig.10 Single-cycle surge current
100
Fig.11 Multi-cycle surge current
7000
300
Q s typical = 1682.8*(di/dt)
0.4945
Reverse recovery current, Irr - (A)
6000
Stored Charge, Qs - (uC)
10
Number of cycles
5000
4000
Conditions:
Tj = 125°C,
V peak ~ 3000V
Vrm ~ 2200V
snubber as appropriate to
control reverse voltage
3000
2000
1000
0
250
IRR typical = 32.97*(di/dt) 0.7324
200
150
Conditions:
Tj = 125°C,
V peak ~ 3000V
Vrm ~ 2200V
snubber as appropriate to
control reverse voltage
100
50
0
0
5
10
15
Rate of decay of on-state current, di/dt - (A/us)
Fig.12 Stored charge
20
0
5
10
15
20
Rate of decay of on-state current, di/dt - (A/us)
Fig.13 Reverse recovery current
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DCR1020N52
SEMICONDUCTOR
10
9
Gate trigger voltage, V GT - (V)
8
Upper Limit
7
6
Preferred gate drive area
5
4
3
Tj = -40oC
2
Lower Limit
Tj = 25oC
Tj = 125oC
1
0
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
Gate trigger current IGT, - (A)
Fig14 Gate Characteristics
30
Lower Limit
Upper Limit
5W
25
10W
20W
Gate trigger voltage, VGT - (V)
50W
100W
20
150W
-40C
15
10
5
0
0
1
2
3
4
5
6
7
8
9
10
Gate trigger current, IGT - (A)
Fig. 15 Gate characteristics
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DCR1020N52
SEMICONDUCTOR
PACKAGE DETAILS
For further package information, please contact Customer Services. All dimensions in mm, unless stated otherwise.
DO NOT SCALE.
Device
DCR1020N52
DCR1110N52
DCR1260N42
DCR1470N28
DCR1530N28
DCR1620N22
DCR1710N22
DCR680N85
DCR760N85
DCR820N65
DCR890N65
Maximum Minimum
Thickness Thickness
(mm)
(mm)
34.89
34.34
34.89
34.34
34.77
34.22
34.54
33.99
34.54
33.99
34.465
33.915
34.465
33.915
35.51
34.96
35.51
34.96
35.15
34.6
35.15
34.6
Lead length: 420mm
Lead terminal connector: M4 ring
Package outline type code: N
Fig.17 Package outline
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DCR1020N52
SEMICONDUCTOR
IMPORTANT INFORMATION:
This publication is provided for information only and not for resale.
The products and information in this publication are intended for use by appropriately trained technical personnel.
Due to the diversity of product applications, the information contained herein is provided as a general guide only and does not constitute
any guarantee of suitability for use in a specific application.The user must evaluate the suitability of the product and the completeness of
the product data for the application. The user is responsible for product selection and ensuring all safety and any warning requirements
are met. Should additional product information be needed please contact Customer Service.
Although we have endeavoured to carefully compile the information in this publication it may contain inaccuracies or typographical
errors. The information is provided without any warranty or guarantee of any kind.
This publication is an uncontrolled document and is subject to change without notice. When referring to it please ensure that it is the
most up to date version and has not been superseded.
The products are not intended for use in applications where a failure or malfunction may cause loss of life, injury or damage to property.
The user must ensure that appropriate safety precautions are taken to prevent or mitigate the consequences of a product failure or
malfunction.
The products must not be touched when operating because there is a danger of electrocution or severe burning. Always use
protective safety equipment such as appropriate shields for the product and wear safety glasses. Even when disconnected any
electric charge remaining in the product must be discharged and allowed to cool before safe handling using protective gloves.
Extended exposure to conditions outside the product ratings may affect reliability leading to premature product failure. Use outside the
product ratings is likely to cause permanent damage to the product. In extreme conditions, as with all semiconductors, this may include
potentially hazardous rupture, a large current to flow or high voltage arcing, resulting in fire or explosion. Appropriate application design
and safety precautions should always be followed to protect persons and property.
Product Status & Product Ordering:
We annotate datasheets in the top right hand corner of the front page, to indicate product status if it is not yet fully approved for
production. The annotations are as follows:Target Information:
Preliminary Information:
No Annotation:
This is the most tentative form of information and represents a very preliminary specification.
No actual design work on the product has been started.
The product design is complete and final characterisation for volume production is in
progress.The datasheet represents the product as it is now understood but details may change.
The product has been approved for production and unless otherwise notified by Dynex any
product ordered will be supplied to the current version of the data sheet prevailing at the
time of our order acknowledgement.
All products and materials are sold and services provided subject to Dynex’s conditions of sale, which are available on request.
Any brand names and product names used in this publication are trademarks, registered trademarks or trade names of their
respective owners.
HEADQUARTERS OPERATIONS
CUSTOMER SERVICE
DYNEX SEMICONDUCTOR LIMITED
Doddington Road, Lincoln, Lincolnshire, LN6 3LF
United Kingdom.
Phone: +44 (0) 1522 500500
Fax:
+44 (0) 1522 500550
Web: http://www.dynexsemi.com
Phone: +44 (0) 1522 502753 / 502901
Fax:
+44 (0) 1522 500020
e-mail: [email protected]
 Dynex Semiconductor Ltd.
Technical Documentation – Not for resale.
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