INTEGRATED CIRCUITS 74ABT373A Octal transparent latch (3-State) Product specification IC23 Data Handbook 1995 Feb 17 Philips Semiconductors Product specification Octal transparent latch (3-State) 74ABT373A FEATURES DESCRIPTION • 8-bit transparent latch • 3-State output buffers • Output capability: +64mA/–32mA • Latch-up protection exceeds 500mA per JEDEC Std 17 • ESD protection exceeds 2000 V per MIL STD 883 Method 3015 The 74ABT373A high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive. The 74ABT373A device is an octal transparent latch coupled to eight 3-State output buffers. The two sections of the device are controlled independently by Enable (E) and Output Enable (OE) control gates. and 200 V per Machine Model The data on the D inputs are transferred to the latch outputs when the Latch Enable (E) input is High. The latch remains transparent to the data inputs while E is High, and stores the data that is present one setup time before the High-to-Low enable transition. • Power-up 3-State • Power-up reset • Live insertion/extraction permitted The 3-State output buffers are designed to drive heavily loaded 3-State buses, MOS memories, or MOS microprocessors. The active-Low Output Enable (OE) controls all eight 3-State buffers independent of the latch operation. When OE is Low, the latched or transparent data appears at the outputs. When OE is High, the outputs are in the High-impedance “OFF” state, which means they will neither drive nor load the bus. QUICK REFERENCE DATA SYMBOL CONDITIONS Tamb = 25°C; GND = 0V PARAMETER tPLH tPHL Propagation delay Dn to Qn CL = 50pF; VCC = 5V CIN TYPICAL UNIT 3.2 3.6 ns Input capacitance VI = 0V or VCC 4 pF COUT Output capacitance Outputs disabled; VO = 0V or VCC 7 pF ICCZ Total supply current Outputs disabled; VCC =5.5V 100 µA ORDERING INFORMATION PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER 20-Pin Plastic DIP –40°C to +85°C 74ABT373A N 74ABT373A N SOT146-1 20-Pin plastic SO –40°C to +85°C 74ABT373A D 74ABT373A D SOT163-1 20-Pin Plastic SSOP Type II –40°C to +85°C 74ABT373A DB 74ABTD373A B SOT339-1 20-Pin Plastic TSSOP Type I –40°C to +85°C 74ABT373A PW 7ABT373APW DH SOT360-1 PIN CONFIGURATION PIN DESCRIPTION OE 1 20 VCC Q0 2 19 Q7 D0 3 18 D7 D1 4 17 D6 Q1 5 16 Q6 Q2 6 15 Q5 D2 7 14 D5 D3 8 13 D4 Q3 9 12 Q4 11 E GND 10 PIN NUMBER SYMBOL FUNCTION 1 OE 3, 4, 7, 8, 13, 14, 17, 18 Output enable input (active-Low) D0-D7 Data inputs 2, 5, 6, 9, 12, 15, 16, 19 Q0-Q7 Data outputs 11 E 10 GND Enable input (active-High) Ground (0V) 20 VCC Positive supply voltage SA00059 1995 Feb 17 2 853-1454 14852 Philips Semiconductors Product specification Octal transparent latch (3-State) 74ABT373A LOGIC SYMBOL LOGIC SYMBOL (IEEE/IEC) 3 4 7 8 13 14 17 18 1 EN 11 C1 D0 D1 D2 D3 D4 D5 D6 D7 11 1 E 3 OE 4 5 7 6 2 1D Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 8 2 5 6 9 12 15 16 19 SA00060 9 13 12 14 15 17 16 18 19 FUNCTION TABLE INPUTS SA00061 INTERNAL OUTPUTS OE E Dn REGISTER Q0 – Q7 L L H H L H L H L H Enable and read register L L ↓ ↓ l h L H L H Latch and read register L L X NC NC OPERATING MODE Hold H L X NC Z Disable outputs H H Dn Dn Z H = High voltage level h = High voltage level one set-up time prior to the High-to-Low E transition L = Low voltage level l = Low voltage level one set-up time prior to the High-to-Low E transition NC= No change X = Don’t care Z = High impedance “off” state ↓ = High-to-Low E transition LOGIC DIAGRAM D1 D0 3 D2 4 D E D Q D3 7 E D Q D4 8 E D Q E D6 14 D E Q D5 13 D Q E D7 17 18 D Q E D Q E Q 11 E 1 OE 2 Q0 5 Q1 6 9 Q2 Q3 12 Q4 15 Q5 16 Q6 19 Q7 SA00062 1995 Feb 17 3 Philips Semiconductors Product specification Octal transparent latch (3-State) 74ABT373A ABSOLUTE MAXIMUM RATINGS1, 2 SYMBOL VCC IIK PARAMETER CONDITIONS RATING UNIT –0.5 to +7.0 V –18 mA –1.2 to +7.0 V VO < 0 –50 mA output in Off or High state –0.5 to +5.5 V output in Low state 128 mA –65 to 150 °C DC supply voltage DC input diode current VI < 0 voltage3 VI DC input IOK DC output diode current voltage3 VOUT DC output IOUT DC output current Tstg Storage temperature range NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C. 3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. RECOMMENDED OPERATING CONDITIONS LIMITS SYMBOL VCC PARAMETER UNIT DC supply voltage Min Max 4.5 5.5 V 0 VCC V VI Input voltage VIH High-level input voltage VIL Low-level input voltage 0.8 V IOH High-level output current –32 mA IOL Low-level output current 64 mA 0 5 ns/V –40 +85 °C ∆t/∆v Input transition rise or fall rate Tamb Operating free-air temperature range 1995 Feb 17 2.0 4 V Philips Semiconductors Product specification Octal transparent latch (3-State) 74ABT373A DC ELECTRICAL CHARACTERISTICS LIMITS SYMBOL PARAMETER TEST CONDITIONS Min VIK VOH Input clamp voltage High-level output voltage Tamb = –40°C to +85°C Tamb = +25°C VCC = 4.5V; IIK = –18mA Typ Max –0.9 –1.2 Min UNIT Max –1.2 V VCC = 4.5V; IOH = –3mA; VI = VIL or VIH 2.5 2.9 2.5 V VCC = 5.0V; IOH = –3mA; VI = VIL or VIH 3.0 3.4 3.0 V VCC = 4.5V; IOH = –32mA; VI = VIL or VIH 2.0 2.4 2.0 V VOL Low-level output voltage VCC = 4.5V; IOL = 64mA; VI = VIL or VIH 0.3 0.55 0.55 V VRST Power-up output low voltage3 VCC = 5.5V; IO = 1mA; VI = GND or VCC 0.13 0.55 0.55 V II Input leakage current VCC = 5.5V; VI = GND or 5.5V ±0.01 ±1.0 ±1.0 µA Power-off leakage current VCC = 0.0V; VO or VI ≤ 4.5V ±5.0 ±100 ±100 µA Power-up/down 3-State output current VCC = 2.0V; VO = 0.5V; VOE = Don’t Care V1 = GND or VCC ±5.0 ±50 ±50 µA IOZH 3-State output High current VCC = 5.5V; VO = 2.7V; VI = VIL or VIH 0.1 50 50 µA IOZL 3-State output Low current VCC = 5.5V; VO = 0.5V; VI = VIL or VIH –0.1 –50 –50 µA ICEX Output High leakage current VCC = 5.5V; VO = 5.5V; VI = GND or VCC 5.0 50 50 µA –100 –180 –180 mA VCC = 5.5V; Outputs High, VI = GND or VCC 100 250 250 µA VCC = 5.5V; Outputs Low, VI = GND or VCC 24 30 30 mA VCC = 5.5V; Outputs 3-State; VI = GND or VCC 100 250 250 µA VCC = 5.5V; one input at 3.4V, other inputs at VCC or GND 0.5 1.5 1.5 mA IOFF IPU/IPD IO Output current1 ICCH ICCL Quiescent su supply ly current ICCZ ∆ICC Additional supply current per input pin2 VCC = 5.5V; VO = 2.5V –50 –50 NOTES: 1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second. 2. This is the increase in supply current for each input at 3.4V. 3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power. AC CHARACTERISTICS GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500Ω LIMITS SYMBOL PARAMETER Tamb = -40 to +85oC VCC = +5.0V ±0.5V Tamb = +25oC VCC = +5.0V WAVEFORM UNIT Min Typ Max Min Max 2 1.4 1.4 3.2 3.6 4.2 4.7 1.4 1.4 4.7 5.1 ns Propagation delay E to Qn 1 1.4 1.9 3.2 3.7 4.2 4.8 1.4 1.9 4.8 5.1 ns tPZH tPZL Output enable time to High and Low level 4 5 1.2 2.1 3.1 4.2 4.2 5.2 1.2 2.1 5.1 5.7 ns tPHZ tPLZ Output disable time from High and Low level 4 5 1.3 1.2 3.4 3.0 4.6 4.1 1.3 1.2 5.1 4.3 ns tPLH tPHL Propagation delay Dn to Qn tPLH tPHL 1995 Feb 17 5 Philips Semiconductors Product specification Octal transparent latch (3-State) 74ABT373A AC SETUP REQUIREMENTS GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500Ω LIMITS SYMBOL PARAMETER Tamb = +25oC VCC = +5.0V WAVEFORM Tamb = -40 to +85oC VCC = +5.0V ±0.5V UNIT Min Typ Min 3 1.5 1.0 0.7 0.4 1.5 1.0 ns Hold time, High or Low Dn to E 3 1.0 1.0 0.0 –0.5 1.0 1.0 ns E pulse width High 1 2.5 1.7 2.5 ns ts(H) ts(L) Setup time, High or Low Dn to E th(H) th(L) tw(H) AC WAVEFORMS VM = 1.5V, VIN = GND to 3.0V VM E VM VM tw(H) tPHL OE VM VM tPZH tPHZ tPLH VM Qn Qn VM VOH–0.3V VM 0V SA00063 SA00066 Waveform 1. Propagation Delay, Enable to Output, and Enable Pulse Width Dn VM Waveform 4. 3-State Output Enable Time to High Level and Output Disable Time from High Level OE VM tPLH Qn VM VM tPZL tPHL VM VM Qn tPLZ VM VOL+0.3V 0V SA00064 SA00067 Waveform 2. Propagation Delay for Data to Outputs Dn Waveform 5. 3-State Output Enable Time to Low Level and Output Disable Time from Low Level ÉÉÉ ÉÉÉÉÉÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉÉÉÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉÉÉÉÉÉ ÉÉÉ VM VM ts(H) E VM th(H) VM VM ts(L) th(L) VM NOTE: The shaded areas indicate when the input is permitted to change for predictable output performance. SA00065 Waveform 3. Data Setup and Hold Times 1995 Feb 17 6 Philips Semiconductors Product specification Octal transparent latch (3-State) 74ABT373A TEST CIRCUIT AND WAVEFORM VCC 7.0V PULSE GENERATOR VIN tW 90% VOUT VM NEGATIVE PULSE CL 10% 0V RL tTHL (tF) tTLH (tR) tTLH (tR) tTHL (tF) 90% POSITIVE PULSE Test Circuit for 3-State Outputs AMP (V) 90% VM VM 10% 10% tW SWITCH POSITION TEST SWITCH tPLZ closed tPZL closed All other open AMP (V) VM 10% RL D.U.T. RT 90% 0V VM = 1.5V Input Pulse Definition INPUT PULSE REQUIREMENTS DEFINITIONS FAMILY RL = Load resistor; see AC CHARACTERISTICS for value. CL = Load capacitance includes jig and probe capacitance; see AC CHARACTERISTICS for value. RT = Termination resistance should be equal to ZOUT of pulse generators. 74ABT Amplitude Rep. Rate tW tR tF 3.0V 1MHz 500ns 2.5ns 2.5ns SA00012 1995 Feb 17 7 Philips Semiconductors Product specification Octal transparent latch (3-State) 74ABT373A DIP20: plastic dual in-line package; 20 leads (300 mil) SO20: plastic small outline package; 20 leads; body width 7.5 mm 1995 Feb 17 8 SOT146-1 SOT163-1 Philips Semiconductors Product specification Octal transparent latch (3-State) 74ABT373A SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm 1995 Feb 17 9 SOT339-1 Philips Semiconductors Product specification Octal transparent latch (3-State) 74ABT373A TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm 1995 Feb 17 10 SOT360-1 Philips Semiconductors Product specification Octal transparent latch (3-State) 74ABT373A DEFINITIONS Data Sheet Identification Product Status Definition Objective Specification Formative or in Design This data sheet contains the design target or goal specifications for product development. Specifications may change in any manner without notice. Preliminary Specification Preproduction Product This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. Product Specification Full Production This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes at any time without notice, in order to improve design and supply the best possible product. Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. LIFE SUPPORT APPLICATIONS Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices, or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 Philips Semiconductors and Philips Electronics North America Corporation register eligible circuits under the Semiconductor Chip Protection Act. Copyright Philips Electronics North America Corporation 1995 All rights reserved. Printed in U.S.A.