IRF IRHLA7970Z4

PD-97306
2N7630M2
RADIATION HARDENED
LOGIC LEVEL POWER MOSFET
THRU-HOLE (14-LEAD FLAT PACK)
IRHLA7970Z4
60V, Quad P-CHANNEL
™
TECHNOLOGY
Product Summary
Part Number Radiation Level RDS(on) I D
IRHLA7970Z4 100K Rads (Si) 1.36Ω -0.56A
IRHLA7930Z4
300K Rads (Si)
1.36Ω
-0.56A
14-Lead Flat Pack
International Rectifier’s R7 TM Logic Level Power
MOSFETs provide simple solution to interfacing
CMOS and TTL control circuits to power devices in
space and other radiation environments. The
threshold voltage remains within acceptable operating
limits over the full operating temperature and post
radiation. This is achieved while maintaining single
event gate rupture and single event burnout immunity.
These devices are used in applications such as
current boost low signal source in PWM, voltage
comparator and operational amplifiers.
Features:
n
n
n
n
n
n
n
n
n
n
5V CMOS and TTL Compatible
Low RDS(on)
Fast Switching
Single Event Effect (SEE) Hardened
Low Total Gate Charge
Simple Drive Requirements
Ease of Paralleling
Hermetically Sealed
Light Weight
Complimentary N-Channel Available IRHLA770Z4
Absolute Maximum Ratings (Per Die)
Pre-Irradiation
Parameter
ID @ VGS = -4.5V, TC=25°C
ID @ VGS = -4.5V, TC=100°C
IDM
PD @ TC = 25°C
VGS
EAS
IAR
EAR
dv/dt
TJ
T STG
Continuous Drain Current
Continuous Drain Current
Pulsed Drain Current À
Max. Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy Á
Avalanche Current À
Repetitive Avalanche Energy À
Peak Diode Recovery dv/dt Â
Operating Junction
Storage Temperature Range
Lead Temperature
Weight
Units
-0.56
-0.35
-2.24
0.6
0.005
±10
26
-0.56
0.06
-5.79
-55 to 150
A
W
W/°C
V
mJ
A
mJ
V/ns
°C
300 (0.63 in./1.6 mm from case for 10s)
0.52 (Typical)
g
For footnotes refer to the last page
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1
03/17/08
IRHLA7970Z4, 2N7630M2
Pre-Irradiation
Electrical Characteristics For Each P-Channel Device @Tj = 25°C (Unless Otherwise specified)
Parameter
Min
BVDSS
Drain-to-Source Breakdown Voltage
-60
∆BV DSS /∆T J Temperature Coefficient of Breakdown —
Voltage
RDS(on)
Static Drain-to-Source On-State
—
Resistance
VGS(th)
Gate Threshold Voltage
-1.0
—
∆VGS(th)/∆TJ Gate Threshold Voltage Coefficient
gfs
Forward Transconductance
0.7
IDSS
Zero Gate Voltage Drain Current
—
—
IGSS
IGSS
Qg
Q gs
Q gd
td(on)
tr
td(off)
tf
LS + LD
Gate-to-Source Leakage Forward
Gate-to-Source Leakage Reverse
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain (‘Miller’) Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Inductance
—
—
—
—
—
—
—
—
—
—
Typ Max Units
Test Conditions
—
—
V
VGS = 0V, ID = -250µA
-0.063
—
V/°C
Reference to 25°C, ID = -1.0mA
—
1.36
Ω
VGS = -4.5V, ID = -0.35A
—
3.2
—
—
—
-2.0
V
— mV/°C
—
S
-1.0
-10
µA
—
—
—
—
—
—
—
—
—
20
-100
100
2.8
1.7
1.2
22
22
40
32
—
nA
nC
ns
nH
Ã
VDS = VGS, ID = -250µA
VDS = -10V, IDS = -0.35A Ã
VDS= -48V ,VGS= 0V
VDS = -48V,
VGS = 0V, TJ =125°C
VGS = -10V
VGS = 10V
VGS = -4.5V, ID = -0.56A
VDS = -30V
VDD = -30V, ID = -0.56A,
VGS = -5.0V, RG = 24Ω
Measured from Drain lead (6mm /0.25in
from pack.) to Source lead (6mm/0.25in
from pack.)with Source wire internally
bonded from Source pin to Drain pad
Ciss
C oss
C rss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
—
—
—
144
41
6.6
—
—
—
pF
VGS = 0V, VDS = -25V
f = 1.0MHz
Rg
Gate Resistance
—
55
—
Ω
f = 1.0MHz, open drain
Source-Drain Diode Ratings and Characteristics (Per Die)
Parameter
Min Typ Max Units
IS
ISM
VSD
t rr
Q RR
Continuous Source Current (Body Diode)
Pulse Source Current (Body Diode) À
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
ton
Forward Turn-On Time
—
—
—
—
—
—
—
—
—
—
-0.56
-2.24
-5.0
35
9.6
Test Conditions
A
V
ns
nC
Tj = 25°C, IS = -0.56A, VGS = 0V Ã
Tj = 25°C, IF = -0.56A, di/dt ≤ -100A/µs
VDD ≤ -25V Ã
Intrinsic turn-on time is negligible. Turn-on speed is substantially controlled by LS + LD.
Thermal Resistance (Per Die)
Parameter
RthJA
Junction-to-Ambient
Min Typ Max Units
—
—
210
°C/W
Test Conditions
Typical socket mount
Note: Corresponding Spice and Saber models are available International Rectifier Website.
For footnotes refer to the last page
2
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Radiation
Characteristics
Pre-Irradiation
IRHLA7970Z4, 2N7630M2
International Rectifier Radiation Hardened MOSFETs are tested to verify their radiation hardness capability.
The hardness assurance program at International Rectifier is comprised of two radiation environments.
Every manufacturing lot is tested for total ionizing dose (per notes 5 and 6) using the TO-39 package. Both
pre- and post-irradiation performance are tested and specified using the same drive circuitry and test
conditions in order to provide a direct comparison.
Table 1. Electrical Characteristics For Each P-Channel Device @Tj = 25°C, Post Total Dose Irradiation ÄÅ
Parameter
BVDSS
VGS(th)
IGSS
IGSS
IDSS
RDS(on)
RDS(on)
VSD
Up to 300K Rads (Si)1
Drain-to-Source Breakdown Voltage
Gate Threshold Voltage
Gate-to-Source Leakage Forward
Gate-to-Source Leakage Reverse
Zero Gate Voltage Drain Current
Static Drain-to-Source „
On-State Resistance (TO-39)
Static Drain-to-Source On-state „
Resistance (14-Lead Flat Pack)
Diode Forward Voltage
„
Units
Test Conditions
Min
Max
-60
-1.0
—
—
—
—
-2.0
-100
100
-1.0
nA
—
1.25
Ω
VGS = -4.5V, ID = -0.35A
—
1.36
Ω
VGS = -4.5V, ID = -0.35A
V
VGS = 0V, ID = -0.56A
—
VGS = 0V, ID = -250µA
VGS = VDS, ID = -250µA
VGS = -10V
VGS = 10V
VDS= -48V, VGS= 0V
V
µA
-5.0
1. Part numbers IRHLA7970Z4, IRHLA7930Z4
International Rectifier radiation hardened MOSFETs have been characterized in heavy ion environment for
Single Event Effects (SEE). Single Event Effects characterization is illustrated in Fig. a and Table 2.
Table 2. Typical Single Event Effect Safe Operating Area (Per Die)
Ion
LET
Energy Range
2
(MeV/(mg/cm ))
(MeV)
(µm)
VDS (V)
@VGS= @VGS= @VGS= @VGS= @VGS= @VGS= @VGS= @VGS=
0V
2V
4V
5V
6V
7V
8V
10V
37
305
39
-60
-60
-60
-60
-60
-50
-35
-25
I
60
370
34
-60
-60
-60
-60
-60
-20
-
-
Au
84
390
30
-60
-60
-60
-60
-
-
-
-
VDS
Br
-70
-60
-50
-40
-30
-20
-10
0
Br
I
Au
0
1
2
3
4
5
6
7
8
9 10
VGS
Fig a. Typical Single Event Effect, Safe Operating Area
For footnotes refer to the last page
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IRHLA7970Z4, 2N7630M2
Pre-Irradiation
10
10
TOP
-I D, Drain-to-Source Current (A)
-I D, Drain-to-Source Current (A)
VGS
TOP
-10V
-5.0V
-4.5V
-3.25V
-2.75V
-2.5V
-2.25V
BOTTOM -2.0V
1
-2.0V
60µs PULSE WIDTH
Tj = 25°C
BOTTOM
1
-2.0V
60µs PULSE WIDTH
Tj = 150°C
0.1
0.1
0.1
1
10
0.1
100
Fig 1. Typical Output Characteristics
10
100
Fig 2. Typical Output Characteristics
10
1.5
RDS(on) , Drain-to-Source On Resistance
(Normalized)
-I D, Drain-to-Source Current (A)
1
-V DS , Drain-to-Source Voltage (V)
-VDS , Drain-to-Source Voltage (V)
T J = 150°C
1
T J = 25°C
VDS = -25V
60µs PULSE
WIDTH
15
0.1
ID = -0.56A
1.0
VGS = -4.5V
0.5
1
1.5
2
2.5
-VGS, Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
4
VGS
-10V
-5.0V
-4.5V
-3.25V
-2.75V
-2.5V
-2.25V
-2.0V
3
-60 -40 -20
0
20
40
60
80 100 120 140 160
T J , Junction Temperature (°C)
Fig 4. Normalized On-Resistance
Vs. Temperature
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IRHLA7970Z4, 2N7630M2
4.0
ID = -0.56A
3.5
3.0
2.5
T J = 150°C
2.0
1.5
1.0
T J = 25°C
0.5
0
2
3
4
5
6
7
8
9
RDS(on), Drain-to -Source On Resistance ( Ω)
RDS(on), Drain-to -Source On Resistance (Ω)
Pre-Irradiation
2.2
T J = 150°C
2.0
1.8
1.6
1.4
T J = 25°C
1.2
1.0
Vgs = -4.5V
0.8
10 11 12
0
0.5
1.0
2.0
2.5
-I D, Drain Current (A)
-V GS, Gate -to -Source Voltage (V)
Fig 5. Typical On-Resistance Vs
Gate Voltage
Fig 6. Typical On-Resistance Vs
Drain Current
80
2.5
ID = -1.0mA
-V GS(th) Gate threshold Voltage (V)
-V(BR)DSS , Drain-to-Source Breakdown Voltage (V)
1.5
70
60
2.0
1.5
1.0
ID = -50µA
0.5
ID = -250µA
ID = -1.0mA
ID = -150mA
0.0
50
-60 -40 -20
0
20
40
60
80 100 120 140 160
T J , Temperature ( °C )
Fig 7. Typical Drain-to-Source
Breakdown Voltage Vs Temperature
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-60 -40 -20
0
20
40
60
80 100 120 140 160
T J , Temperature ( °C )
Fig 8. Typical Threshold Voltage Vs
Temperature
5
IRHLA7970Z4, 2N7630M2
240
Pre-Irradiation
12
VGS = 0V,
f = 1 MHz
C iss = C gs + Cgd, C ds SHORTED
C rss = C gd
-V GS, Gate-to-Source Voltage (V)
200
ID = -0.56A
C, Capacitance (pF)
C oss = Cds + Cgd
160
Ciss
120
Coss
80
40
Crss
10
8
6
4
2
FOR TEST CIRCUIT
SEE FIGURE 17
0
0
1
10
0
100
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
QG, Total Gate Charge (nC)
-V DS, Drain-to-Source Voltage (V)
Fig 9. Typical Capacitance
Vs.Drain-to-Source Voltage
Fig 10. Typical Gate Charge Vs.
Gate-to-Source Voltage
0.6
10
0.5
-I D, Drain Current (A)
-I SD, Reverse Drain Current (A)
VDS= -48V
VDS= -30V
VDS= -12V
T J = 150°C
1
T J = 25°C
0.4
0.3
0.2
0.1
VGS = 0V
0
0.10
0.5
1
1.5
2
2.5
-V SD , Source-to-Drain Voltage (V)
Fig 11. Typical Source-Drain Diode
Forward Voltage
6
3
25
50
75
100
125
150
T C , Case Temperature (°C)
Fig 12. Maximum Drain Current Vs.
Case Temperature
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Pre-Irradiation
IRHLA7970Z4, 2N7630M2
60
EAS , Single Pulse Avalanche Energy (mJ)
-I D, Drain-to-Source Current (A)
10
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100µs
1
1ms
0.1
Tc = 25°C
Tj = 150°C
Single Pulse
1
10ms
10
ID
-0.25A
-0.35A
-0.56A
TOP
50
BOTTOM
40
30
20
10
0
100
25
-V DS , Drain-to-Source Voltage (V)
50
75
100
125
150
Starting T J , Junction Temperature (°C)
Fig 13. Maximum Safe Operating Area
Fig 14. Maximum Avalanche Energy
Vs. Drain Current
Thermal Response ( Z thJA )
1000
D = 0.50
100
0.20
P DM
0.10
0.05
10
t1
SINGLE PULSE
( THERMAL RESPONSE )
t2
0.02
0.01
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
1
1E-005
0.0001
0.001
0.01
0.1
1
10
100
1000
t1 , Rectangular Pulse Duration (sec)
Fig 15. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
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7
IRHLA7970Z4, 2N7630M2
Pre-Irradiation
L
VDS
I AS
D.U.T.
RG
IAS
-20V
VGS
tp
VDD
A
DRIVER
0.01Ω
tp
15V
V(BR)DSS
Fig 16a. Unclamped Inductive Test Circuit
Fig 16b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
QG
-4.5V
50KΩ
12V
QGS
.2µF
.3µF
QGD
D.U.T.
VG
+VDS
VGS
-3mA
IG
Charge
ID
Current Sampling Resistors
Fig 17b. Gate Charge Test Circuit
Fig 17a. Basic Gate Charge Waveform
RD
V DS
td(on)
t d(off)
tf
VGS
VGS
D.U.T.
RG
tr
V DD
10%
-
+
VGS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 18a. Switching Time Test Circuit
8
90%
VDS
Fig 18b. Switching Time Waveforms
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Pre-Irradiation
IRHLA7970Z4, 2N7630M2
Footnotes:
À Repetitive Rating; Pulse width limited by
maximum junction temperature.
Á VDD = -25V, starting TJ = 25°C, L= 166mH
Peak IL = -0.56A, VGS = -10V
 ISD ≤ -0.56A, di/dt ≤ -161A/µs,
VDD ≤ -60V, TJ ≤ 150°C
à Pulse width ≤ 300 µs; Duty Cycle ≤ 2%
Ä Total Dose Irradiation with VGS Bias.
-10 volt VGS applied and VDS = 0 during
irradiation per MIL-STD-750, method 1019, condition A.
Å Total Dose Irradiation with VDS Bias.
-48 volt VDS applied and VGS = 0 during
irradiation per MlL-STD-750, method 1019, condition A.
Case Outline and Dimensions — 14-Lead Flat Pack
LEAD ASSIGNMENT
D4
D1
S1
Q1
Q4
G1
NC
S4
G4
NC
G3
G2
Q2
S2
D2
Q3
S3
D3
LEGEND
D = DRAIN, S = SOURCE , G = GATE, NC = NO CONNECTION
CHANNELS
P Channel = Q1,Q2, Q3 and Q4
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
IR LEOMINSTER : 205 Crawford St., Leominster, Massachusetts 01453, USA Tel: (978) 534-5776
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.
Data and specifications subject to change without notice. 03/2008
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