Philips Semiconductors Product specification Dual 4-input NAND gate 74ABT20 QUICK REFERENCE DATA SYMBOL tPLH tPHL LOGIC DIAGRAM CONDITIONS Tamb = 25°C; GND = 0V PARAMETER Propagation delay An, Bn, Cn, Dn to Yn TYPICAL A0 B0 CL = 50pF; VCC = 5V tOSLH tOSHL Output to Output skew CIN Input capacitance VI = 0V or VCC Total supply current Outputs disabled; VCC = 5.5V ICC UNIT C0 2.7 2.2 ns 0.3 ns 3 pF D0 A1 B1 C1 µA 50 VCC = Pin 14 GND = Pin 7 D1 1 2 6 4 Y0 5 9 10 8 12 Y1 13 SA00352 PIN CONFIGURATION LOGIC SYMBOL (IEEE/IEC) A0 1 14 VCC B0 2 13 D1 NC 3 12 C1 2 & 1 6 C0 4 11 NC 4 D0 5 10 B1 5 Y0 6 9 A1 GND 7 8 Y1 9 SA00350 10 8 12 PIN DESCRIPTION 13 PIN NUMBER SYMBOL 1, 2, 4, 5, 9, 10, 12, 13 An, Bn, Cn, Dn 6, 8 Yn Data outputs 7 GND Ground (0V) 14 VCC Positive supply voltage NAME AND FUNCTION SF00068 Data inputs FUNCTION TABLE INPUTS LOGIC SYMBOL 1 A0 2 B0 4 5 C0 D0 9 A1 10 B1 12 C1 13 Bn Cn Dn Yn L X X X H X L X X H X X L X H X X X L H H H L H H NOTES: H = High voltage level L = Low voltage level X = Don’t care D1 Y0 Y1 OUTPUT An VCC = Pin 14 GND = Pin 7 6 8 SA00351 ORDERING INFORMATION TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA 14-Pin Plastic DIP PACKAGES –40°C to +85°C 74ABT20 N 74ABT20 N SOT27-1 14-Pin plastic SO –40°C to +85°C 74ABT20 D 74ABT20 D SOT108-1 14-Pin Plastic SSOP Type II –40°C to +85°C 74ABT20 DB 74ABT20 DB SOT337-1 14-Pin Plastic TSSOP Type I –40°C to +85°C 74ABT20 PW 74ABT20PW DH SOT402-1 1995 Sep 22 1 DWG NUMBER 853-1811 15793 Philips Semiconductors Product specification Dual 4-input NAND gate 74ABT20 ABSOLUTE MAXIMUM RATINGS1, 2 PARAMETER SYMBOL VCC CONDITIONS DC supply voltage IIK DC input diode current VI DC input voltage3 IOK DC output diode current RATING UNIT –0.5 to +7.0 V –18 mA VI < 0 –1.2 to +7.0 V VO < 0 –50 mA –0.5 to +5.5 V 40 mA –65 to 150 °C VOUT DC output voltage3 output in Off or High state IOUT DC output current output in Low state Tstg Storage temperature range NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C. 3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. RECOMMENDED OPERATING CONDITIONS SYMBOL VCC LIMITS PARAMETER DC supply voltage UNIT MIN MAX 4.5 5.5 V 0 VCC V VI Input voltage VIH High-level input voltage VIL Low-level input voltage 0.8 V IOH High-level output current –15 mA IOL Low-level output current 20 mA 0 10 ns/V –40 +85 °C 2.0 ∆t/∆v Input transition rise or fall rate Tamb Operating free-air temperature range V DC ELECTRICAL CHARACTERISTICS LIMITS SYMBOL PARAMETER TEST CONDITIONS Tamb = –40°C to +85°C Tamb = +25°C MIN TYP MAX –0.9 –1.2 MIN UNIT MAX VIK Input clamp voltage VCC = 4.5V; IIK = –18mA VOH High-level output voltage VCC = 4.5V; IOH = –15mA; VI = VIL or VIH VOL Low-level output voltage VCC = 4.5V; IOL = 20mA; VI = VIL or VIH 0.35 0.5 0.5 V Input leakage current VCC = 5.5V; VI = GND or 5.5V ±0.01 ±1.0 ±1.0 µA IOFF Power-off leakage current VCC = 0.0V; VO or VI ≤ 4.5V ±5.0 ±100 ±100 µA ICEX II Output High leakage current VCC = 5.5V; VO = 5.5V; VI = GND or VCC IO Output current1 VCC = 5.5V; VO = 2.5V ICC Quiescent supply current VCC = 5.5V; VI = GND or VCC Additional supply current per input pin2 VCC = 5.5V; One data input at 3.4V, other inputs at VCC or GND ∆ICC 2.5 –50 2.9 2.5 2 V V 50 µA –180 mA 50 50 µA 500 500 µA 5.0 50 –75 –180 2 0.25 NOTES: 1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second. 2. This is the increase in supply current for each input at 3.4V. 3. For valid test results, data must not be loaded into the flip-flop or latch after applying the power. 1995 Sep 22 –1.2 –50 Philips Semiconductors Product specification Dual 4-input NAND gate 74ABT20 AC CHARACTERISTICS GND = 0V; tR = tF = 2.5ns; CL = 50pF, RL = 500Ω LIMITS SYMBOL tPLH tPHL tOSHL tOSLH1 PARAMETER Tamb = +25°C VCC = +5.0V WAVEFORM Propagation delay An, Bn, Cn, Dn to Yn 1 Output to Output skew An or Bn to Yn 2 Tamb = –40°C to +85°C VCC = +5.0V ±0.5V UNIT MIN TYP MAX MIN MAX 1.0 1.0 2.7 2.2 3.9 3.4 1.0 1.0 4.6 3.8 ns 0.3 0.5 0.5 ns NOTE: 1. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the the same direction, either HIGH–to-LOW (tOSHL) or LOW-to-HIGH (tOSLH); parameter guaranteed by design. AC WAVEFORMS VM = 1.5V, VIN = GND to 3.0V An, Bn, Cn, Dn INPUT VM VM tPHL tPLH OUTPUT tPHL MIN VM Yn VM tPLH OUTPUT N same part MIN SA00353 Waveform 1. Propagation Delay for Inverting Outputs tPLH tPHL MAX tOSLH MAX tOSHL SA00381 Waveform 2. Common edge skew TEST CIRCUIT AND WAVEFORMS tW 90% VCC 90% VM NEGATIVE PULSE AMP (V) VM 10% 10% 0V PULSE GENERATOR VOUT VIN D.U.T. RT CL RL tTHL (tF) tTLH (tR) tTLH (tR) tTHL (tF) 90% POSITIVE PULSE AMP (V) 90% VM VM 10% Test Circuit for Outputs 10% tW 0V VM = 1.5V Input Pulse Definition DEFINITIONS RL = Load resistor; see AC CHARACTERISTICS for value. CL = Load capacitance includes jig and probe capacitance; see AC CHARACTERISTICS for value. RT = Termination resistance should be equal to ZOUT of pulse generators. INPUT PULSE REQUIREMENTS FAMILY 74ABT Amplitude Rep. Rate tW tR tF 3.0V 1MHz 500ns 2.5ns 2.5ns SH00067 1995 Sep 22 3