PHILIPS 74LV4066_2005

74LV4066
Quad bilateral switches
Rev. 03 — 4 July 2005
Product data sheet
1. General description
The 74LV4066 is a low-voltage Si-gate CMOS device that is pin and function compatible
with the 74HC4066 and 74HCT4066.
The 74LV4066 has four independent switches. Each switch has two input/output pins
(nY, nZ) and an active HIGH enable input pin (nE). When nE is LOW the corresponding
analog switch is turned off.
The 74LV4066 has a ON-resistance which is reduced in comparison with the 74HCT4066.
2. Features
■
■
■
■
Optimized for low-voltage applications: 1.0 V to 3.6 V
Typical VOLP (output ground bounce): < 0.8 V at VCC = 3.3 V and Tamb = 25 °C
Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V
Very low ON-resistance:
◆ 60 Ω (typical) at VCC = 2.0 V
◆ 35 Ω (typical) at VCC = 3.0 V
◆ 25 Ω (typical) at VCC = 4.5 V
■ ESD protection:
◆ HBM EIA/JESD22-A114C exceeds 2000 V
◆ MM EIA/JESD22-A115-A exceeds 200 V
■ Specified from −40 °C to +80 °C and from −40 °C to +125 °C
74LV4066
Philips Semiconductors
Quad bilateral switches
3. Quick reference data
Table 1:
Quick reference data
GND = 0 V; Tamb = 25 °C; tr = tf ≤ 2.5 ns; CL = 15 pF; RL = 1 kΩ.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
tPZL, tPZH
turn-on time nE to Vos
VCC = 3.3 V
-
10
-
ns
tPLZ, tPHZ
turn-off time nE to Vos
VCC = 3.3 V
-
13
-
ns
Ci
input capacitance
-
3.5
-
pF
CS
maximum switch
capacitance
-
8
-
pF
CPD
power dissipation
capacitance per switch
-
11
-
pF
VCC = 3.3 V
[1] [2]
[1]
CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + Σ[(CL + CS) × VCC2 × fo] where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
CS = maximum switch capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
Σ[(CL + CS) × VCC2 × fo] = sum of the outputs.
[2]
The condition is VI = GND to VCC.
4. Ordering information
Table 2:
Ordering information
Type number Package
Temperature range Name
Description
Version
74LV4066N
−40 °C to +125 °C
DIP14
plastic dual in-line package;
14 leads (300 mil)
SOT27-1
74LV4066D
−40 °C to +125 °C
SO14
plastic small outline package;
14 leads; body width 3.9 mm
SOT108-1
74LV4066DB
−40 °C to +125 °C
SSOP14
plastic shrink small outline package; SOT337-1
14 leads; body width 5.3 mm
74LV4066PW −40 °C to +125 °C
TSSOP14 plastic thin shrink small outline
package; 14 leads; body width
4.4 mm
9397 750 15209
Product data sheet
SOT402-1
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Rev. 03 — 4 July 2005
2 of 23
74LV4066
Philips Semiconductors
Quad bilateral switches
5. Functional diagram
1
13
4
5
8
6
11
12
1Y
1Z
1
2
13 #
1E
1
2Y
2Z
2
4
13 #
3
5#
4
2E
3
5#
3Y
3Z
8
8
9
9
6#
6#
3E
11
4Y
4Z
10
10
4E
11
12 #
12 #
1
1
2
X1
1
1
3
X1
1
1
9
X1
1
1
10
X1
(b)
(a)
001aad270
001aad269
Fig 1. Logic symbol
Fig 2. IEC logic diagram
nY
nE
VCC
GND
VCC
nZ
001aad271
Fig 3. Logic diagram (one switch)
9397 750 15209
Product data sheet
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Rev. 03 — 4 July 2005
3 of 23
74LV4066
Philips Semiconductors
Quad bilateral switches
6. Pinning information
6.1 Pinning
1Y
1
14 VCC
1Z
2
13 1E
2Z
3
12 4E
2Y
4
2E
5
3E
6
GND
7
4066
11 4Y
10 4Z
9
3Z
8
3Y
001aad268
Fig 4. Pin configuration
6.2 Pin description
Table 3:
Pin description
Symbol
Pin
Description
1Y
1
independent input or output
1Z
2
independent output or input
2Z
3
independent output or input
2Y
4
independent input or output
2E
5
enable input
3E
6
enable input
GND
7
ground (0 V)
3Y
8
independent input or output
3Z
9
independent output or input
4Z
10
independent output or input
4Y
11
independent input or output
4E
12
enable input
1E
13
enable input
VCC
14
supply voltage
7. Functional description
7.1 Function table
Table 4:
Function table
Input nE
Switch
LOW
off
HIGH
on
9397 750 15209
Product data sheet
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Rev. 03 — 4 July 2005
4 of 23
74LV4066
Philips Semiconductors
Quad bilateral switches
8. Limiting values
Table 5:
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to
GND (ground = 0 V).
Symbol Parameter
Conditions
VCC
supply voltage
IIK
input diode current
VI < −0.5 V or VI > VCC + 0.5 V
IOK
output diode current
VO < −0.5 V or VO > VCC + 0.5 V
IS
switch source or sink
current
VO = −0.5 V to (VCC + 0.5 V)
Tstg
storage temperature
Ptot
total power dissipation
[1]
Min
Max
Unit
−0.5
+7.0
V
-
±20
mA
-
±50
mA
-
±25
mA
−65
+150
°C
Tamb = −40 °C to +125 °C
DIP14 package
[2]
-
750
mW
SO14 package
[3]
-
500
mW
(T)SSOP14 package
[4]
400
mW
[1]
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2]
DIP14 package: Ptot derates linearly with 12 mW/K above 70 °C.
[3]
SO14 package: Ptot derates linearly with 8 mW/K above 70 °C.
[4]
(T)SSOP14 package: Ptot derates linearly with 5.5 mW/K above 60 °C.
9. Recommended operating conditions
Table 6:
Recommended operating conditions
Symbol
Parameter
Conditions
[1]
Typ
Max
Unit
1.0
3.3
6
V
0
-
VCC
V
VCC
supply voltage
VI
input voltage
VO
output voltage
0
-
VCC
V
Tamb
ambient temperature
in free air
−40
-
+125
°C
tr, tf
input rise and fall times
VCC = 1.0 V to 2.0 V
-
-
500
ns/V
VCC = 2.0 V to 2.7 V
-
-
200
ns/V
VCC = 2.7 V to 3.6 V
-
-
100
ns/V
VCC = 3.6 V to 5.5 V
-
-
50
ns/V
[1]
The static characteristics are guaranteed from VCC = 1.2 V to VCC = 5.5 V, but LV devices are guaranteed to
function down to VCC = 1.0 V (with input levels GND or VCC).
9397 750 15209
Product data sheet
Min
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Rev. 03 — 4 July 2005
5 of 23
74LV4066
Philips Semiconductors
Quad bilateral switches
10. Static characteristics
Table 7:
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
Typ
Max
Unit
HIGH-level input voltage VCC = 1.2 V
0.90
-
-
V
VCC = 2.0 V
1.40
-
-
V
VCC = 2.7 V to 3.6 V
2.00
-
-
V
VCC = 4.5 V
3.15
-
-
V
Tamb = −40 °C to +85 °C
VIH
VIL
ILI
IS(OFF)
LOW-level input voltage
input leakage current
VCC = 6.0 V
4.20
-
-
V
VCC = 1.2 V
-
-
0.30
V
VCC = 2.0 V
-
-
0.60
V
VCC = 2.7 V to 3.6 V
-
-
0.80
V
VCC = 4.5 V
-
-
1.35
V
VCC = 6.0 V
-
-
1.80
V
VCC = 3.6 V
-
-
1.0
µA
VCC = 6.0 V
-
-
2.0
µA
-
-
1.0
µA
-
-
2.0
µA
VCC = 3.6 V
-
-
1.0
µA
VCC = 6.0 V
-
-
2.0
µA
VCC = 3.6 V
-
-
20
µA
VCC = 6.0 V
-
-
40
µA
VI = VCC or GND
analog switch OFF-state VI = VIH or VIL; see Figure 5
current
VCC = 3.6 V
VCC = 6.0 V
IS(ON)
ICC
analog switch ON-state
current
supply current
VI = VIH or VIL; see Figure 6
VI = VCC or GND; IO = 0 A
∆ICC
additional supply current VI = VCC − 0.6 V;
per input
VCC = 2.7 V to 3.6 V
-
-
500
µA
Ci
input capacitance
-
3.5
-
pF
HIGH-level input voltage VCC = 1.2 V
0.90
-
-
V
VCC = 2.0 V
1.40
-
-
V
Tamb = −40 °C to +125 °C
VIH
VIL
LOW-level input voltage
VCC = 2.7 V to 3.6 V
2.00
-
-
V
VCC = 4.5 V
3.15
-
-
V
VCC = 6.0 V
4.20
VCC = 1.2 V
-
-
0.30
V
VCC = 2.0 V
-
-
0.60
V
VCC = 2.7 V to 3.6 V
-
-
0.80
V
VCC = 4.5 V
-
-
1.35
V
VCC = 6.0 V
-
-
1.80
V
9397 750 15209
Product data sheet
V
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Rev. 03 — 4 July 2005
6 of 23
74LV4066
Philips Semiconductors
Quad bilateral switches
Table 7:
Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
ILI
VI = VCC or GND
input leakage current
IS(OFF)
Min
Typ
Max
Unit
VCC = 3.6 V
-
-
1.0
µA
VCC = 6.0 V
-
-
2.0
µA
-
-
1.0
µA
-
-
2.0
µA
VCC = 3.6 V
-
-
1.0
µA
VCC = 6.0 V
-
-
2.0
µA
VCC = 3.6 V
-
-
40
µA
VCC = 6.0 V
-
-
80
µA
-
-
850
µA
analog switch OFF-state VI = VIH or VIL; see Figure 5
current
VCC = 3.6 V
VCC = 6.0 V
IS(ON)
analog switch ON-state
current
VI = VIH or VIL; see Figure 6
supply current
ICC
VI = VCC or GND; IO = 0 A
additional supply current VI = VCC − 0.6 V;
per input
VCC = 2.7 V to 3.6 V
∆ICC
VIL
nE
VIH
nY
nY
nZ
nZ
A
A
A
A
VI = VCC or GND
VO = GND or VCC
VI = VCC or GND
VO (open circuit)
GND
001aad273
Fig 5. Test circuit for measuring OFF-state
current
9397 750 15209
Product data sheet
nE
GND
001aad274
Fig 6. Test circuit for measuring ON-state
current
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Rev. 03 — 4 July 2005
7 of 23
74LV4066
Philips Semiconductors
Quad bilateral switches
Table 8:
ON-resistance
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for test
circuit see Figure 7.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
-
300
-
Ω
Tamb = −40 °C to +85 °C [1]; see Figure 8
RON(peak)
ON-resistance (peak)
VI = VIH or VIL
VCC = 1.2 V
RON(rail)
ON-resistance (rail)
[2]
VCC = 2.0 V
-
60
130
Ω
VCC = 2.7 V
-
41
60
Ω
VCC = 3.0 V to 3.6 V
-
37
72
Ω
VCC = 4.5 V
-
25
52
Ω
VCC = 6.0 V
-
23
47
Ω
-
75
-
Ω
VCC = 2.0 V
-
35
98
Ω
VCC = 2.7 V
-
26
60
Ω
VCC = 3.0 V to 3.6 V
-
24
52
Ω
VCC = 4.5 V
-
15
40
Ω
VCC = 6.0 V
-
13
35
Ω
-
75
-
Ω
VCC = 2.0 V
-
40
110
Ω
VCC = 2.7 V
-
35
72
Ω
VI = VIH or VIL; Vis = GND
VCC = 1.2 V
[2]
VI = VIH or VIL; Vis = VCC
VCC = 1.2 V
RON(flatness)
ON-resistance
(flatness)
[2]
VCC = 3.0 V to 3.6 V
-
30
65
Ω
VCC = 4.5 V
-
22
47
Ω
VCC = 6.0 V
-
20
40
Ω
VI = VIH or VIL; Vis = VCC
VCC = 2.0 V
-
5
-
Ω
VCC = 2.7 V
-
4
-
Ω
VCC = 3.0 V to 3.6 V
-
4
-
Ω
VCC = 4.5 V
-
3
-
Ω
VCC = 6.0 V
-
2
-
Ω
VCC = 2.0 V
-
-
150
Ω
VCC = 2.7 V
-
-
90
Ω
VCC = 3.0 V to 3.6 V
-
-
83
Ω
VCC = 4.5 V
-
-
60
Ω
VCC = 6.0 V
-
-
54
Ω
Tamb = −40 °C to +125 °C
RON(peak)
ON-resistance (peak)
VI = VIH or VIL
9397 750 15209
Product data sheet
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Rev. 03 — 4 July 2005
8 of 23
74LV4066
Philips Semiconductors
Quad bilateral switches
Table 8:
ON-resistance …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for test
circuit see Figure 7.
Symbol
Parameter
Conditions
RON(rail)
ON-resistance (rail)
VI = VIH or VIL; Vis = GND
Min
Typ
Max
Unit
VCC = 2.0 V
-
-
115
Ω
VCC = 2.7 V
-
-
68
Ω
VCC = 3.0 V to 3.6 V
-
-
60
Ω
VCC = 4.5 V
-
-
45
Ω
VCC = 6.0 V
-
-
40
Ω
VCC = 2.0 V
-
-
130
Ω
VCC = 2.7 V
-
-
85
Ω
VI = VIH or VIL; Vis = VCC
VCC = 3.0 V to 3.6 V
-
-
75
Ω
VCC = 4.5 V
-
-
55
Ω
VCC = 6.0 V
-
-
47
Ω
[1]
All typical values are measured at Tamb = 25 °C.
[2]
At supply voltage approaching 1.2 V, the analog switch ON-resistance becomes extremely non-linear.
Therefore it is recommended that these devices be used to transmit digital signals only, when using these
supply voltages.
001aad275
80
RON
(Ω)
60
VIH
nE
VCC = 2.0 V
V
nY
Vis = 0 V to (VCC − GND)
40
nZ
3.0 V
4.5 V
I is
GND
20
001aad272
0
0
1.2
2.4
3.6
4.8
Vis (V)
Fig 7. Test circuit for measuring ON-resistance
Fig 8. ON-resistance as a function of input voltage
9397 750 15209
Product data sheet
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Rev. 03 — 4 July 2005
9 of 23
74LV4066
Philips Semiconductors
Quad bilateral switches
11. Dynamic characteristics
Table 9:
Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 11.
Symbol Parameter
Tamb = −40 °C to +85
tPHL,
tPLH
tPZH,
tPZL
tPHZ,
tPLZ
Conditions
Min Typ Max Unit
°C [1]
propagation delay Vis to Vos
turn-on time nE to Vos
turn-off time nE to Vos
see Figure 9
VCC = 1.2 V
-
8
-
ns
VCC = 2.0 V
-
5
26
ns
VCC = 2.7 V to 3.6 V
-
3
15
ns
VCC = 4.5 V
-
2
13
ns
VCC = 6.0 V
-
2
10
ns
VCC = 1.2 V
-
40
-
ns
VCC = 2.0 V
-
22
43
ns
VCC = 2.7 V to 3.6 V
-
12
25
ns
VCC = 3.3 V; CL = 15 pF
-
10
-
ns
VCC = 4.5 V
-
10
21
ns
VCC = 6.0 V
-
8
16
ns
VCC = 1.2 V
-
50
-
ns
VCC = 2.0 V
-
27
65
ns
see Figure 9
see Figure 9
VCC = 2.7 V to 3.6 V
-
15
38
ns
VCC = 3.3 V; CL = 15 pF
-
13
-
ns
VCC = 4.5 V
-
13
32
ns
-
12
28
ns
-
11
-
pF
VCC = 6.0 V
CPD
power dissipation
capacitance per switch
VCC = 3.3 V; CL = 15 pF
[2] [3]
Tamb = −40 °C to +125 °C
tPHL,
tPLH
tPZH,
tPZL
propagation delay Vis to Vos
turn-on time nE to Vos
see Figure 9
VCC = 2.0 V
-
-
31
ns
VCC = 2.7 V to 3.6 V
-
-
18
ns
VCC = 4.5 V
-
-
15
ns
VCC = 6.0 V
-
-
12
ns
VCC = 2.0 V
-
-
51
ns
VCC = 2.7 V to 3.6 V
-
-
30
ns
VCC = 4.5 V
-
-
26
ns
VCC = 6.0 V
-
-
20
ns
see Figure 9
9397 750 15209
Product data sheet
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Rev. 03 — 4 July 2005
10 of 23
74LV4066
Philips Semiconductors
Quad bilateral switches
Table 9:
Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 11.
Symbol Parameter
Conditions
tPHZ,
tPLZ
see Figure 9
turn-off time nE to Vos
VCC = 2.0 V
-
-
81
ns
VCC = 2.7 V to 3.6 V
-
-
47
ns
VCC = 4.5 V
-
-
40
ns
VCC = 6.0 V
-
-
34
ns
[1]
Typical values are measured at nominal VCC and Tamb = 25 °C.
[2]
CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + Σ[(CL + CS) × VCC2 × fo] where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
CS = maximum switch capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
Σ[(CL + CS) × VCC2 × fo] = sum of the outputs.
[3]
The condition is VI = GND to VCC.
9397 750 15209
Product data sheet
Min Typ Max Unit
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Rev. 03 — 4 July 2005
11 of 23
74LV4066
Philips Semiconductors
Quad bilateral switches
12. Waveforms
VI
VM
Vis
VM
GND
t PLH
t PHL
VOH
VM
Vos
VM
VOL
001aad284
Measurement points are given in Table 10.
VOL and VOH are typical voltage output drop that occur with the output load.
Fig 9. Input to output propagation delays
VI
nE input
VM
GND
t PLZ
t PZL
VCC
output
LOW-to-OFF
OFF-to-LOW
VM
VX
VOL
t PHZ
VOH
t PZH
VY
output
HIGH-to-OFF
OFF-to-HIGH
VM
GND
outputs
enabled
outputs
disabled
outputs
enabled
001aad285
Measurement points are given in Table 10.
VOL and VOH are typical voltage output drop that occur with the output load.
Fig 10. Turn-on and turn-off times for the inputs to the output
Table 10:
Measurement points
Supply voltage
Input
Output
VCC
VM
VM
VX
VY
≥ 2.7 V
1.5 V
1.5 V
VOL + 0.3
VOH − 0.3 V
< 2.7 V
0.5 × VCC
0.5 × VCC
VOL + 0.15
VOH − 0.15 V
9397 750 15209
Product data sheet
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Rev. 03 — 4 July 2005
12 of 23
74LV4066
Philips Semiconductors
Quad bilateral switches
VI
tW
90 %
negative
pulse
90 %
VM
0V
VI
tTHL(tf)
tTLH(tr)
tTLH(tr)
tTHL(tf)
90 %
positive
pulse
0V
VM
10 %
VM
VM
10 %
10 %
tW
001aac221
a. Input pulse definition
VEXT
VCC
PULSE
GENERATOR
VI
RL
VO
DUT
CL
RT
RL
mna616
Test data is given in Table 11.
Definitions test circuit:
RL = Load resistor.
CL = Load capacitance includes jig and probe capacitance.
RT = Termination resistance should be equal to Zo of the pulse generator.
VEXT = Test voltage for switching times.
b. Test circuit
Fig 11. Load circuitry for switching times
Table 11:
Test data
Supply voltage
Input
VCC
VI
tr, tf
CL
RL [1]
tPHZ, tPZH
tPLZ, tPZL
tPLH, tPHL
< 2.7 V
VCC
≤ 2.5 ns
50 pF
1 kΩ
GND
2 × VCC
open
2.7 V to 3.6 V
2.7 V
≤ 2.5 ns
50 pF
1 kΩ
GND
2 × VCC
open
≥ 4.5 V
VCC
≤ 2.5 ns
50 pF
1 kΩ
GND
2 × VCC
open
[1]
Load
RL = ∞ Ω for measuring the propagation delays tPLH and tPHL.
9397 750 15209
Product data sheet
VEXT
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Rev. 03 — 4 July 2005
13 of 23
74LV4066
Philips Semiconductors
Quad bilateral switches
13. Additional dynamic characteristics
Table 12: Additional dynamic characteristics
Voltages are referenced to GND (ground = 0 V); Vis is the input voltage at pin nY or nZ, whichever is
assigned as an input; Vos is the output voltage at pin nY or nZ, whichever is assigned as an output.
Symbol
Parameter
Conditions
dsin
sine-wave distortion
RL = 10 kΩ; f = 1 kHz;
CL = 50 pF; see Figure 12
Min Typ Max Unit
VCC = 3.0 V; Vis = 2.75 V (p-p)
-
0.04 -
%
VCC = 6.0 V; Vis = 5.50 V (p-p)
-
0.02 -
%
-
0.12 -
%
-
0.06 -
%
-
−50
-
dB
-
−50
-
dB
-
−60
-
dB
-
−60
-
dB
VCC = 3.0 V
-
110 -
mV
VCC = 6.0 V
-
220 -
mV
VCC = 3.0 V
-
180 -
MHz
VCC = 6.0 V
-
200 -
MHz
-
8
pF
RL = 10 kΩ; f = 10 kHz;
CL = 50 pF; see Figure 12
VCC = 3.0 V; Vis = 2.75 V (p-p)
VCC = 6.0 V; Vis = 5.50 V (p-p)
αOFF(feedthru) switch OFF-state
signal feed-through
attenuation
RL = 600 kΩ; f = 1 MHz;
CL = 50 pF; see Figure 13 and
Figure 14
[1]
VCC = 3.0 V
VCC = 6.0 V
αct(S)
crosstalk between
switches
[1]
RL = 600 kΩ; f = 1 MHz;
CL = 50 pF; see Figure 15
VCC = 3.0 V
VCC = 6.0 V
Vct(pp)
fmax
CS
crosstalk voltage
between enable input
to any switch
(peak-to-peak value)
minimum frequency
response (−3 dB)
RL = 600 kΩ; f = 1 MHz;
CL = 50 pF; see Figure 16 and
Figure 17
RL = 50 kΩ; CL = 50 pF;
see Figure 18 and Figure 19
maximum switch
capacitance
[3]
[1]
Adjust input voltage Vis is 0 dBm level (0 dBm = 1 mW into 600 Ω).
[2]
Pin nE: square wave between VCC and GND, tr = tf = 6 ns.
[3]
Adjust input voltage Vis is 0 dBm level at Vos for 1 MHz (0 dBm = 1 mW into 50 Ω).
9397 750 15209
Product data sheet
[2]
-
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Rev. 03 — 4 July 2005
14 of 23
74LV4066
Philips Semiconductors
Quad bilateral switches
VCC
10 µF
Vis
fin = 1 kHz
sine-wave
2RL
nY/nZ
nZ/nY
2RL
channel
ON
Vos
distortion
meter
CL
GND
001aad282
Fig 12. Test circuit for measuring sine-wave distortion
001aad276
0
α OFF(feedthru)
(dB)
−20
VCC
0.1 µF
Vis
−40
2RL
nY/nZ
nZ/nY
channel
OFF
2RL
CL
Vos
−60
dB
GND
−80
001aad283
−100
102
10
103
104
105
106
f (kHz)
VCC = 3.0 V; GND = 0 V; RL = 50 Ω;
RSOURCE = 1 kΩ.
Fig 13. Test circuit for measuring switch OFF-state
signal feed-through
Fig 14. Switch OFF-state signal feed-through as a
function of frequency
VCC
0.1 µF
2RL
2RL
RL
Vis
nY/nZ
nZ/nY
channel
ON
VCC
VCC
2RL
2RL
nY/nZ
CL
nZ/nY
RL
2RL
channel
OFF
GND
dB
GND
001aad314
a. Channel on condition
CL
Vos
001aad278
b. Channel off condition
Fig 15. Test circuit for measuring crosstalk between switches
9397 750 15209
Product data sheet
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Rev. 03 — 4 July 2005
15 of 23
74LV4066
Philips Semiconductors
Quad bilateral switches
VCC
VCC
nE
VCC
GND
2RL
nY/nZ
2RL
nZ/nY
DUT
2RL
VCT(pp)
2RL
oscilloscope
CL
001aad281
GND
001aad279
Fig 16. Test circuit for measuring crosstalk between
enable and any switch
Fig 17. Crosstalk definition (oscilloscope output)
001aad277
5
Vos
(dB)
VCC
0.1 µF
Vis
2RL
nY/nZ
nZ/nY
sine-wave
channel
ON
2RL
CL
Vos
0
dB
GND
001aad280
−5
10
102
103
104
105
106
f (kHz)
VCC = 3.0 V; GND = 0 V; RL = 50 Ω;
RSOURCE = 1 kΩ.
Fig 18. Test circuit for measuring minimum frequency
response
Fig 19. Frequency response
9397 750 15209
Product data sheet
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Rev. 03 — 4 July 2005
16 of 23
74LV4066
Philips Semiconductors
Quad bilateral switches
14. Package outline
DIP14: plastic dual in-line package; 14 leads (300 mil)
SOT27-1
ME
seating plane
D
A2
A
A1
L
c
e
Z
w M
b1
(e 1)
b
MH
8
14
pin 1 index
E
1
7
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
A
max.
A1
min.
A2
max.
b
b1
c
D (1)
E (1)
e
e1
L
ME
MH
w
Z (1)
max.
mm
4.2
0.51
3.2
1.73
1.13
0.53
0.38
0.36
0.23
19.50
18.55
6.48
6.20
2.54
7.62
3.60
3.05
8.25
7.80
10.0
8.3
0.254
2.2
inches
0.17
0.02
0.13
0.068
0.044
0.021
0.015
0.014
0.009
0.77
0.73
0.26
0.24
0.1
0.3
0.14
0.12
0.32
0.31
0.39
0.33
0.01
0.087
Note
1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.
REFERENCES
OUTLINE
VERSION
IEC
JEDEC
JEITA
SOT27-1
050G04
MO-001
SC-501-14
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-13
Fig 20. Package outline SOT27-1 (DIP14)
9397 750 15209
Product data sheet
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Rev. 03 — 4 July 2005
17 of 23
74LV4066
Philips Semiconductors
Quad bilateral switches
SO14: plastic small outline package; 14 leads; body width 3.9 mm
SOT108-1
D
E
A
X
c
y
HE
v M A
Z
8
14
Q
A2
A
(A 3)
A1
pin 1 index
θ
Lp
1
L
7
e
detail X
w M
bp
0
2.5
5 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (1)
e
HE
L
Lp
Q
v
w
y
Z (1)
mm
1.75
0.25
0.10
1.45
1.25
0.25
0.49
0.36
0.25
0.19
8.75
8.55
4.0
3.8
1.27
6.2
5.8
1.05
1.0
0.4
0.7
0.6
0.25
0.25
0.1
0.7
0.3
0.01
0.019 0.0100 0.35
0.014 0.0075 0.34
0.16
0.15
0.010 0.057
inches 0.069
0.004 0.049
0.05
0.244
0.039
0.041
0.228
0.016
0.028
0.024
0.01
0.01
0.028
0.004
0.012
θ
o
8
o
0
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
REFERENCES
OUTLINE
VERSION
IEC
JEDEC
SOT108-1
076E06
MS-012
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-19
Fig 21. Package outline SOT108-1 (SO14)
9397 750 15209
Product data sheet
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Rev. 03 — 4 July 2005
18 of 23
74LV4066
Philips Semiconductors
Quad bilateral switches
SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm
D
SOT337-1
E
A
X
c
y
HE
v M A
Z
8
14
Q
A2
A
(A 3)
A1
pin 1 index
θ
Lp
L
7
1
detail X
w M
bp
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (1)
e
HE
L
Lp
Q
v
w
y
Z (1)
θ
mm
2
0.21
0.05
1.80
1.65
0.25
0.38
0.25
0.20
0.09
6.4
6.0
5.4
5.2
0.65
7.9
7.6
1.25
1.03
0.63
0.9
0.7
0.2
0.13
0.1
1.4
0.9
8
o
0
o
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
SOT337-1
REFERENCES
IEC
JEDEC
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-19
MO-150
Fig 22. Package outline SOT337-1 (SSOP14)
9397 750 15209
Product data sheet
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Rev. 03 — 4 July 2005
19 of 23
74LV4066
Philips Semiconductors
Quad bilateral switches
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm
SOT402-1
E
D
A
X
c
y
HE
v M A
Z
8
14
Q
(A 3)
A2
A
A1
pin 1 index
θ
Lp
L
1
7
e
detail X
w M
bp
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (2)
e
HE
L
Lp
Q
v
w
y
Z (1)
θ
mm
1.1
0.15
0.05
0.95
0.80
0.25
0.30
0.19
0.2
0.1
5.1
4.9
4.5
4.3
0.65
6.6
6.2
1
0.75
0.50
0.4
0.3
0.2
0.13
0.1
0.72
0.38
8
o
0
o
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
SOT402-1
REFERENCES
IEC
JEDEC
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-18
MO-153
Fig 23. Package outline SOT402-1 (TSSOP14)
9397 750 15209
Product data sheet
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Rev. 03 — 4 July 2005
20 of 23
74LV4066
Philips Semiconductors
Quad bilateral switches
15. Revision history
Table 13:
Revision history
Document ID
Release date
Data sheet status
Change notice
Doc. number
Supersedes
74LV4066_3
20050704
Product data sheet
-
9397 750 15209
74LV4066_2
Modifications:
74LV4066_2
•
The format of this data sheet has been redesigned to comply with the new presentation and
information standard of Philips Semiconductors.
•
Table 2: corrected package names.
19980623
Product specification
-
9397 750 15209
Product data sheet
9397 750 04659
-
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Rev. 03 — 4 July 2005
21 of 23
74LV4066
Philips Semiconductors
Quad bilateral switches
16. Data sheet status
Level
Data sheet status [1]
Product status [2] [3]
Definition
I
Objective data
Development
This data sheet contains data from the objective specification for product development. Philips
Semiconductors reserves the right to change the specification in any manner without notice.
II
Preliminary data
Qualification
This data sheet contains data from the preliminary specification. Supplementary data will be published
at a later date. Philips Semiconductors reserves the right to change the specification without notice, in
order to improve the design and supply the best possible product.
III
Product data
Production
This data sheet contains data from the product specification. Philips Semiconductors reserves the
right to make changes at any time in order to improve the design, manufacturing and supply. Relevant
changes will be communicated via a Customer Product/Process Change Notification (CPCN).
[1]
Please consult the most recently issued data sheet before initiating or completing a design.
[2]
The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at
URL http://www.semiconductors.philips.com.
[3]
For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
17. Definitions
customers using or selling these products for use in such applications do so
at their own risk and agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Short-form specification — The data in a short-form specification is
extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Right to make changes — Philips Semiconductors reserves the right to
make changes in the products - including circuits, standard cells, and/or
software - described or contained herein in order to improve design and/or
performance. When the product is in full production (status ‘Production’),
relevant changes will be communicated via a Customer Product/Process
Change Notification (CPCN). Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no
license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are
free from patent, copyright, or mask work right infringement, unless otherwise
specified.
Limiting values definition — Limiting values given are in accordance with
the Absolute Maximum Rating System (IEC 60134). Stress above one or
more of the limiting values may cause permanent damage to the device.
These are stress ratings only and operation of the device at these or at any
other conditions above those given in the Characteristics sections of the
specification is not implied. Exposure to limiting values for extended periods
may affect device reliability.
Application information — Applications that are described herein for any
of these products are for illustrative purposes only. Philips Semiconductors
make no representation or warranty that such applications will be suitable for
the specified use without further testing or modification.
19. Trademarks
18. Disclaimers
Notice — All referenced brands, product names, service names and
trademarks are the property of their respective owners.
Life support — These products are not designed for use in life support
appliances, devices, or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors
20. Contact information
For additional information, please visit: http://www.semiconductors.philips.com
For sales office addresses, send an email to: [email protected]
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Product data sheet
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Rev. 03 — 4 July 2005
22 of 23
74LV4066
Philips Semiconductors
Quad bilateral switches
21. Contents
1
2
3
4
5
6
6.1
6.2
7
7.1
8
9
10
11
12
13
14
15
16
17
18
19
20
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Quick reference data . . . . . . . . . . . . . . . . . . . . . 2
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 3
Pinning information . . . . . . . . . . . . . . . . . . . . . . 4
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
Functional description . . . . . . . . . . . . . . . . . . . 4
Function table . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5
Recommended operating conditions. . . . . . . . 5
Static characteristics. . . . . . . . . . . . . . . . . . . . . 6
Dynamic characteristics . . . . . . . . . . . . . . . . . 10
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Additional dynamic characteristics . . . . . . . . 14
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 17
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 21
Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 22
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Contact information . . . . . . . . . . . . . . . . . . . . 22
© Koninklijke Philips Electronics N.V. 2005
All rights are reserved. Reproduction in whole or in part is prohibited without the prior
written consent of the copyright owner. The information presented in this document does
not form part of any quotation or contract, is believed to be accurate and reliable and may
be changed without notice. No liability will be accepted by the publisher for any
consequence of its use. Publication thereof does not convey nor imply any license under
patent- or other industrial or intellectual property rights.
Date of release: 4 July 2005
Document number: 9397 750 15209
Published in The Netherlands