Philips Semiconductors Product specification Silicon Diffused Power Transistor BUJ105AB GENERAL DESCRIPTION High-voltage, high-speed planar-passivated npn power switching transistor in SOT404 (D2-PAK) surface-mount package intended for use in high frequency electronic lighting ballast applications, converters, inverters, switching regulators, motor control systems, etc. QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS VCESM VCBO VCEO IC ICM Ptot VCEsat hFEsat tf Collector-emitter voltage peak value Collector-Base voltage (open emitter) Collector-emitter voltage (open base) Collector current (DC) Collector current peak value Total power dissipation Collector-emitter saturation voltage VBE = 0 V PIN MAX. UNIT 0.3 11 20 700 700 400 8 16 125 1.0 15 50 V V V A A W V Tmb ≤ 25 ˚C IC = 4.0 A;IB = 0.8 A IC = 4.0 A; VCE = 5 V IC = 5 A; IB1 = 1 A Fall time PINNING - SOT404 TYP. PIN CONFIGURATION SYMBOL DESCRIPTION c mb 1 base 2 collector 3 emitter mb collector ns b 2 1 e 3 LIMITING VALUES8 Limiting values in accordance with the Absolute Maximum Rating System (IEC 134) SYMBOL PARAMETER CONDITIONS VCESM VCEO VCBO IC ICM IB IBM Ptot Tstg Tj Collector to emitter voltage Collector to emitter voltage (open base) Collector to base voltage (open emitter) Collector current (DC) Collector current peak value Base current (DC) Base current peak value Total power dissipation Storage temperature Junction temperature VBE = 0 V Tmb ≤ 25 ˚C MIN. MAX. UNIT -65 - 700 400 700 8 16 4 8 125 150 150 V V V A A A A W ˚C ˚C TYP. MAX. UNIT - 1.0 K/W 55 - K/W THERMAL RESISTANCES SYMBOL PARAMETER Rth j-mb Thermal resistance junction to mounting base Rth j-a Thermal resistance junction to ambient October 2001 CONDITIONS minimum footprint, FR4 board 1 Rev 1.000 Philips Semiconductors Product specification Silicon Diffused Power Transistor BUJ105AB STATIC CHARACTERISTICS Tmb = 25 ˚C unless otherwise specified SYMBOL PARAMETER CONDITIONS 1 ICES,ICBO ICES Collector cut-off current ICEO IEBO VCEOsust Collector cut-off current Emitter cut-off current Collector-emitter sustaining voltage VCEsat VBEsat hFE hFE hFEsat Collector-emitter saturation voltage Base-emitter saturation voltage DC current gain VBE = 0 V; VCE = VCESMmax VBE = 0 V; VCE = VCESMmax; Tj = 125 ˚C VCEO = VCEOMmax (400V) VEB = 9 V; IC = 0 A IB = 0 A; IC = 10 mA; L = 25 mH IC = 4.0 A;IB = 0.8 A IC = 4.0 A;IB = 0.8 A IC = 1 mA; VCE = 5 V IC = 500 mA; VCE = 5 V IC = 4.0 A; VCE = 5 V MIN. TYP. MAX. UNIT - - 0.2 0.5 mA mA 400 - 0.1 1 - mA mA V 10 13 8 0.3 1.0 14 23 11 1.0 1.5 34 36 15 V V TYP. MAX. UNIT 0.65 1.8 0.3 1 2.5 0.5 µs µs µs 1.2 20 1.7 50 µs ns 1.4 25 1.9 100 µs ns DYNAMIC CHARACTERISTICS Tmb = 25 ˚C unless otherwise specified SYMBOL ton ts tf PARAMETER CONDITIONS Switching times (resistive load) ICon = 5 A; IBon = -IBoff = 1 A; RL = 75 ohms; VBB2 = 4 V; Turn-on time Turn-off storage time Turn-off fall time Switching times (inductive load) ts tf Turn-off storage time Turn-off fall time Switching times (inductive load) ts tf Turn-off storage time Turn-off fall time ICon = 5 A; IBon = 1 A; LB = 1 µH; -VBB = 5 V ICon = 5 A; IBon = 1 A; LB = 1 µH; -VBB = 5 V; Tj = 100 ˚C 1 Measured with half sine-wave voltage (curve tracer). October 2001 2 Rev 1.000 Philips Semiconductors Product specification Silicon Diffused Power Transistor BUJ105AB ICon 90 % + 50v 100-200R 90 % IC 10 % ts Horizontal ton tf toff Oscilloscope IBon IB Vertical 10 % 300R 1R tr 30ns 6V 30-60 Hz -IBoff Fig.1. Test circuit for VCEOsust. Fig.4. Switching times waveforms with resistive load. VCC IC / mA LC 250 IBon 100 LB T.U.T. 10 0 -VBB min VCE / V VCEOsust Fig.2. Oscilloscope display for VCEOsust. VCC Fig.5. Test circuit inductive load. = 300 V; -VBE = 5 V; LC = 200 uH; LB = 1 uH VCC ICon 90 % IC RL VIM 10 % RB 0 T.U.T. ts tf t toff tp IB IBon T t -IBoff Fig.3. Test circuit resistive load. VIM = -6 to +8 V VCC = 250 V; tp = 20 µs; δ = tp / T = 0.01. RB and RL calculated from ICon and IBon requirements. October 2001 Fig.6. Switching times waveforms with inductive load. 3 Rev 1.000 Philips Semiconductors Product specification Silicon Diffused Power Transistor 120 BUJ105AB Normalised Power Derating PD% VCEsat/V 110 2.0 100 90 1.6 80 IC=1A 70 2A 3A 4A 1.2 60 50 0.8 40 30 0.4 20 10 0 0 20 40 60 80 Tmb / C 100 120 0.0 0.01 140 0.10 1.00 10.00 IB/A Fig.7. Normalised power dissipation. PD% = 100⋅PD/PD 25˚C = f (Tmb) Fig.10. Collector-Emitter saturation voltage. Solid lines = typ values, VCEsat = f(IB); Tj=25˚C. VBESAT/V 1.4 HFE 50 1.3 30 Tj=100C 1.2 20 25C 15 1.1 -40C 10 1 0.9 5 -40C 0.8 Tj=100C 25C 0.7 2 VCE=1V 0.6 0.01 0.05 0.1 0.3 IC/A 1 2 3 5 0.5 0.1 10 Fig.8. Typical DC current gain. hFE = f(IC) parameter VCE 0.5 1 IC/A 2 5 10 Fig.11. Base-Emitter saturation voltage. Solid lines = typ values, VBEsat = f(IC); at IC/IB =4. HFE 50 VCESAT/V 0.6 30 0.5 Tj=100C Tj=100C 20 25C 0.4 15 -40C 0.3 10 25C 0.2 5 -40C VCE=5V 2 0.01 0.05 0.1 0.1 0.3 IC/A 1 2 3 5 0 0.2 10 Fig.9. Typical DC current gain. hFE = f(IC) parameter VCE October 2001 0.4 0.6 1 IC/A 2 5 6 Fig.12. Collector-Emitter saturation voltage. Solid lines = typ values, VCEsat = f(IC); at IC/IB =4. 4 Rev 1.000 Philips Semiconductors Product specification Silicon Diffused Power Transistor BUJ105AB 10 IC/A 11 Zth(j-mb) (K/W) 10 9 1 8 δ= 0.5 7 6 0.2 δ= P 0.1 tp 5 T -5V 10-1 4 -3V 0.02 0.05 3 t tp T Single pulse 2 -1V 1 10-2 10-4 10-1 10-2 10-3 1 tp (s) 10 0 0 Fig.13. Transient thermal impedance. Zth j-mb = f(t); parameter δ = tp/T 100 200 300 400 500 VCEclamp/V 600 700 800 Fig.15. Reverse bias safe operating area (Tj < Tjmax) for -VBE = 5V,3V & 1V. VCC LC VCL(RBSOAR) IBon -VBB PROBE POINT LB T.U.T. Fig.14. Test circuit for reverse bias safe operating area. Vclamp < 700V; Vcc = 150V; -Vbe = 5V,3V & 1V; LB = 1µH; LC = 200µH. October 2001 5 Rev 1.000 Philips Semiconductors Product specification Silicon Diffused Power Transistor BUJ105AB MECHANICAL DATA Dimensions in mm 4.5 max 1.4 max 10.3 max Net Mass: 1.4 g 11 max 15.4 2.5 0.85 max (x2) 0.5 2.54 (x2) Fig.16. SOT404 : centre pin connected to mounting base. MOUNTING INSTRUCTIONS Dimensions in mm 11.5 9.0 17.5 2.0 3.8 5.08 Fig.17. SOT404 : soldering pattern for surface mounting. Notes 1. Plastic meets UL94 V0 at 1/8". October 2001 6 Rev 1.000 Philips Semiconductors Product specification Silicon Diffused Power Transistor BUJ105AB DEFINITIONS DATA SHEET STATUS DATA SHEET STATUS2 PRODUCT STATUS3 DEFINITIONS Objective data Development This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in ordere to improve the design and supply the best possible product Product data Production This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Changes will be communicated according to the Customer Product/Process Change Notification (CPCN) procedure SNW-SQ-650A Limiting values Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of this specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. Philips Electronics N.V. 2001 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. 2 Please consult the most recently issued datasheet before initiating or completing a design. 3 The product status of the device(s) described in this datasheet may have changed since this datasheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. October 2001 7 Rev 1.000