FAIRCHILD 74LCX32244

Revised June 2002
74LCX32244
Low Voltage 32-Bit Buffer/Line Driver
with 5V Tolerant Inputs and Outputs
General Description
Features
The LCX32244 contains thirty-two non-inverting buffers
with 3-STATE outputs designed to be employed as a memory and address driver, clock driver, or bus oriented transmitter/receiver. The device is nibble controlled. Each nibble
has separate 3-STATE control inputs which can be shorted
together for full 32-bit operation.
■ 5V tolerant inputs and outputs
The LCX32244 is designed for low voltage (2.5V or 3.3V)
VCC applications with capability of interfacing to a 5V signal
environment.
The LCX32244 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining
CMOS low power dissipation.
■ 2.3V–3.6V VCC specifications provided
■ 4.5 ns tPD max (VCC = 3.0V), 20 µA ICC max
■ Power down high impedance inputs and outputs
■ Supports live insertion/withdrawal (Note 1)
■ ±24 mA output drive (VCC = 3.0V)
■ Uses patented noise/EMI reduction circuitry
■ Latch-up performance exceeds 500 mA
■ ESD performance:
Human body model > 2000V
Machine model > 200V
■ Packaged in plastic Fine-Pitch Ball Grid Array (FBGA)
Note 1: To ensure the high-impedance state during power up or down OE
should be tied to VCC through a pull-up resistor: the minimum value or the
resistor is determined by the current-sourcing capability of the driver.
Ordering Code:
Order Number
Package Number
74LCX32244G
(Note 2)(Note 3)
BGA96A
Package Description
96-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
Note 2: Ordering code “G” indicates Trays.
Note 3: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
© 2002 Fairchild Semiconductor Corporation
DS500426
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74LCX32244 Low Voltage 32-Bit Buffer/Line Driver with 5V Tolerant Inputs and Outputs
April 2001
74LCX32244
Connection Diagram
Pin Descriptions
Pin Names
Description
OEn
Output Enable Input (Active LOW)
I0–I31
Inputs
O0–O31
Outputs
FBGA Pin Assignments
1
2
3
4
5
6
A
O1
O0
OE1
OE2
I0
I1
B
O3
O2
GND
GND
I2
I3
C
O5
O4
VCC
VCC
I4
I5
D
O7
O6
GND
GND
I6
I7
E
O9
O8
GND
GND
I8
I9
F
011
O10
VCC
VCC
I10
I11
G
O13
O12
GND
GND
I12
I13
H
O14
O15
OE4
OE3
I15
I14
J
O17
O16
OE5
OE6
I16
I17
K
O19
018
GND
GND
I18
I19
Functional Description
L
O21
O20
VCC
VCC
I20
I21
The LCX32244 contains thirty-two non-inverting buffers
with 3-STATE standard outputs. The device is nibble
(4-bits) controlled with each nibble functioning identically,
but independent of the other. The control pins can be
shorted together to obtain full 32-bit operation. The
3-STATE outputs are controlled by an Output Enable (OEn)
input for each nibble. When OEn is LOW, the outputs are in
2-state mode. When OEn is HIGH, the outputs are in the
high impedance mode, but this does not interfere with
entering new data into the inputs.
M
O23
O22
GND
GND
I22
I23
N
O25
O24
GND
GND
I24
I25
P
O27
O26
VCC
VCC
I26
I27
R
O29
O28
GND
GND
I28
I29
T
O30
O31
OE8
OE7
I31
I30
(Top Thru View)
Truth Table
Inputs
Outputs
OEn
In
L
L
L
L
H
H
H
X
Z
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial (HIGH or LOW, inputs may not float)
Z = High Impedance
Logic Diagrams
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2
On
Symbol
Parameter
Value
VCC
Supply Voltage
−0.5 to +7.0
VI
DC Input Voltage
−0.5 to +7.0
VO
DC Output Voltage
−0.5 to +7.0
Conditions
Units
V
V
Output in 3-STATE
−0.5 to VCC + 0.5
Output in HIGH or LOW State (Note 5)
IIK
DC Input Diode Current
−50
VI < GND
IOK
DC Output Diode Current
−50
VO < GND
+50
VO > VCC
V
mA
mA
IO
DC Output Source/Sink Current
±50
mA
ICC
DC Supply Current per Supply Pin
±100
mA
IGND
DC Ground Current per Ground Pin
±100
mA
TSTG
Storage Temperature
−65 to +150
°C
Recommended Operating Conditions (Note 6)
Symbol
VCC
Parameter
Supply Voltage
VI
Input Voltage
VO
Output Voltage
IOH/IOL
Output Current
TA
Free-Air Operating Temperature
∆t/∆V
Input Edge Rate, VIN = 0.8V–2.0V, VCC = 3.0V
Min
Max
Operating
2.0
3.6
Data Retention
1.5
3.6
0
5.5
HIGH or LOW State
0
VCC
3-STATE
0
5.5
VCC = 3.0V − 3.6V
±24
VCC = 2.7V − 3.0V
±12
VCC = 2.3V − 2.7V
±8
Units
V
V
V
mA
−40
85
°C
0
10
ns/V
Note 4: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated
at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation.
Note 5: IO Absolute Maximum Rating must be observed.
Note 6: Unused inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
Symbol
VIH
VIL
VOH
VOL
Parameter
Conditions
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level Output Voltage
LOW Level Output Voltage
IOH = −100 µA
VCC
(V)
TA = −40°C to +85°C
Min
2.3 − 2.7
1.7
2.7 − 3.6
2.0
Max
V
2.3 − 2.7
0.7
2.7 − 3.6
0.8
2.3 − 3.6
Units
V
VCC − 0.2
IOH = −8 mA
2.3
1.8
IOH = −12 mA
2.7
2.2
IOH = −18 mA
3.0
2.4
IOH = −24 mA
3.0
2.2
IOL = 100 µA
2.3 − 3.6
0.2
IOL = 8 mA
2.3
0.6
IOL = 12 mA
2.7
0.4
IOL = 16 mA
3.0
0.4
V
V
IOL = 24 mA
3.0
0.55
II
Input Leakage Current
0 ≤ VI ≤ 5.5V
2.3 − 3.6
±5.0
µA
IOZ
3-STATE Output Leakage
0 ≤ VO ≤ 5.5V
2.3 − 3.6
±5.0
µA
0
10
µA
VI = V IH or VIL
IOFF
Power-Off Leakage Current
VI or VO = 5.5V
3
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74LCX32244
Absolute Maximum Ratings(Note 4)
74LCX32244
DC Electrical Characteristics
Symbol
(Continued)
Parameter
VCC
Conditions
TA = −40°C to +85°C
(V)
ICC
∆ICC
Quiescent Supply Current
Increase in ICC per Input
Min
Units
Max
VI = VCC or GND
2.3 − 3.6
20
3.6V ≤ VI, VO ≤ 5.5V (Note 7)
2.3 − 3.6
±20
VIH = VCC −0.6V
2.3 − 3.6
500
µA
µA
Note 7: Outputs disabled or 3-STATE only.
AC Electrical Characteristics
TA = −40°C to +85°C, RL = 500 Ω
Symbol
Parameter
VCC = 3.3V ± 0.3V
VCC = 2.7V
VCC = 2.5V ± 0.2V
CL = 50 pF
CL = 50 pF
CL = 30 pF
Min
Max
Min
Max
Min
Max
tPHL
Propagation Delay
1.0
4.5
1.0
5.2
1.0
5.4
tPLH
Data to Output
1.0
4.5
1.0
5.2
1.0
5.4
tPZL
Output Enable Time
1.0
5.5
1.0
6.3
1.0
7.2
1.0
5.5
1.0
6.3
1.0
7.2
1.0
5.4
1.0
5.7
1.0
6.5
1.0
5.4
1.0
5.7
1.0
6.5
VCC
TA = 25°C
(V)
Typical
CL = 50 pF, VIH = 3.3V, VIL = 0V
3.3
0.8
CL = 30 pF, VIH = 2.5V, VIL = 0V
2.5
0.6
CL = 50 pF, VIH = 3.3V, VIL = 0V
3.3
−0.8
CL = 30 pF, VIH = 2.5V, VIL = 0V
2.5
−0.6
tPZH
tPLZ
Output Disable Time
tPHZ
Units
ns
ns
ns
Dynamic Switching Characteristics
Symbol
Parameter
VOLP
Quiet Output Dynamic Peak VOL
VOLV
Quiet Output Dynamic Valley VOL
Conditions
Units
V
V
Capacitance
Typical
Units
CIN
Symbol
Input Capacitance
Parameter
VCC = Open, VI = 0V or VCC
7
pF
COUT
Output Capacitance
VCC = 3.3V, VI = 0V or VCC
8
pF
CPD
Power Dissipation Capacitance
VCC = 3.3V, VI = 0V or VCC, f = 10 MHz
20
pF
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Conditions
4
74LCX32244
AC LOADING and WAVEFORMS Generic for LCX Family
FIGURE 1. AC Test Circuit (CL includes probe and jig capacitance)
Test
Switch
tPLH, tPHL
Open
tPZL, tPLZ
6V at VCC = 3.3 ± 0.3V, and 2.7V
VCC x 2 at VCC = 2.5 ± 0.2V
tPZH, tPHZ
GND
Waveform for Inverting and Non-Inverting Functions
3-STATE Output High Enable and
Disable Times for Logic
Propagation Delay. Pulse Width and trec Waveforms
Setup Time, Hold Time and Recovery Time for Logic
trise and tfall
3-STATE Output Low Enable and
Disable Times for Logic
FIGURE 2. Waveforms
(Input Characteristics; f =1MHz, tr = tf = 3ns)
Symbol
VCC
3.3V ± 0.3V
2.7V
2.5V ± 0.2V
Vmi
1.5V
1.5V
VCC/2
Vmo
1.5V
1.5V
VCC/2
Vx
VOL + 0.3V
VOL + 0.3V
VOL + 0.15V
Vy
VOH − 0.3V
VOH − 0.3V
VOH − 0.15V
5
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74LCX32244
Schematic Diagram Generic for LCX Family
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6
74LCX32244 Low Voltage 32-Bit Buffer/Line Driver with 5V Tolerant Inputs and Outputs
Physical Dimensions inches (millimeters) unless otherwise noted
96-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
Package Number BGA96A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
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