WF512K32-XXX5 HI-RELIABILITY PRODUCT 512Kx32 5V FLASH MODULE, SMD 5962-94612 FEATURES ■ Access Times of 60, 70, 90, 120, 150ns ■ Organized as 512Kx32 ■ Packaging ■ Commercial, Industrial and Military Temperature Ranges • 66 pin, PGA Type, 1.075" square, Hermetic Ceramic HIP (Package 400 (1)) ■ 5 Volt Programming. 5V ± 10% Supply. • 68 lead, 40mm, Low Capacitance Hermetic CQFP (Package 501) ■ Embedded Erase and Program Algorithms • 68 lead, 40mm, Low Profile 3.5mm (0.140"), CQFP (Package 502) ■ Built-in Decoupling Caps for Low Noise Operation ■ Low Power CMOS, 6.5mA Standby ■ TTL Compatible Inputs and CMOS Outputs ■ Page Program Operation and Internal Program Control Time • 68 lead, 22.4mm (0.880") Low Profile CQFP (G2U), 3.5mm (0.140") high, (Package 510) ■ Weight WF512K32-XG2UX5 - 8 grams typical WF512K32-XH1X5 - 13 grams typical WF512K32-XG4X5 - 20 grams typical WF512K32-XG4TX5 - 20 grams typical WF512K32-XG1UX5 - 5 grams typical • 68 lead, 23.9mm (0.940") Low Profile CQFP (G1U), 3.5mm (0.140") high, (Package 519) ■ 100,000 Erase/Program Cycles Minimum ■ Sector Architecture • 8 equal size sectors of 64KBytes each • Any combination of sectors can be concurrently erased. Also supports full chip erase FIG. 1 1. Call factory for PGA type (HIP) package options. Note: See Flash Programming Application Note 4M5 for algorithms. PIN CONFIGURATION FOR WF512K32N-XH1X5 PIN DESCRIPTION TOP VIEW 1 12 23 34 45 56 I/O8 WE2 I/O15 I/O24 VCC I/O31 I/O9 CS2 I/O14 I/O25 CS4 I/O30 I/O10 GND I/O13 I/O26 WE4 I/O29 A7 I/O27 I/O28 OE A12 A4 A1 A9 A17 NC A5 A2 A0 A15 WE1 A13 A6 A3 A18 VCC I/O7 A8 WE3 I/O23 A14 I/O11 I/O12 A16 A10 A11 I/O0 CS1 I/O6 I/O16 CS3 I/O22 I/O1 NC I/O5 I/O17 GND I/O21 I/O2 I/O3 I/O4 I/O18 I/O19 I/O20 22 33 44 55 A0-18 Address Inputs WE1-4 Write Enables CS1-4 Chip Selects OE Output Enable VCC Power Supply GND Ground NC Not Connected W E2 CS2 W E3 CS3 W E4 CS4 OE A0-18 512K x 8 512K x 8 8 512K x 8 8 512K x 8 8 66 I/O0-7 April 2001 Rev. 4 Data Inputs/Outputs BLOCK DIAGRAM W E1 CS1 8 11 I/O0-31 1 I/O8-15 I/O16-23 I/O24-31 White Electronic Designs Corporation • Phoenix, AZ • (602) 437-1520 WF512K32-XXX5 FIG. 2 PIN CONFIGURATION FOR WF512K32F-XG4X5 (Low Capacitance) AND WF512K32-XG4TX5 TOP VIEW NC A0 A1 A2 A3 A4 A5 CS1 GND CS3 WE A6 A7 A8 A9 A10 VCC PIN DESCRIPTION 9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 I/O0 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 GND I/O8 I/O9 I/O10 I/O11 I/O12 I/O13 I/O14 I/O15 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 I/O16 I/O17 I/O18 I/O19 I/O20 I/O21 I/O22 I/O23 GND I/O24 I/O25 I/O26 I/O27 I/O28 I/O29 I/O30 I/O31 I/O0-31 Data Inputs/Outputs A0-18 Address Inputs WE Write Enable CS1-4 Chip Selects OE Output Enable VCC Power Supply GND Ground NC Not Connected BLOCK DIAGRAM CS 3 CS 2 CS 1 CS 4 WE OE A0-18 512K x 8 512K x 8 512K x 8 512K x 8 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 VCC A11 A12 A13 A14 A15 A16 CS2 OE CS4 A17 A18 NC NC NC NC NC FIG. 3 8 I/O16-23 I/O8-15 I/O0-7 I/O24-31 PIN CONFIGURATION FOR WF512K32-XG2UX5 AND WF512K32-XG1UX5 TOP VIEW NC A0 A1 A2 A3 A4 A5 CS3 GND CS4 WE1 A6 A7 A8 A9 A10 VCC PIN DESCRIPTION I/O0-31 Data Inputs/Outputs 9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 I/O0 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 GND I/O8 I/O9 I/O10 I/O11 I/O12 I/O13 I/O14 I/O15 8 8 8 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 I/O16 I/O17 I/O18 I/O19 I/O20 I/O21 I/O22 I/O23 GND I/O24 I/O25 I/O26 I/O27 I/O28 I/O29 I/O30 I/O31 WE1-4 Write Enables CS1-4 Chip Selects OE Output Enable VCC Power Supply GND Ground WE 1 CS 1 WE 2 CS 2 WE 3 CS 3 WE 4 CS 4 OE A0-18 A16 CS1 OE CS2 A17 WE2 WE3 WE4 A18 NC NC A15 A14 A13 A12 A11 VCC Address Inputs BLOCK DIAGRAM 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 512K x 8 8 I/O0-7 White Electronic Designs Corporation • Phoenix, AZ • (602) 437-1520 A0-18 2 512K x 8 8 I/O8-15 512K x 8 8 I/O16-23 512K x 8 8 I/O24-31 WF512K32-XXX5 ABSOLUTE MAXIMUM RATINGS (1) Parameter CAPACITANCE (TA = +25°C) Unit Parameter Symbol Conditions Operating Temperature -55 to +125 °C Supply Voltage Range (VCC) -2.0 to +7.0 V OE capacitance COE VIN = 0 V, f = 1.0 MHz Signal voltage range (any pin except A9) (2) -2.0 to +7.0 V CWE VIN = 0 V, f = 1.0 MHz Storage Temperature Range -65 to +150 °C +300 °C WE1-4 capacitance HIP (PGA) CQFP G4T CQFP G2U/G1U Lead Temperature (soldering, 10 seconds) Data Retention (Mil Temp) 20 years Endurance - write/erase cycles (Mil Temp) 100,000 cycles min. A9 Voltage for sector protect (VID) (3) -2.0 to +14.0 V NOTES: 1. Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2. Minimum DC voltage on input or I/O pins is -0.5V. During voltage transitions, inputs may overshoot VSS to -2.0 V for periods of up to 20ns. Maximum DC voltage on output and I/O pins is VCC + 0.5V. During voltage transitions, outputs may overshoot to Vcc + 2.0 V for periods of up to 20ns. 3. Minimum DC input voltage on A9 pin is -0.5V. During voltage transitions, A 9 may overshoot Vss to -2V for periods of up to 20ns. Maximum DC input voltage on A9 is +13.5V which may overshoot to 14.0 V for periods up to 20ns. Symbol Min Max Unit Supply Voltage V CC 4.5 5.5 V Input High Voltage V IH 2.0 V CC + 0.5 V Input Low Voltage V IL -0.5 +0.8 V Operating Temp. (Mil.) TA -55 +125 °C Operating Temp. (Ind.) TA -40 +85 °C A9 Voltage for Sector Protect VID 11.5 12.5 V Unit 50 pF pF 20 50 15 CS1-4 capacitance CCS VIN = 0 V, f = 1.0 MHz 20 pF Data I/O capacitance CI/O VI/O = 0 V, f = 1.0 MHz 20 pF Address input capacitance CAD VIN = 0 V, f = 1.0 MHz 50 pF This parameter is guaranteed by design but not tested. LOW CAPACITANCE CQFP (TA = +25°C) Parameter RECOMMENDED OPERATING CONDITIONS Parameter Max Symbol Conditions Max Unit OE capacitance COE VIN = 0 V, f = 1.0 MHz 32 pF CQFP G4 capacitance CWE VIN = 0 V, f = 1.0 MHz 32 pF CS1-4 capacitance CCS VIN = 0 V, f = 1.0 MHz 15 pF Data I/O capacitance CI/O VI/O = 0 V, f = 1.0 MHz 15 pF Address input capacitance CAD VIN = 0 V, f = 1.0 MHz 32 pF This parameter is guaranteed by design but not tested. DC CHARACTERISTICS - CMOS COMPATIBLE (VCC = 5.0V, VSS = 0V, TA = -55°C to +125°C) Parameter Max Unit I LI V CC = 5.5, V IN = GND or VCC 10 µA I LOx32 V CC = 5.5, V IN = GND or VCC 10 µA ICC1 CS = VIL, OE = VIH, f = 5MHz 190 mA VCC Active Current for Program or Erase (2) ICC2 CS = VIL, OE = VIH 240 mA V CC Standby Current I CC4 V CC = 5.5, CS = VIH, f = 5MHz 6.5 mA V CC Static Current I CC3 V CC = 5.5, CS = VIH 0.6 mA Output Low Voltage V OL I OL = 8.0 mA, V CC = 4.5 0.45 Output High Voltage V OH1 I OH = 2.5 mA, V CC = 4.5 Low V CC Lock-Out Voltage V LKO Input Leakage Current Output Leakage Current VCC Active Current for Read (1) Symbol Conditions Min 0.85 X 3.2 V CC V V 4.2 V DC test conditions: VIL = 0.3V, V IH = VCC - 0.3V NOTES: 1. The ICC current listed includes both the DC operating current and the frequency dependent component (at 5 MHz). The frequency component typically is less than 2 mA/MHz, with OE at VIH . 2. I CC active while Embedded Algorithm (program or erase) is in progress. 3 White Electronic Designs Corporation • Phoenix, AZ • (602) 437-1520 WF512K32-XXX5 AC CHARACTERISTICS – WRITE/ERASE/PROGRAM OPERATIONS,CS CONTROLLED (VCC = 5.0V, VSS = 0V, TA = -55°C to +125°C) Parameter Symbol -60 Min -70 Max Min -90 Max Min -120 Max Min -150 Max Min Unit Max Write Cycle Time t AVAV t WC 60 70 90 120 150 Write Enable Setup Time t WLEL t WS 0 0 0 0 0 ns Chip Select Pulse Width t ELEH t CP 40 45 45 50 50 ns Address Setup Time t AVEL t AS 0 0 0 0 0 ns Data Setup Time t DVEH t DS 40 45 45 50 50 ns Data Hold Time t EHDX t DH 0 0 0 0 0 ns Address Hold Time t ELAX t AH 40 45 45 50 50 ns Chip Select Pulse Width High t EHEL t CPH 20 20 20 20 ns 20 ns Duration of Byte Programming Operation (1) t WHWH1 300 300 300 300 300 µs Sector Erase Time (2) t WHWH2 15 15 15 15 15 sec Read Recovery Time t GHEL 0 0 0 0 0 ns Chip Programming Time 11 11 11 11 11 sec Chip Erase Time (3) 64 64 64 64 64 sec NOTES: 1. Typical value for t WHWH1 is 7µs. 2. Typical value for t WHWH2 is 1sec. 3. Typical value for Chip Erase Time is 8sec. FIG. 4 AC TEST CONDITIONS AC TEST CIRCUIT Parameter I OL Current Source VZ D.U.T. ≈ 1.5V (Bipolar Supply) C eff = 50 pf I OH Current Source White Electronic Designs Corporation • Phoenix, AZ • (602) 437-1520 4 Typ Unit Input Pulse Levels VIL = 0, VIH = 3.0 V Input Rise and Fall 5 ns Input and Output Reference Level 1.5 V Output Timing Reference Level 1.5 V NOTES: V Z is programmable from -2V to +7V. I OL & IOH programmable from 0 to 16mA. Tester Impedance Z 0 = 75 Ω. V Z is typically the midpoint of V OH and V OL. I OL & IOH are adjusted to simulate a typical resistive load circuit. ATE tester includes jig capacitance. WF512K32-XXX5 AC CHARACTERISTICS – WRITE/ERASE/PROGRAM OPERATIONS, WE CONTROLLED (VCC = 5.0V, T A = -55°C to +125°C) Parameter Symbol -60 Min -70 Max Min -90 Max Min -120 Max Min -150 Max Min Unit Max WF512K32-XXX5 150 ns Write Cycle Time t AVAV t WC 60 70 90 Chip Select Setup Time t ELWL t CS 0 0 0 0 0 ns Write Enable Pulse Width t WLWH t WP 40 45 45 50 50 ns Address Setup Time t AVWH t AS 0 0 0 0 0 ns Data Setup Time t DVWH t DS 40 45 45 50 50 ns Data Hold Time t WHDX t DH 0 0 0 0 0 ns Address Hold Time t WHAX t AH 40 45 45 50 50 ns Write Enable Pulse Width High t WHWL t WPH 20 Duration of Byte Programming Operation (1) t WHWH1 300 300 300 300 300 µs Sector Erase Time (2) t WHWH2 15 15 15 15 15 sec Read Recovery Time before Write t GHWL 20 120 20 20 20 ns 0 0 0 0 0 ns tVCS 50 50 50 50 50 µs Output Enable Setup Time tOES 0 0 0 0 0 ns Output Enable Hold Time (4) tOEH 10 10 10 10 10 ns VCC Set-up Time Chip Programming Time 11 Chip Erase Time (3) 11 64 11 64 11 64 11 64 64 sec sec NOTES: 1. Typical value for t WHWH1 is 7µs. 2. Typical value for t WHWH2 is 1sec. 3. Typical value for Chip Erase Time is 8sec. 4. For Toggle and Data Polling. AC CHARACTERISTICS – READ ONLY OPERATIONS (VCC = 5.0V, TA = -55°C to +125°C) Parameter Symbol -60 Min -70 Max 60 Min -90 Max 70 Min -120 Max -150 Max Unit Max t AVAV t RC Address Access Time t AVQV t ACC 60 70 90 120 150 Chip Select Access Time t ELQV t CE 60 70 90 120 150 ns Output Enable to Output Valid t GLQV t OE 30 35 35 50 55 ns Chip Select to Output High Z (1) t EHQZ t DF 20 20 20 30 35 ns Output Enable High to Output High Z (1) t GHQZ t DF 20 20 20 30 35 ns Output Hold from Address, CS or OE Change, whichever is First t AXQX t OH 0 0 120 Min Read Cycle Time 0 90 Min 0 150 0 ns ns ns 1. Guaranteed by design, but not tested 5 White Electronic Designs Corporation • Phoenix, AZ • (602) 437-1520 WF512K32-XXX5 FIG. 5 White Electronic Designs Corporation • Phoenix, AZ • (602) 437-1520 6 Outputs WE OE CS Addresses High Z tACC tCE tOE Addresses Stable tRC Output Valid tOH tDF High Z AC WAVEFORMS FOR READ OPERATIONS WF512K32-XXX5 A0H tDH tWPH Data tDS tCS WE OE 5.0 V tWP tGHWL tWC CS Addresses 5555H tAS PA PD tAH tWHWH1 Data Polling D7 PA DOUT tOE tCE tRC tDF WRITE/ERASE/PROGRAM OPERATION, WE CONTROLLED tOH FIG. 6 NOTES: 1. PA is the address of the memory location to be programmed. 2. PD is the data to be programmed at byte address. 3. D7 is the output of the complement of the data written to the device (for each chip). 4. DOUT is the output of the data written to the device. 5. Figure indicates last two bus cycles of four bus cycle sequence. 7 White Electronic Designs Corporation • Phoenix, AZ • (602) 437-1520 WF512K32-XXX5 FIG. 7 8 AAH tDS VCC Data tVCS NOTE: 1. SA is the sector address for Sector Erase. White Electronic Designs Corporation • Phoenix, AZ • (602) 437-1520 tDH tWPH WE OE CS Addresses tGHWL tCS tWP tAS 55H 2AAAH 5555H tAH 5555H 80H 5555H AAH 2AAAH 55H SA 10H/30H AC WAVEFORMS CHIP/SECTOR ERASE OPERATIONS WF512K32-XXX5 FIG. 8 9 Data WE OE CS D7 D0-D6 t CH tOEH tCE t OE tWHWH 1 or 2 D7 D0-D6 = Invalid t OE D7 = Valid Data D0-D7 Valid Data t OH t DF High Z AC WAVEFORMS FOR DATA POLLING DURING EMBEDDED ALGORITHM OPERATIONS White Electronic Designs Corporation • Phoenix, AZ • (602) 437-1520 WF512K32-XXX5 FIG. 9 A0H NOTES: 1. PA represents the address of the memory location to be programmed. 2. PD represents the data to be programmed at byte address. 3. D7 is the output of the complement of the data written to the device (for each chip). 4. DOUT is the output of the data written to the device. 5. Figure indicates the last two bus cycles of a four bus cycle sequence. White Electronic Designs Corporation • Phoenix, AZ • (602) 437-1520 tDH tCPH 10 5.0 V tDS Data CS OE WE tWS tWC Addresses 5555H tGHEL tCP tAS PA PD tAH tWHWH1 Data Polling D7 PA DOUT ALTERNATE CS CONTROLLED PROGRAMMING OPERATION TIMINGS WF512K32-XXX5 PACKAGE 400: 66 PIN, PGA TYPE, CERAMIC HEX-IN-LINE PACKAGE, HIP (H1) 27.3 (1.075) ± 0.25 (0.010) SQ PIN 1 IDENTIFIER SQUARE PAD ON BOTTOM 25.4 (1.0) TYP 4.34 (0.171) MAX 3.81 (0.150) ± 0.13 (0.005) 1.42 (0.056) ± 0.13 (0.005) 0.76 (0.030) ± 0.13 (0.005) 2.54 (0.100) TYP 15.24 (0.600) TYP 1.27 (0.050) TYP DIA 0.46 (0.018) ± 0.05 (0.002) DIA 25.4 (1.0) TYP ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES 11 White Electronic Designs Corporation • Phoenix, AZ • (602) 437-1520 WF512K32-XXX5 PACKAGE 510: 68 LEAD, CERAMIC QUAD FLAT PACK, CQFP (G2U) 25.15 (0.990) ± 0.25 (0.010) SQ 3.51 (0.140) MAX 22.36 (0.880) ± 0.25 (0.010) SQ 0.25 (0.010) ± 0.10 (0.002) 0.25 (0.010) REF Pin 1 R 0.25 (0.010) 24.0 (0.946) ± 0.25 (0.010) 0.53 (0.021) ± 0.18 (0.007) 1° / 7° 1.01 (0.040) ± 0.13 (0.005) 23.87 (0.940) REF DETAIL A 1.27 (0.050) TYP SEE DETAIL "A" 0.38 (0.015) ± 0.05 (0.002) 20.3 (0.800) REF The White 68 lead G2U CQFP fills the same fit and function as the JEDEC 68 lead CQFJ or 68 PLCC. But the G2U has the TCE and lead inspection advantage of the CQFP form. 0.940" TYP ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES PACKAGE 519: 68 LEAD, CERAMIC QUAD FLAT PACK, LOW PROFILE CQFP (G1U) 25.27 (0.995) ± 0.13 (0.005) SQ 3.56 (0.140) MAX 23.88 (0.940) ± 0.25 (0.010) SQ 0.25 (0.010) 0.61 (0.024) ± 0.15 (0.006) 0.84 (0.033) REF DETAIL A SEE DETAIL "A" 1.27 (0.050) 0.38 (0.015) ± 0.05 (0.002) 20.3 (0.800) REF ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES White Electronic Designs Corporation • Phoenix, AZ • (602) 437-1520 12 WF512K32-XXX5 PACKAGE 501: 68 LEAD, CERAMIC QUAD FLAT PACK, CQFP (G4) 39.6 (1.56) ± 0.38 (0.015) SQ 5.1 (0.200) MAX 1.27 (0.050) ± 0.1 (0.005) PIN 1 IDENTIFIER Pin 1 12.7 (0.500) ± 0.5 (0.020) 4 PLACES 5.1 (0.200) ± 0.25 (0.010) 4 PLACES 1.27 (0.050) TYP 0.25 (0.010) ± 0.05 (0.002) 0.38 (0.015) ± 0.08 (0.003) 68 PLACES 38 (1.50) TYP 4 PLACES ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES PACKAGE 502: 68 LEAD, CERAMIC QUAD FLAT PACK, LOW PROFILE CQFP (G4T) 39.6 (1.56) ± 0.38 (0.015) SQ PIN 1 IDENTIFIER 3.56 (0.140) MAX Pin 1 12.7 (0.500) ± 0.5 (0.020) 4 PLACES 5.1 (0.200) ± 0.25 (0.010) 4 PLACES 0.38 (0.015) ± 0.08 (0.003) 68 PLACES 1.27 (0.050) TYP 0.25 (0.010) ± 0.05 (0.002) 38 (1.50) TYP 4 PLACES ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES 13 White Electronic Designs Corporation • Phoenix, AZ • (602) 437-1520 WF512K32-XXX5 ORDERING INFORMATION W F 512K32 X - XXX X X 5 X LEAD FINISH: Blank = Gold plated leads A = Solder dip leads VPP PROGRAMMING VOLTAGE 5=5V DEVICE GRADE: M = Military Screened I = Industrial C = Commercial -55°C to +125°C -40°C to +85°C 0°C to +70°C PACKAGE TYPE: H1 = 1.075" sq. Ceramic Hex In Line Package, HIP (Package 400*) G2U = 22.4mm Low Profile CQFP (Package 510) G1U = 23.9mm Low Profile CQFP (Package 519) G4 = 40mm Low Capacitance, CQFP (Package 501) G4T = 40mm Low Profile CQFP (Package 502) ACCESS TIME (ns) IMPROVEMENT MARK N = No Connect at pins 21 and 39 in HIP for Upgrade (H1 only)* F = Low Capacitance Device (G4 only) ORGANIZATION, 512K x 32 User configurable as 1M x 16 or 2M x 8 Flash WHITE ELECTRONIC DESIGNS CORP. * Call factory for PGA type (HIP) package options. White Electronic Designs Corporation • Phoenix, AZ • (602) 437-1520 14 WF512K32-XXX5 DEVICE TYPE SPEED PACKAGE SMD NO. 512K x 32 Flash Module 150ns 66 pin HIP (H1) 1.075" sq. 5962-94612 01HUX 512K x 32 Flash Module 120ns 66 pin HIP (H1) 1.075" sq. 5962-94612 02HUX 512K x 32 Flash Module 90ns 66 pin HIP (H1) 1.075" sq. 5962-94612 03HUX 512K x 32 Flash Module 70ns 66 pin HIP (H1) 1.075" sq. 5962-94612 04HUX 512K x 32 Flash Module 150ns 68 lead CQFP Low Profile (G4T) 5962-94612 01HTX 512K x 32 Flash Module 120ns 68 lead CQFP Low Profile (G4T) 5962-94612 02HTX 512K x 32 Flash Module 90ns 68 lead CQFP Low Profile (G4T) 5962-94612 03HTX 512K x 32 Flash Module 70ns 68 lead CQFP Low Profile (G4T) 5962-94612 04HTX 512K x 32 Flash Module 150ns 68 lead Low Capacitance CQFP (G4) 5962-94612 01HNX 512K x 32 Flash Module 120ns 68 lead Low Capacitance CQFP (G4) 5962-94612 02HNX 512K x 32 Flash Module 90ns 68 lead Low Capacitance CQFP (G4) 5962-94612 03HNX 512K x 32 Flash Module 70ns 68 lead Low Capacitance CQFP (G4) 5962-94612 04HNX 512K x 32 Flash Module 150ns 68 lead CQFP/J (G2U) 5962-94612 01HZX 512K x 32 Flash Module 120ns 68 lead CQFP/J (G2U) 5962-94612 02HZX 512K x 32 Flash Module 90ns 68 lead CQFP/J (G2U) 5962-94612 03HZX 512K x 32 Flash Module 70ns 68 lead CQFP/J (G2U) 5962-94612 04HZX 512K x 32 Flash Module 150ns 68 lead CQFP/J (G1U) 5962-94612 01H9X 512K x 32 Flash Module 120ns 68 lead CQFP/J (G2U) 5962-94612 02H9X 512K x 32 Flash Module 90ns 68 lead CQFP/J (G2U) 5962-94612 03H9X 512K x 32 Flash Module 70ns 68 lead CQFP/J (G2U) 5962-94612 04H9X 15 White Electronic Designs Corporation • Phoenix, AZ • (602) 437-1520