MITSUBISHI ICS (TV) M64895FP/GP PRELIMINARY Notice:This is not a final specification. Some parametric limits are subject to change. I2C BUS FREQUENCY SYNTHESIZER FOR TV/VCR DESCRIPTION PIN CONFIGURATION (TOP VIEW) The M64895 is a semiconductor integrated circuit consisting of PLL frequency synthesizer for TV/VCR using I 2C BUS control. It contains the prescaler with operating up to1.3GHz, 4 band drivers PRESCALER INPUT and tuning Amplifier for direct tuning. Built-in 4 band drivers. • • • • • • • • • • 4 integrated PNP band drivers (Io=40mA,Vsat=0.2V typ@Vcc1 to 13.2V) Built-in high-withstanding voltage tuning Amplifier Low power dissipation (Icc=20mA, Vcc=5V) Built-in prescaler with input amplifier (Fmax=1.3GHz) PLL lock/unlock status display out put (Built-in pull up resistor ) I2C bus control (write mode only) X’tal 4MHz is used to realize 3 type of tuning steps (Division ratio 1/512, 1/640, 1/1024) Programmable chip address Small package (16Pin SOP/SSOP) 1 16 Xin GND GND 2 15 ADS SUPPLY VOLTAGE 1 SUPPLY VOLTAGE 2 VCC1 3 14 SDA CRYSTAL OSCILLATOR CHIP ADDRESS INPUT DATAINPUT VCC2 4 13 SCL CLOCK INPUT BS4 5 BS3 6 BS2 7 BS1 8 BAND SWITCHING OUTPUTS M64895FP/GP FEATURES fin 12 LD/ftest LD/ftest OUTPUT SUPPLY 11 VCC3 VOLTAGE 3 TUNING 10 Vtu OUTPUT 9 Vin FILTER INPUT Outline 16P2S-A/16P2Z-A RECOMMENDED OPERATING CONDITION APPLICATION Supply voltage range..............................................V CC1=4.5 to 5.5V TV, VCR tuners VCC2=VCC1 to 13.2V VCC3=28 to 35V Rated supply voltage...........................................................V CC1=5V VCC2=12V VCC3=33V BLOCK DIAGRAM X in ADS SDA SCL LOCK VCC3 Vtu Vin 16 15 14 13 12 11 10 9 OSC I2C BUS RECIEVER 2 DIV 10 MAIN COUNTER LOCK DETECTOR AMP PHASE DETECTOR CHARGE PUMP 1/32,1/33 5 SWALLOW COUNTER 4 P.O RESET 1/8 BAND DRIVER BIAS AMP 1 2 3 4 5 6 7 8 f in GND VCC1 VCC2 BS4 BS3 BS2 BS1 1 MITSUBISHI ICS (TV) M64895FP/GP PRELIMINARY Notice:This is not a final specification. Some parametric limits are subject to change. I2C BUS FREQUENCY SYNTHESIZER FOR TV/VCR DESCRIPTION OF PIN Pin No. 1 2 3 4 5 6 7 8 Symbol f in GND VCC1 VCC2 BS4 BS3 BS2 BS1 Pin name Prescaler input GND Input for the VCO frequency. Ground to 0V. Power supply voltage 1 Power supply voltage 2 Power supply voltage terminal. 5.0V±0.5V Power supply for band switching, Vcc1 to 13.2V Band switching outputs PNP open collector method is used. When the band switching data is "H",the output is ON. When it is "L",the output is OFF. 9 Vin Filter input (Charge pump output) 10 11 Vtu VCC3 Tuning output Power supply voltage 3 12 LD/ftest Lock detectt/ Test port 13 14 15 SCL SDA ADS 16 Xin Clock input Data input Address switching input This is connected to the crystal oscillator. Function This is the output terminal for the LPF input and charge pump output. When the phase of the programmable divider output (f1/N) is ahead compared to the reference frequency (fREF), the "source" current state becomes active. If it is behind, the "sink" current becomes active. If the phases are the same, the high impedance state becomes active. This supplies the tuning voltage. Power supply voltage for tuning voltage 28 to 35V Lock detector is output. Programmabule freq. Divider output and reference freq. output is selected by the test mode. Data is read into the shift register when the clock signal falls Input for band SW and programmable freq. divider set up. Chip address sets it up with the input condition of terminal. 4.0MHz crystal oscillator is connected. ABSOLUTE MAXIMUM RATINGS (Ta=-20°C to +75°C, unless otherwise noted) Symbol VCC1 Parameter VCC2 VCC3 VI VO Super voltage 1 Super voltage 2 Super voltage 3 Input voltage Output voltage VBSOFF Voltage applied when the band output is OFF IBSON tBSON Pd Topr Tstg Band output current ON the time when the band output is ON Power dissipation Operating temperature Storage temperature Conditions Pin3 Pin4 Pin11 Not to exceed VCC1 Pin16 per 1 band output circuit 50mA per 1 band output circuit 3circuits are pn at same time Ta=75°C Ratings Unit 6.0 14.4 36.0 6.0 6.0 V V V V V 14.4 V 50.0 10 470 -20 to +75 -40 to +125 mA sec mW °C °C Ratings 4.5 to 5.5 VCC1 to 13.2 28 to 35 4.0 80 to 1300 Unit V V V MHz MHz 0 to 40 mA RECOMMENDED OPERATING CONDITIONS (Ta=-20°C to +75°C, unless otherwise noted) Symbol VCC1 VCC2 VCC3 fopr1 fopr2 Parameter Super voltage 1 Super voltage 2 Super voltage 3 Operating frequency (1) Operating frequency (2) IBDL Band output current 5 to 8 Conditions Pin3 Pin4 Pin11 Crystal oscillation circuit Normally 1 circuit is on. 2 circuits on at the same time is max. It is prohibited to have 3 or more circuits turned on at the same time. 2 MITSUBISHI ICS (TV) M64895FP/GP PRELIMINARY Notice:This is not a final specification. Some parametric limits are subject to change. I2C BUS FREQUENCY SYNTHESIZER FOR TV/VCR ELECTRICAL CHARACTERISTICS (Ta=-20°C to +75°C, unless otherwise noted, Vcc1=5.0V, Vcc2=12V, Vcc3=33V) Symbol VIH VIL IIH IIL VOL ILO VBS IOLK1 VtoH VtoL IOH IOL ICPLK ICC1 ICC2A ICC2B ICC2C ICC3 Input terminals SDA output Band SW Tuning output Charge pump Parameter Test pin “H” input voltage “L” input voltage “H” input current “L” input current “L” output voltage Leak current Output voltage 13 to 14 13 to 14 13 to 14 13/14 14 14 5 to 8 Leak current Output voltage “H” Output voltage “L” “H” output current “L” output current Leak current Supply current 1 4 circuits: OFF Supply 1 circuits: ON, current 2 Output: OPEN Output current 40mA Supply current 3 Test conditions Min. 3.0 − − − − − 11.6 Limits Typ. Max. VCC1+0.3 − − 1.5 − 10 -4/-14 -10/-30 − 0.4 − 10 11.8 − Unit V V µA µA µA µA V 10 10 9 9 9 VCC1=5.5V, Vi=4.0V VCC1=5.5V, Vi=0.4V VCC1=5.5V, Io=3mA VCC1=5.5V, Vo=5.5V VCC2=12V, Io=-40mA VCC2=12V band SW is OFF Vo=0V VCC3=33V VCC3=33V VCC1=5.0V, Vo=2.5V VCC1=5.0V, Vo=2.5V VCC1=5.0V, Vo=2.5V 3 4 VCC1=5.5V VCC2=12V − − 20 − 30 0.3 mA mA 4 VCC2=12V − 6.0 8.0 mA 4 11 VCC2=12V Io=-40mA VCC3=33V Output ON − − 46.0 3.0 48.0 4.0 mA mA 5 to 8 − − -10 µA 32.5 − − − − − 0.2 ±270 ±70 − − 0.4 ±370 ±110 ±50 V V µA µA nA The typical values are at VCC1=5.0V VCC2=12V VCC3=33V, Ta=+25°C. SWITCHING CHARACTERISTICS (Ta=-20°C to +75°C, unless otherwise noted, VCC1=5.0V, VCC2=12V, VCC3=33V) Symbol fopr Parameter Prescaler operating frequency Test pin 1 Test conditions VCC1=4.5 to 5.5V Vin=Vinmin to Vinmax VCC1=4.5 to 5.5V 80 to 100MHz 100 to 200MHz 200 to 800MHz 800 to 1000MHz 1000 to 1300MHz Min. Limits Typ. Max. 80 − 1300 − − − − − − − − 4 4 4 4 4 100 − − Vin Operating input voltage 1 fSCL tBUF tHDSTA Clock pulse frequency Bus free time Data hold time 13 14 13 VCC1=4.5 to 5.5V VCC1=4.5 to 5.5V VCC1=4.5 to 5.5V -24 -27 -30 -27 -18 0 4.7 4 tLOW tHIGH tSUSTA SCL low hold time SCL high hold time Set up time 13 13 13, 14 VCC1=4.5 to 5.5V VCC1=4.5 to 5.5V VCC1=4.5 to 5.5V 4.7 4 4.7 − − − − − − Unit MHz dBm kHz µs µs µs µs µs tHDDAT Data hold time 13, 14 VCC1=4.5 to 5.5V 0 − − s tSUDAT Data set up time 13, 14 VCC1=4.5 to 5.5V 250 − − ns tr Rise time Fall time Set up time 13, 14 13, 14 13, 14 VCC1=4.5 to 5.5V VCC1=4.5 to 5.5V VCC1=4.5 to 5.5V − − 4 − − − 1000 300 − ns ns µs tf tSUSTO 3 MITSUBISHI ICS (TV) M64895FP/GP PRELIMINARY Notice:This is not a final specification. Some parametric limits are subject to change. I2C BUS FREQUENCY SYNTHESIZER FOR TV/VCR METHOD OF SETTING DATA The information of 5 bytes necessary for circuit operation is chip The input information to consit of 2 or data of 4bytes to lead to Chip address and control data, bandS.W. data of 2 bytes and divider byte Address is received in I Cbus receiver. It shows a definition of bus of 2 bytes. After the chip address input, 2 or data of 4 bytes are protocol admitted in the following. received. 2 1_STA CA CB BB STO Function bit is contained the first and the third data byte to 2_STA CA D1 D2 STO distinguish between divider data and control data, band data, and 3_STA CA CB BB D1 D2 STO "0" goes ahead of divider data, and "1" goes ahead of control data, 4_STA CA D1 D2 CB BB STO bandS.W. data. STA : Start condition STO : Stop condition CA : Chip address CB : Control data byte BB : BandS.W. data byte D1 : Divider data byte D2 : Divider data byte SDA SCL S STA 1-7 8 9 ADDRESS CA 0 ACK 1-7 8 DATA 9 1-7 ACK 8 9 DATA ACK P STO Write mode format Byte Address Byte Devider Byte1 Devider Byte2 Control Byte1 Band SW Byte MSB 1 0 N7 1 X 1 N14 N6 CP X 0 N13 N5 T2 X 0 N12 N4 T1 X 0 N11 N3 T0 BS4 MA1 N10 N2 RSa BS3 MA0 N9 N1 RSb BS2 0 N8 N0 OS BS1 LSB A A A A A 4 MITSUBISHI ICS (TV) M64895FP/GP PRELIMINARY Notice:This is not a final specification. Some parametric limits are subject to change. I2C BUS FREQUENCY SYNTHESIZER FOR TV/VCR TEST MODE DATA SET UP METHOD T2,T1,T0 : Setting up for the test mode Test Mode Bit Set Up X T2 T1 T0 0 0 X 0 1 X 1 1 0 1 1 1 1 0 0 1 0 1 : Random, 0 or 1. normal "0" MA1 ,MA0 : Programmabule Address Bit Address input voltage 0 to 0.1∗VCC1 Always valid 0.4∗VCC1 to 0.6*VCC1 0.9∗VCC1 to VCC1 MA1 0 0 1 1 MA0 0 1 0 1 Charge pump Normal operation High impedance Sink Source High impedance High impedance Pin 12 condition Lock output Lock output Lock output Lock output fREF output f1/N output Mode Normal operation Test mode Test mode Test mode Test mode Test mode RSa, RSb : Set up for the reference frequency division ratio N14 to N0 : How to set dividing ratio of the programable the divider Dividing ratio=N14(214=16384)+ ⋅⋅⋅ +N0(20=1) Therefore, the range of division N is 1,024 to 32,768 RSa 1 0 X RSb 1 1 0 Division ratio 1/512 1/1024 1/640 OS : Set up the tuning amplifier Example) fvco=fREF×8×N OS 0 1 =3.90625×8×N =31.25×N (kHz) Tuning voltage output ON OFF Mode Normal Test CP: Setting up the charge pump current of the phase Power on reset operation (Initial state the power is turned ON) comparator BS4 to BS1 : OFF Charge pump : High impedance CP 0 1 Charge pump current 70µA 270µA Mode Test Normal Tuning amplifier : OFF Charge pump current : 270µA Frequency division ratio : 1/1024 Lock detector : High TIMING DIAGRAM START condition SDA tBUF tLOW tr tHDSTA tf SCL tHDSTA tHDDAT tHIGH STOP condition tSUDAT tSUSTA START condition tSUSTO STOP condition CRYSTAL OSCILLATOR CONNECTION DIAGRAM 16 18pF 4MHz Crystal oscillator characteristics Actual resistance : less then 300Ω Load capacitance : 20pF 5 MITSUBISHI ICS (TV) M64895FP/GP PRELIMINARY Notice:This is not a final specification. Some parametric limits are subject to change. I2C BUS FREQUENCY SYNTHESIZER FOR TV/VCR APPLICATION EXAMPLE BUILT-IN PLL TUNER +5V 1nF - 10µF Vcc1 to 12V UHF VHF 3 Vcc1 15 ADS Vcc2 +B 4 BS4 BS4 5 BS3 BS3 6 IF BS2 IF BS2 7 BS1 BS1 8 1nF MCU 1nF fin M64895 SDA 4-BAND TUNER Lo 1 14 13 1000pF 1.5nF SCL AGC AGC 0.1µF Vin VT 9 56k 56k 2.2nF Vtu LOCK AFT 10 12 ∗100pF Xin 16 18pF GND Vcc3 2 11 4MHz +33V Note) Filter constant is for reference. ∗ Add a capacitor to stabilize the filter circuit. BT Units Resistance : Ω Capacitance : F 6