STMICROELECTRONICS STD12NE06

STD12NE06

N - CHANNEL 60V - 0.08Ω - 12A - IPAK/DPAK
SINGLE FEATURE SIZE POWER MOSFET
TYPE
STD12NE06
■
■
■
■
■
■
V DSS
R DS(on)
ID
60 V
< 0.10 Ω
12 A
TYPICAL RDS(on) = 0.08 Ω
EXCEPTIONAL dv/dt CAPABILITY
AVALANCHE RUGGED TECHNOLOGY
100 % AVALANCHE TESTED
APPLICATION ORIENTED
CHARACTERIZATION
ADD SUFFIX ”T4” FOR ORDERING IN TAPE
& REEL
3
3
2
1
DESCRIPTION
This Power MOSFET is the latest development of
STMicroelectronics unique ”Single Feature
Size” strip-based process. The resulting transistor shows extremely high packing density for low
on-resistance, rugged avalanche characteristics
and less critical alignment steps therefore a remarkable manufacturing reproducibility.
IPAK
TO-251
(Suffix ”-1”)
1
DPAK
TO-252
(Suffix ”T4”)
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
■ DC MOTOR CONTROL (DISK DRIVES,etc.)
■ DC-DC & DC-AC CONVERTERS
■ SYNCHRONOUS RECTIFICATION
ABSOLUTE MAXIMUM RATINGS
Symb ol
V DS
V DGR
VGS
Parameter
Value
Drain-source Voltage (VGS = 0)
60
V
Drain- gate Voltage (R GS = 20 kΩ)
60
V
± 20
V
12
A
Gate-source Voltage
o
ID
Drain Current (continuous) at Tc = 25 C
ID
o
I DM (•)
P tot
Drain Current (continuous) at Tc = 100 C
8
A
Drain Current (pulsed)
48
A
Total Dissipation at T c = 25 oC
35
W
0.23
W /o C
6
V/ns
Derating F actor
dv/dt( 1 )
T st g
Tj
Peak Diode Recovery voltage slope
Storage T emperature
Max. Operating Junction Temperature
(•) Pulse width limited by safe operating area
March 1999
Unit
-65 to 175
o
C
175
o
C
( 1) ISD ≤ 12 A, di/dt ≤ 200 A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX
1/10
STD12NE06
THERMAL DATA
R thj -case
R thj -amb
R thc-sink
Tl
Thermal Resistance Junction-case
Thermal Resistance Junction-ambient
Thermal Resistance Case-sink
Maximum Lead Temperature F or Soldering Purpose
Max
Max
T yp
o
4.3
100
1.5
275
C/W
C/W
o
C/W
o
C
o
AVALANCHE CHARACTERISTICS
Symbo l
Parameter
Max Value
Unit
IAR
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by Tj max)
12
A
E AS
Single Pulse Avalanche Energy
(starting Tj = 25 o C, ID = IAR , V DD = 25 V)
45
mJ
ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified)
OFF
Symbo l
V (BR)DSS
Parameter
Drain-source
Breakdown Voltage
Test Con ditions
I D = 250 µA
V GS = 0
I DSS
V DS = Max Rating
Zero Gate Voltage
Drain Current (V GS = 0) V DS = Max Rating
IGSS
Gate-body Leakage
Current (VDS = 0)
Min.
Typ.
Max.
60
Unit
V
T c = 100 oC
V GS = ± 20 V
1
10
µA
µA
± 100
nA
Max.
Unit
ON (∗)
Symbo l
Parameter
Test Con ditions
V GS(th)
Gate Threshold Voltage V DS = V GS
ID = 250 µA
R DS(on)
Static Drain-source On
Resistance
V GS = 10V
ID = 6 A
I D(o n)
On State Drain Current
V DS > ID(o n) x R DS(on )ma x
V GS = 10 V
Min.
2
Typ.
3
4
V
0.08
0.10
Ω
12
A
DYNAMIC
Symbo l
g f s (∗)
C iss
C os s
C rss
2/10
Parameter
Test Con ditions
Forward
Transconductance
V DS > ID(o n) x R DS(on )ma x
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
V DS = 25 V
f = 1 MHz
I D =6 A
V GS = 0
Min.
Typ.
Max.
6
760
100
30
Unit
S
1000
140
45
pF
pF
pF
STD12NE06
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING ON
Symbo l
Typ.
Max.
Unit
t d(on)
tr
Turn-on Time
Rise Time
Parameter
V DD = 30 V
ID = 6 A
R G = 4.7 Ω
V GS = 10 V
(see test circuit, figure 3)
Test Con ditions
10
35
15
50
ns
ns
Qg
Q gs
Q gd
Total G ate Charge
Gate-Source Charge
Gate-Drain Charge
V DD = 40 V
20
5
7
30
nC
nC
nC
Typ.
Max.
Unit
7
18
30
10
25
45
ns
ns
ns
Typ.
Max.
Unit
12
48
A
A
1.5
V
I D = 12 A
Min.
VGS = 10 V
SWITCHING OFF
Symbo l
tr (Voff)
tf
tc
Parameter
Off-voltage Rise T ime
Fall T ime
Cross-over Time
Test Con ditions
Min.
V DD = 48 V
I D = 12 A
V GS = 10 V
R G = 4.7 Ω
(see test circuit, figure 5)
SOURCE DRAIN DIODE
Symbo l
Parameter
Test Con ditions
ISD
I SDM (•)
Source-drain Current
Source-drain Current
(pulsed)
V SD (∗)
Forward On Voltage
I SD = 12 A
Reverse Recovery
Time
Reverse Recovery
Charge
Reverse Recovery
Current
I SD = 12 A
di/dt = 100 A/µs
o
T j = 150 C
V DD = 30 V
(see test circuit, figure 5)
t rr
Q rr
I RRM
Min.
V GS = 0
70
ns
0.21
µC
6
A
(∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
(•) Pulse width limited by safe operating area
Safe Operating Area
Thermal Impedance
3/10
STD12NE06
Derating Curve
Output Characteristics
Transfer Characteristics
Transconductance
Static Drain-source On Resistance
Gate Charge vs Gate-source Voltage
4/10
STD12NE06
Capacitance Variations
Normalized Gate Threshold Voltage vs
Temperature
Normalized On Resistance vs Temperature
Turn-on Current Slope
Turn-off Drain-source Voltage Slope
Cross-over Time
5/10
STD12NE06
Switching Safe Operating Area
Accidental Overload Area
Source-drain Diode Forward Characteristics
Fig. 1: Unclamped Inductive Load Test Circuit
6/10
Fig. 2: Unclamped Inductive Waveform
STD12NE06
Fig. 3: Switching Times Test Circuits For
Resistive Load
Fig. 4: Gate Charge test Circuit
Fig. 5: Test Circuit For Inductive Load Switching
And DIode Recovery Times
7/10
STD12NE06
TO-251 (IPAK) MECHANICAL DATA
mm
DIM.
MIN.
inch
MAX.
MIN.
A
2.2
TYP.
2.4
0.086
0.094
A1
0.9
1.1
0.035
0.043
A3
0.7
1.3
0.027
0.051
B
0.64
0.9
0.025
0.031
B2
5.2
5.4
0.204
0.212
B3
TYP.
MAX.
0.85
B5
0.033
0.3
0.012
B6
0.95
0.037
C
0.45
0.6
0.017
0.023
C2
0.48
0.6
0.019
0.023
D
6
6.2
0.236
0.244
E
6.4
6.6
0.252
0.260
G
4.4
4.6
0.173
0.181
H
15.9
16.3
0.626
0.641
L
9
9.4
0.354
0.370
L1
0.8
1.2
0.031
0.047
L2
0.8
1
0.031
0.039
A1
C2
A3
A
C
H
B
B6
=
1
=
2
G
=
=
=
E
B2
=
3
B5
L
D
B3
L2
L1
0068771-E
8/10
STD12NE06
TO-252 (DPAK) MECHANICAL DATA
mm
DIM.
MIN.
inch
TYP.
MAX.
MIN.
TYP.
MAX.
A
2.2
2.4
0.086
0.094
A1
0.9
1.1
0.035
0.043
A2
0.03
0.23
0.001
0.009
B
0.64
0.9
0.025
0.035
B2
5.2
5.4
0.204
0.212
C
0.45
0.6
0.017
0.023
C2
0.48
0.6
0.019
0.023
D
6
6.2
0.236
0.244
E
6.4
6.6
0.252
0.260
G
4.4
4.6
0.173
0.181
H
9.35
10.1
0.368
0.397
L2
0.8
L4
0.031
0.6
1
0.023
0.039
A1
C2
A
H
A2
C
DETAIL ”A”
L2
D
=
1
=
G
2
=
=
=
E
=
B2
3
B
DETAIL ”A”
L4
0068772-B
9/10
STD12NE06
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibil ity for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specific ation mentioned in this publication are
subjec t to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a trademark of STMicroelectronics
 1999 STMicroelectronics – Printed in Italy – All Rights Reserved
STMicroelectronics GROUP OF COMPANIES
Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Mexico - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A.
10/10
http://www.st.com
.