STMICROELECTRONICS STIL02-P5

STIL02-P5
®
A.S.D.TM
Application Specific Discretes
AC inrush current limiter
MAIN APPLICATIONS
HIGH POWER DENSITY ADAPTER
HIGH END TV POWER SUPPLY
OPENED FRAME SMPS
■
■
■
FEATURES
Inrush current limitation circuit for off-line power
supply
Dual non-sensitive unidirectional switches in a
single package
Suitable when space and efficiency are critical
Active after short AC line drop out with a boost
converter
High repetitive forward and reverse off-state
voltage (700V)
5
4
23
■
1
PENTAWATT HV2
(in line)
■
■
PIN OUT DESCRIPTION
■
Pin out
designation
■
L
BENEFITS
Low consumption (Ipt= 20mA)
High noise immunity:
(dV/dt> 500V/µs @ Tj=150°C)
Low reverse current losses
Integrated pilot driver of the power switches
Monolithic ASD™ planar technology for better
robustness and reliability
Position
AC Line (switch1)
1
Pilot of power switch 1
2
Output
(connected to Tab)
3
Pt2
Pilot of power switch 2
4
N
AC Neutral (switch 2)
5
Pt1
■
Description
■
OUT
■
■
■
Fig. A2: Basic connection.
Fig. A1: Bloc Diagram.
STIL02-P5
STIL02-P5
Pt 1
DRIVER
Pt 1
DRIVER
Ipt1
Ipt
Pt 2
Ipt2
Pt 2
OUT
Aux.
Supply
OUT
Main
converter
L
L
October 2002 - Ed: 3A
N
Ri
N
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STIL02-P5
Functional Description
The STIL02 is connected in parallel with the bridge diode and the inrush power resistor Ri (fig. A2). During
start up, the two unidirectional ASD™ power switches of the STIL02 are opened. The inrush current flows
through the diodes of the bridge and the external inrush power resistor Ri. Since the main converter turns
ON, the auxiliary power supply coupled with the main transformer, supplies the energy required to close
the two power switches of the STIL02. At the normal state, the two bottom diodes of the bridge rectifier and
the two unidirectional switches of the STIL02 rectify the AC line current.
When the STIL02 is used with a PFC boost converter, the inrush current circuit remains active after a short
AC line dropout (see fig. A5). In that configuration, since the AC line disappears, the PFC controller and the
auxiliary power supply of the STIL turns OFF. The two switches of the STIL are opened. The output bulk
capacitor Cb is discharging and it is providing the energy to the main converter. When the AC line recovers,
the two switches remain opened and recharging inrush current of the capacitor Cb is deviated and limited
through the resistor Ri. When the capacitor is charged, the PFC turns ON again and the two switches of the
STIL switch ON.
More details on the design and operation of the driver circuit of figure A5 can be found in the application
note “AN1600 - STIL: Inrush Current Limitation Device for Off-Line Power Converter”.
ABSOLUTE MAXIMUM RATINGS (Limiting value)
Symbol
Parameter
Value
Unit
700
V
VDout
VRout
Repetitive forward (VDout) and reverse (VRout)
off-state voltage
Tj (min) to
Tj (max)
Iout(AV)
Average on state current at the OUT terminal
(180° conduction angle for the internal power
switches)
Tj = 150°C
2
A
Iout(RMS)
RMS on state current at the OUT terminal
(180° conduction angle for the internal power
switches)
Tj = 150°C
2.2
A
Non repetitive surge peak on-state current
(Tj initial = 25°C)
tp = 10ms
sinusoidal
65
A
I2t value - rating for fusing
tp = 10ms
21
A2s
Critical rate of rise of on state current
Ipt1 + Ipt2 = 20mA
Tj = 25°C
Tj = 150°C
100
-
A/µs
ITSM
I2t
dIout/dt
Tstg
Storage temperature range
-40 to +150
°C
Tj
Junction temperature range
0 to +150
°C
THERMAL PARAMETERS
Symbol
2/7
Parameter
Value
Unit
°C/W
Rth(j-c)
Junction to case
2
Rth(j-a)
Junction to ambient (minimum footprint)
60
STIL02-P5
ELECTRICAL CHARACTERISTICS
Symbol
Ipt1
+
Ipt2
VD(pt1)
VD(pt2)
VR(pt1)
VR(pt2)
Parameter
Test conditions
Driver trigger current
Direct pilot trigger voltage
Min.
Typ.
VDout = 12V (DC)
RL = 30Ω
tp = 380µs
Tj = 0°C
12
Tj = 25°C
10
VDout = 12V (DC)
RL = 30Ω
Tj = 0°C
Peak reverse driver voltage
0.6
Tj = 25°C
Max. Unit
20
mA
0.85
1
V
0.8
0.95
Tj = 150°C
0.2
Tj = 25°C
8
V
500
V/µs
dVDout/dt
Dynamic voltage rising
Linear slope up to Tj = 150°C
VDout = 470V
IRout(off)
Max reverse current without
driver current
VRout = 700V
Ipt1 = Ipt2 = open
0.45
Tj = 25°C
5
µA
Tj = 150°C
300
µA
Max reverse current with
driver current
VRout = 400V
Tj = 150°C
Ipt1 = Ipt2 = 10mA
300
µA
Vt0
Threshold direct voltage for
one power switch
Iout(AV) = 2A
Tj = 150°C
0.7
0.8
V
Rd
Dynamic direct resistance for Iout(AV) = 2A
one power switch
Tj = 150°C
70
100
mΩ
VF
Maximum instantaneous direct forward voltage drop for
one power switch
Tj = 150°C
0.9
1.1
V
IRout(on)
Iout(AV) = 2A
Power losses calculations
When the input current is sinusoidal, the conducted power losses can be calculated by using the following
formula:
2
P = VT 0 . I out ( av ) + R d
(I out ( av )
× π)
8
If the output average current is 2Amps, VT0 and Rd of the electrical characteristics table can be used. For
different output current please refer to the application note AN1600 that provides guidelines to estimate the
correct values of VT0 and Rd.
LIGHTNING SURGE IMMUNITY (IEC61000-4-5)
During lightning surge transient voltage across the AC line, over current and over voltage stress are applied on all the components of the power supply. The STIL02 can sustain a maximum peak surge current of
500A as defined by the combine waveform generator (8/20µs waveform as shown in fig. A3 and A4).
Special recommendations for the lightning surge immunity:
1 - Check that the maximum peak surge current in the STIL stays below the limit specified above.
2 - Check that no over voltages are applied on the STIL and the bridge diode.
3 - In order to reduce the dynamic current stress (dIout/dt) through the structure of the STIL02, it is recommended to connect a differential mode choke coil in front of the STIL and the bridge diode.
More details and design guidelines are provided in the application note “AN1600 - STIL: Inrush Current
Limitation Device for Off-Line Power Converter”.
3/7
STIL02-P5
Fig. A4: Surge current waveform.
Fig. A3: Surge test condition.
1
STIL02-P5
Pt 1
DRIVER
5Vdc
Pt 2
5 µs
80A/Div
IOUT
Ipeak=500A
IOUT
OUT
0
VOUT
L
N
Combine
generator
IOUT
1
0 Amps
Fig. A5: Basic connection with a PFC Boost preregulator.
by pass diode
Ri
STIL02-P5
C2
Pt 1
DRIVER
Pt 2
Bridge
Diode
R1
R2
C0
R
C1
Vout
OUT
Cb
L
4/7
N
PFC
Control
STIL02-P5
Fig. 1-1: Non repetitive surge peak on-state current (sinusoidal pulse) and corresponding value of
I2t.
Fig. 1-2: Non repetitive surge peak on-state current (sinusoidal pulse) and corresponding value of
I2t.
ITSM(A), I²t(A²s)
ITSM(A), I²t(A²s)
1000.0
1000.0
Tj initial=25°C
Tj initial=150°C
ITSM
ITSM
100.0
100.0
I²t
I²t
10.0
10.0
tp(ms)
tp(ms)
1.0
1.0
0.01
0.10
1.00
10.00
Fig. 2: Relative variation of driver trigger current
versus junction temperature (typical values).
0.01
0.10
1.00
10.00
Fig. 3: Relative variation of direct pilot voltage versus junction temperature (typical values).
Ipt1 or Ipt2 [Tj] / Ipt1 or Ipt2 [Tj = 25°C]
VDpt1 or VDpt2 [Tj] / VDpt1 or VDpt2 [Tj = 25°C]
1.4
1.2
1.3
1.1
1.2
1.1
1.0
1.0
0.9
0.9
0.8
0.8
0.7
0.7
0.6
0.5
0.6
0.4
0.3
0.5
Tj(°C)
0.2
Tj(°C)
0.4
0
25
50
75
100
125
150
Fig. 4: Relative variation of thermal impedance
junction to case versus pulse duration.
0
25
50
75
100
125
150
Fig. 5-1: Reverse current versus junction
temperature without driver current (typical values).
K = [Zth(j-c)/Rth(j-c)]
IR(OUT)OFF(µA)
1.E+00
1.E+02
Pt1 & Pt2 open
VR(out)=700V
1.E+01
1.E+00
1.E-01
1.E-02
tp(s)
Tj(°C)
1.E-03
1.E-01
1.E-03
1.E-02
1.E-01
1.E+00
0
25
50
75
100
125
150
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STIL02-P5
Fig. 5-2: Reverse current versus junction
temperature with driver current (typical values).
Fig. 6: Forward voltage drop for one power switch
versus junction temperature at the peak forward
current(typical values).
IR(OUT)ON(µA)
VF(V)
100.0
1.08
Iout(peak)=3A
Ipt1 = Ipt2 =10mA
VR(out)=400V
1.04
1.00
10.0
0.96
0.92
0.88
Tj(°C)
Tj(°C)
1.0
0.84
0
25
50
75
100
125
150
Fig. 7-1: Peak forward voltage drop versus peak
forward output current for one power switch at
Tj=25°C (typical and maximal values).
0
25
50
75
100
125
150
Fig. 7-2: Peak forward voltage drop versus peak
forward output current for one power switch at
Tj=150°C (typical and maximum values).
IOUT(peak)ON(A)
IOUT(peak)ON(A)
5
5
Tj=25°C
Tj=150°C
Typical
4
4
Typical
Maximum
Maximum
3
3
2
2
1
1
VF(V)
VF(V)
0
0
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
Fig. 8: Relative variation of dV/dt immunity versus
junction temperature (typical values).
dVDOUT [Tj] / dVDOUT [Tj=150°C]
20
VDout=470V
18
16
14
12
10
8
6
4
2
Tj(°C)
0
25
6/7
50
75
100
125
150
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
STIL02-P5
PACKAGE MECHANICAL DATA
PENTAWATT HV2 (in line)
REF.
A
DIMENSIONS
Millimeters
C
H2
L7
Inches
Min.
Max.
Min.
Max.
A
4.19
4.70
0.165
0.185
C
1.14
1.40
0.044
0.055
D
2.5
2.72
0.098
0.107
E
0.38
0.51
0.015
0.020
F
0.66
0.82
0.026
0.032
L6
D
L3
E
G
2.54 Typ.
0.10 Typ.
G2
7.62 Typ.
0.30 Typ.
H2
10.04
L3
L6
G
F
G2
L7
10.29
0.395
23.5 Typ.
9.90
10.16
0.405
0.925 Typ.
0.389
1.52 Typ.
0.400
0.059 Typ.
Order code
Marking
Package
Weight
Delivery mode
Base qty
STIL02-P5
STIL02
PENTAWATT
HV2 (in line)
1.9 g.
Tube
50
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use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by
implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to
change without notice. This publication supersedes and replaces all information previously supplied.
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© 2002 STMicroelectronics - Printed in Italy - All rights reserved.
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