ONSEMI NTD3055

NTD3055−150
Power MOSFET 9.0 A, 60 V
N−Channel DPAK
Designed for low voltage, high speed switching applications in
power supplies, converters and power motor controls and bridge
circuits.
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9.0 AMPERES, 60 VOLTS
RDS(on) = 122 m (Typ)
Features
• Pb−Free Packages are Available
Typical Applications
N−Channel
Power Supplies
Converters
Power Motor Controls
Bridge Circuits
D
G
S
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Symbol
Value
Unit
Drain−to−Source Voltage
VDSS
60
Vdc
Drain−to−Gate Voltage (RGS = 10 M)
VDGR
60
Vdc
Gate−to−Source Voltage
− Continuous
− Non−repetitive (tp10 ms)
VGS
VGS
20
30
Drain Current
− Continuous @ TA = 25°C
− Continuous @ TA = 100°C
− Single Pulse (tp10 s)
ID
ID
9.0
3.0
27
Apk
PD
28.8
0.19
2.1
1.5
W
W/°C
W
W
TJ, Tstg
−55 to
175
°C
EAS
30
mJ
RJC
RJA
RJA
5.2
71.4
100
TL
260
Total Power Dissipation @ TA = 25°C
Derate above 25°C
Total Power Dissipation @ TA = 25°C (Note 1)
Total Power Dissipation @ TA = 25°C (Note 2)
Operating and Storage Temperature Range
Single Pulse Drain−to−Source Avalanche
Energy − Starting TJ = 25°C
(VDD = 25 Vdc, VGS = 10 Vdc,
L = 1.0 mH, IL(pk) = 7.75 A, VDS = 60 Vdc)
Thermal Resistance
− Junction−to−Case
− Junction−to−Ambient (Note 1)
− Junction−to−Ambient (Note 2)
Maximum Lead Temperature for Soldering
Purposes, 1/8″ from case for 10 seconds
Vdc
August, 2004 − Rev. 4
4
Drain
4
Adc
IDM
1 2
3
DPAK
CASE 369C
STYLE 2
“SURFACE MOUNT”
2
1
3
Drain
Gate
Source
4
Drain
4
°C/W
DPAK−3
CASE 369D
STYLE 2
“STRAIGHT LEAD”
1
2
3
1 2 3
Gate Drain Source
°C
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits
are exceeded, device functional operation is not implied, damage may occur
and reliability may be affected.
1. When surface mounted to an FR4 board using 0.5 sq in pad size.
2. When surface mounted to an FR4 board using minimum recommended
pad size.
 Semiconductor Components Industries, LLC, 2004
MARKING
DIAGRAMS
AYW
3150
Rating
AYW
3150
•
•
•
•
1
3150
A
Y
W
Device Code
= Assembly Location
= Year
= Work Week
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
Publication Order Number:
NTD3055−150/D
NTD3055−150
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
Unit
60
−
−
70.2
−
−
−
−
−
−
1.0
10
−
−
±100
2.0
−
3.0
6.4
4.0
−
−
122
150
−
−
1.4
1.1
1.9
−
gFS
−
5.4
−
mhos
Ciss
−
200
280
pF
Coss
−
70
100
Crss
−
26
40
td(on)
−
11.2
25
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage (Note 3)
(VGS = 0 Vdc, ID = 250 Adc)
Temperature Coefficient (Positive)
V(BR)DSS
Zero Gate Voltage Drain Current
(VDS = 60 Vdc, VGS = 0 Vdc)
(VDS = 60 Vdc, VGS = 0 Vdc, TJ = 150°C)
IDSS
Gate−Body Leakage Current (VGS = ± 20 Vdc, VDS = 0 Vdc)
IGSS
Vdc
mV/°C
Adc
nAdc
ON CHARACTERISTICS (Note 3)
Gate Threshold Voltage (Note 3)
(VDS = VGS, ID = 250 Adc)
Threshold Temperature Coefficient (Negative)
VGS(th)
Static Drain−to−Source On−Resistance (Note 3)
(VGS = 10 Vdc, ID = 4.5 Adc)
RDS(on)
Static Drain−to−Source On−Voltage (Note 3)
(VGS = 10 Vdc, ID = 9.0 Adc)
(VGS = 10 Vdc, ID = 4.5 Adc, TJ = 150°C)
VDS(on)
Forward Transconductance (Note 3) (VDS = 7.0 Vdc, ID = 6.0 Adc)
Vdc
mV/°C
m
Vdc
DYNAMIC CHARACTERISTICS
Input Capacitance
Output Capacitance
(VDS = 25 Vdc, VGS = 0 Vdc,
f = 1.0 MHz)
Transfer Capacitance
SWITCHING CHARACTERISTICS (Note 4)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
(VDD = 48 Vdc, ID = 9.0 Adc,
VGS = 10 Vdc,
Vdc
RG = 9.1 )) ((Note 3))
Fall Time
Gate Charge
(VDS = 48 Vdc, ID = 9.0 Adc,
VGS = 10 Vdc) (Note 3)
ns
tr
−
37.1
80
td(off)
−
12.2
25
tf
−
23
50
QT
−
7.1
15
Q1
−
1.7
−
Q2
−
3.5
−
VSD
−
−
0.98
0.86
1.20
−
Vdc
trr
−
28.9
−
ns
ta
−
21.6
−
tb
−
7.3
−
QRR
−
0.036
−
nC
SOURCE−DRAIN DIODE CHARACTERISTICS
Forward On−Voltage
(IS = 9.0 Adc, VGS = 0 Vdc) (Note 3)
(IS = 19 Adc, VGS = 0 Vdc, TJ =
150°C)
Reverse Recovery Time
(IS = 9.0 Adc, VGS = 0 Vdc,
dIS/dt = 100 A/s) (Note 3)
Reverse Recovery Stored Charge
3. Pulse Test: Pulse Width ≤ 300 s, Duty Cycle ≤ 2%.
4. Switching characteristics are independent of operating junction temperatures.
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2
C
NTD3055−150
20
VGS = 10 V
16
ID, DRAIN CURRENT (AMPS)
ID, DRAIN CURRENT (AMPS)
20
VGS = 9 V
VGS = 7 V
VGS = 8 V
12
8
VGS = 6 V
4
VGS = 5 V
1
2
3
4
5
6
7
12
8
TJ = 25°C
4
TJ = 100°C
8
TJ = −55°C
3
6
7
8
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
0.5
VGS = 10 V
0.4
TJ = 100°C
0.3
0.2
TJ = 25°C
TJ = −55°C
0.1
0
0
4
8
12
16
24
20
9
0.5
VGS = 15 V
0.4
0.3
TJ = 100°C
0.2
TJ = 25°C
0.1
TJ = −55°C
0
0
4
8
12
16
20
ID, DRAIN CURRENT (AMPS)
ID, DRAIN CURRENT (AMPS)
Figure 3. On−Resistance versus
Gate−To−Source Voltage
Figure 4. On−Resistance versus Drain Current
and Gate Voltage
24
1000
2.2
2
5
4
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
RDS(on), DRAIN−TO−SOURCE RESISTANCE ()
0
VGS = 0 V
ID = 4.5 A
VGS = 10 V
TJ = 150°C
1.8
IDSS, LEAKAGE (nA)
RDS(on), DRAIN−TO−SOURCE RESISTANCE ()
16
0
0
RDS(on), DRAIN−TO−SOURCE RESISTANCE
(NORMALIZED)
VDS ≥ 10 V
1.6
1.4
1.2
1
100
TJ = 125°C
10
TJ = 100°C
0.8
0.6
−50 −25
1
0
25
50
75
100
125
150
175
0
10
20
30
40
50
TJ, JUNCTION TEMPERATURE (°C)
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−To−Source Leakage
Current versus Voltage
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3
60
560
VDS = 0 V
C, CAPACITANCE (pF)
480
VGS = 0 V
VGS, GATE−TO−SOURCE VOLTAGE (V)
NTD3055−150
TJ = 25°C
Ciss
400
320
Crss
240
Ciss
160
Coss
80
Crss
0
5 VGS 0 VDS 5
10
15
10
20
12
QT
10
8
6
4
ID = 9 A
TJ = 25°C
2
0
0
25
1
2
3
4
6
5
7
8
Qg, TOTAL GATE CHARGE (nC)
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (V)
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source and
Drain−to−Source Voltage versus Total Charge
100
10
IS, SOURCE CURRENT (AMPS)
VDS = 30 V
ID = 9 A
VGS = 10 V
t, TIME (ns)
tr
tf
td(off)
td(on)
VGS = 0 V
TJ = 25°C
8
6
4
2
0
10
1
10
100
0.6
0.68
0.76
0.84
0.92
VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
Figure 9. Resistive Switching Time Variation
versus Gate Resistance
Figure 10. Diode Forward Voltage versus
Current
VGS = 20 V
SINGLE PULSE
TC = 25°C
10
10 s
100 s
1 ms
10 ms
1
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
0.1
0.1
1
dc
10
100
EAS, SINGLE PULSE DRAIN−TO−SOURCE
AVALANCHE ENERGY (mJ)
RG, GATE RESISTANCE ()
100
ID, DRAIN CURRENT (AMPS)
VGS
Q2
Q1
1
32
ID = 7.75 A
24
16
8
0
25
50
75
100
125
150
175
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
TJ, STARTING JUNCTION TEMPERATURE (°C)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
Figure 12. Maximum Avalanche Energy versus
Starting Junction Temperature
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4
NTD3055−150
r(t), NORMALIZED EFFECTIVE
TRANSIENT THERMAL RESISTANCE
10
D = 0.5
0.2
1
0.1
P(pk)
0.05
t1
0.01
t2
DUTY CYCLE, D = t1/t2
SINGLE PULSE
0.1
0.00001
0.0001
0.001
0.01
t, TIME (s)
0.1
1
10
Figure 13. Thermal Response
ORDERING INFORMATION
Package
Shipping†
DPAK
75 Units/Rail
NTD3055−150G
DPAK
(Pb−Free)
75 Units/Rail
NTD3055−150−1
DPAK−3
75 Units/Rail
DPAK−3
(Pb−Free)
75 Units/Rail
DPAK
2500 Tape & Reel
DPAK
(Pb−Free)
2500 Tape & Reel
Device
NTD3055−150
NTD3055−150−1G
NTD3055−150T4
NTD3055−150T4G
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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5
NTD3055−150
PACKAGE DIMENSIONS
DPAK
CASE 369C−01
ISSUE O
SEATING
PLANE
−T−
C
B
V
E
R
4
Z
A
S
1
2
DIM
A
B
C
D
E
F
G
H
J
K
L
R
S
U
V
Z
3
U
K
F
J
L
H
D
G
2 PL
0.13 (0.005)
M
T
INCHES
MIN
MAX
0.235 0.245
0.250 0.265
0.086 0.094
0.027 0.035
0.018 0.023
0.037 0.045
0.180 BSC
0.034 0.040
0.018 0.023
0.102 0.114
0.090 BSC
0.180 0.215
0.025 0.040
0.020
−−−
0.035 0.050
0.155
−−−
STYLE 2:
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN
SOLDERING FOOTPRINT*
6.20
0.244
3.0
0.118
2.58
0.101
5.80
0.228
1.6
0.063
6.172
0.243
SCALE 3:1
mm inches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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6
MILLIMETERS
MIN
MAX
5.97
6.22
6.35
6.73
2.19
2.38
0.69
0.88
0.46
0.58
0.94
1.14
4.58 BSC
0.87
1.01
0.46
0.58
2.60
2.89
2.29 BSC
4.57
5.45
0.63
1.01
0.51
−−−
0.89
1.27
3.93
−−−
NTD3055−150
PACKAGE DIMENSIONS
DPAK−3
CASE 369D−01
ISSUE B
V
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
C
B
E
R
4
Z
A
S
1
2
3
−T−
SEATING
PLANE
K
J
F
H
D
G
3 PL
0.13 (0.005)
M
DIM
A
B
C
D
E
F
G
H
J
K
R
S
V
Z
INCHES
MIN
MAX
0.235 0.245
0.250 0.265
0.086 0.094
0.027 0.035
0.018 0.023
0.037 0.045
0.090 BSC
0.034 0.040
0.018 0.023
0.350 0.380
0.180 0.215
0.025 0.040
0.035 0.050
0.155
−−−
STYLE 2:
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN
T
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7
MILLIMETERS
MIN
MAX
5.97
6.35
6.35
6.73
2.19
2.38
0.69
0.88
0.46
0.58
0.94
1.14
2.29 BSC
0.87
1.01
0.46
0.58
8.89
9.65
4.45
5.45
0.63
1.01
0.89
1.27
3.93
−−−
NTD3055−150
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
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8
For additional information, please contact your
local Sales Representative.
NTD3055−150/D