SEMTECH LCDA12C-8.TB

LCDA12C-8 and LCDA15C-8
Low Capacitance TVS Diode Array
For Multi-mode Transceiver Protection
PROTECTION PRODUCTS
Description
Features
The LCDAxxC-8 has been specifically designed to
protect sensitive components which are connected to
data and transmission lines from over voltages caused
by electrostatic discharge (ESD), electrical fast transients (EFT), and lightning.
The low capacitance array configuration of the
LCDAxxC-8 allows the user to protect eight high-speed
data or I/O lines. They may be used on systems
operating from 5 to 15 Volts. The high surge capability
(500W, tp=8/20µs) makes the LCDAxxC-8 suitable for
telecommunications systems operating in harsh transient environments. The low inductance construction
minimizes voltage overshoot during high current
surges.
The features of the LCDAxxC-8 are ideal for protecting
multi-protocol transceivers in WAN applications such as
Frame Relay systems, routers, and switches.
‹ Transient protection for high-speed data lines to
‹
‹
‹
‹
‹
IEC 61000-4-2 (ESD) ±15kV (air), ±8kV (contact)
IEC 61000-4-4 (EFT) 40A (5/50ns)
IEC 61000-4-5 (Lightning) 0.5kV, 12A (8/20µs)
Protects eight I/O lines
Low capacitance for high-speed interfaces
High surge capability
Low clamping voltage
Solid-state silicon avalanche technology
Mechanical Characteristics
‹
‹
‹
‹
JEDEC SO-16 package
Molding compound flammability rating: UL 94V-0
Marking : Part number, date code, logo
Packaging : Tape and Reel per EIA 481
Applications
‹ Multi-Mode Transceiver Protection
‹ WAN Equipment:
CSU/DSU
Multiplexers
Routers
ISP Equipment
Customer Premise Equipment
‹ Protection for any of the following interfaces:
RS-232 (V.28)
RS-422 (V.11, X.21)
RS-449 (V.11/V.10)
Circuit Diagram
Schematic & PIN Configuration
Pin 1
Pin 16
SO-16 (Top View)
Revision 02/18/05
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LCDA12C-8 and LCDA15C-8
PROTECTION PRODUCTS
Absolute Maximum Rating
R ating
Symbol
Value
Units
Peak Pulse Power (tp = 8/20µs)
Pp k
500
Watts
Lead Soldering Temperature
TL
260 (10 sec.)
°C
Operating Temperature
TJ
-55 to +125
°C
TSTG
-55 to +150
°C
Storage Temperature
Electrical Characteristics
LCDA12C-8
Parameter
Symbol
Conditions
Minimum
Typical
Maximum
Units
12
V
Reverse Stand-Off Voltage
VRWM
Reverse Breakdown Voltage
V BR
It = 1mA
Reverse Leakage Current
IR
VRWM = 12V, T=25°C
5
µA
Clamp ing Voltage
VC
IPP = 5A, tp = 8/20µs
19
V
Clamp ing Voltage
VC
IPP = 20A, tp = 8/20µs
26.6
V
Peak Pulse Current
IP P
tp = 8/20µs
20
A
Junction Cap acitance
Cj
Between I/O p ins and
Ground
VR = 0V, f = 1MHz
8
15
pF
Symbol
Conditions
Typical
Maximum
Units
15
V
13.3
V
LCDA15C-8
Parameter
Minimum
Reverse Stand-Off Voltage
VRWM
Reverse Breakdown Voltage
V BR
It = 1mA
Reverse Leakage Current
IR
VRWM = 15V, T=25°C
5
µA
Clamp ing Voltage
VC
IPP = 1A, tp = 8/20µs
24
V
Clamp ing Voltage
VC
IPP = 15A, tp = 8/20µs
33
V
Peak Pulse Current
IP P
tp = 8/20µs
15
A
Junction Cap acitance
Cj
Between I/O p ins and
Ground
VR = 0V, f = 1MHz
15
pF
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LCDA12C-8 and LCDA15C-8
PROTECTION PRODUCTS
Typical Characteristics
Non-Repetitive Peak Pulse Power vs. Pulse Time
Power Derating Curve
10
110
90
% of Rated Power or IPP
Peak Pulse Power - Ppk (kW)
100
1
0.1
80
70
60
50
40
30
20
10
0.01
0
0.1
1
10
100
1000
0
25
50
Pulse Duration - tp (µs)
125
150
175
28
110
W aveform
Parameters:
tr = 8µs
td = 20µs
90
80
70
e
26
Clamping Voltage - VC (V)
100
Percent of IPP
100
Clamping Voltage vs. Peak Pulse Current
Pulse Waveform
-t
60
50
40
td = I PP /2
30
24
LCDA15C-8
22
20
18
LCDA12C-8
16
Waveform
Parameters:
tr = 8µs
td = 20µs
14
20
12
10
10
0
0
5
10
15
20
25
0
30
5
10
15
20
25
Peak Pulse Current - IPP (A)
T im e (µs)
LCDA12C-8 Capacitance vs. Reverse Voltage
LCDA15C-8 Capacitance vs. Reverse Voltage
12
6
10
5
Capacitance - Cj (pF)
Capacitance - Cj (pF)
75
Ambient Temperature - TA (oC)
8
6
4
2
4
3
2
1
f = 1MHz
f = 1MHz
0
0
2
4
6
8
10
0
12
0
Reverse Voltage - VR (V)
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4
6
8
10
12
14
Reverse Voltage - VR (V)
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LCDA12C-8 and LCDA15C-8
PROTECTION PRODUCTS
Applications Information
Device Connection
Device Connection Options for Protection of Eight
High-Speed Data Lines
The LCDAxxC-8 may be configured to protect up to
eight I/O lines operating between 5 and 15V. It may be
used to protect the most popular serial data interface
standard lines making it ideal for use in equipment
utilizing multi-mode transceivers. The LCDAxxC-8 is
symmetrical so the data lines may be connected at
pins 1-8 or 9-16. Pins 9-16 or 1-8 are connected to
ground as shown. For best results, these pins should
be connected directly to a ground plane on the board.
The path length should be kept as short as possible to
minimize parasitic inductance.
Multi-Mode Transceiver Protection
The LCDAxxC-8 may be used to protect multi-mode
transceiver I/O lines with external connections. The
LCDAxxC-8 adds a maximum loading capacitance of
15pF with a working voltage of 12V or 15V. This allows
the transceiver to safely operate in all modes without
clipping or degradation of the signal.
With proper design and layout, the transceiver port can
be protected to >15kV (HBM per IEC 61000-4-2).
Matte Tin Lead Finish
Circuit Board Layout Recommendations for Suppression of ESD.
Matte tin has become the industry standard lead-free
replacement for SnPb lead finishes. A matte tin finish
is composed of 100% tin solder with large grains.
Since the solder volume on the leads is small compared to the solder paste volume that is placed on the
land pattern of the PCB, the reflow profile will be
determined by the requirements of the solder paste.
Therefore, these devices are compatible with both
lead-free and SnPb assembly techniques. In addition,
unlike other lead-free compositions, matte tin does not
have any added alloys that can cause degradation of
the solder joint.
Good circuit board layout is critical for the suppression
of fast rise-time transients such as ESD. The following
guidelines are recommended:
z
z
z
z
z
z
Place the LCDAxxC-8 near the input terminals or
connectors to restrict transient coupling.
Minimize the path length between the LCDAxxC-8
and the protected line.
Minimize all conductive loops including power and
ground loops.
The ESD transient return path to ground should be
kept as short as possible.
Never run critical signals near board edges.
Use ground planes whenever possible.
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LCDA12C-8 and LCDA15C-8
PROTECTION PRODUCTS
Outline Drawing - SO-16
DIMENSIONS
INCHES
MILLIMETERS
DIM
MIN NOM MAX MIN NOM MAX
h
A
D
e
N
h
H
2X E/2
E1 E
c
GAGE
PLANE
0.25
ccc C
1
2
L
(L1)
DETAIL
3
01
A
e/2
2X N/2 TIPS
B
D
SIDE VIEW
aaa C
SEE DETAIL
A
A
A1
A2
b
c
D
E1
E
e
h
L
L1
N
01
aaa
bbb
ccc
.053
.069
.004
.010
.049
.065
.012
.020
.007
.010
.386 .390 .394
.150 .154 .157
.236 BSC
.050 BSC
.010
.020
.016 .028 .041
(.041)
16
0°
8°
.004
.010
.008
1.35
1.75
0.10
0.25
1.25
1.65
0.31
0.51
0.17
0.25
9.80 9.90 10.00
3.80 3.90 4.00
6.00 BSC
1.27 BSC
0.25
0.50
0.40 0.72 1.04
(1.04)
16
0°
8°
0.10
0.25
0.20
A2 A
SEATING
PLANE
C
A1
bxN
bbb
C A-B D
NOTES:
1.
CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES).
2. DATUMS -A- AND -B- TO BE DETERMINED AT DATUM PLANE -H3. DIMENSIONS "E1" AND "D" DO NOT INCLUDE MOLD FLASH, PROTRUSIONS
OR GATE BURRS.
4. REFERENCE JEDEC STD MS-012, VARIATION AC.
Land Pattern - SO-16
X
DIM
(C)
G
Z
Y
C
G
P
X
Y
Z
DIMENSIONS
INCHES
MILLIMETERS
(.205)
.118
.050
.024
.087
.291
(5.20)
3.00
1.27
0.60
2.20
7.40
P
NOTES:
1.
THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY.
CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR
COMPANY'S MANUFACTURING GUIDELINES ARE MET.
2.
REFERENCE IPC-SM-782A, RLP NO. 304A.
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LCDA12C-8 and LCDA15C-8
PROTECTION PRODUCTS
Ordering Information
Part Number
Lead Finish
Qty per
Reel
R eel Size
LCDA12C-8.TB
SnPb
500
7 Inch
LCDA15C-8.TB
SnPb
500
7 Inch
LCDA12C-8.TBT
Pb Free
500
7 Inch
LCDA15C-8.TBT
Pb Free
500
7 Inch
LCDA12C-8
SnPb
48/Tube
N /A
LCDA15C-8
SnPb
48/Tube
N /A
LCDA12C-8.T
Pb Free
48/Tube
N /A
LCDA15C-8.T
Pb Free
48/Tube
N /A
Contact Information
Semtech Corporation
Protection Products Division
200 Flynn Road, Camarillo, CA 93012
Phone: (805)498-2111 FAX (805)498-3804
 2005 Semtech Corp.
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