FUJITSU SEMICONDUCTOR DATA SHEET DS04-13105-3E Linear IC Converter CMOS A/D Converter (With 4-channel Input at 12-bit Resolution) MB88101A ■ DESCRIPTION The MB88101A is an analog-to-digital converter that converts its analog input to a 12-bit digital value and outputs it as serial data. The MB88101A employs a successive approximation method for A/D conversion. The MB88101A has four input channels selectable for analog input under control of the dedicated external pins. The MB88101A can be switched to a mode for continuous A/D conversion, in which it outputs serial data from the MSB or LSB selectable depending on the mode setting. ■ FEATURES • • • • • • • • • 4-channel analog input One analog input channel selectable for conversion by external control CR-type successive approximation system with a sample-and-hole circuit 12-bit resolution Serial output of 12-bit digital data Capable of continuous conversion (continuous conversion mode) MSB or LSB selectable for serial output CMOS process Package options of 16-pin DIP, 16-pin SSOP, and 16-pin SOP available ■ PACKAGES 16-pin Plastic DIP 16-pin Plastic SSOP 16-pin Plastic SOP (DIP-16P-M04) (FPT-16P-M05) (FPT-16P-M06) MB88101A ■ PIN ASSIGNMENT (TOP VIEW) 16 VCC 15 SAMP 3 14 DO AGND 4 13 CLK AN2 5 12 CS AN3 6 11 C0 MOD0 7 10 MOD1 8 9 AN0 1 AN1 2 VREF INDEX (DIP-16P-M04) (FPT-16P-M06) (FPT-16P-M05) 2 C1 DGND MB88101A ■ PIN DESCRIPTION Pin no. Symbol I/O Descriptions 1 2 5 6 AN0 AN1 AN2 AN3 I Analog input pins. One of these channels can be selected depending on the C0 and C1 settings. 14 DO O This pin outputs the result of A/D conversion. The result is 12-bit serial data output in synchronization with the rise of CLK. 13 CLK I Clock input pin for A/D conversion 12 CS I Chip select signal input pin. Setting the signal level to “L” after turning the power on starts A/D conversion; setting it to “H” stops A/D conversion. When this pin is “H”, the DO and SAMP pins are “Hi-Z”. 11 10 C0 C1 I Input pins for selecting the analog input channels from among pins AN0 to AN3. See Table 1 for the correspondence between the pin settings and the channels selected. To switch the channel in mode 2 or 3, set these pins before the SAMP pin goes “H”. 7 8 MOD0 MOD1 I Conversion mode setting pins. For the correspondence between the pin settings and the modes selected, see Table 2 and “■ FUNCTIONAL DESCRIPTION.” 15 SAMP O This pin becomes active in prior to data output. Serial data is output from the DO pin five clock cycles after the signal level at this pin goes “L” after “H” for one clock cycle. 3 VREF — Reference voltage input pin 4 AGND — Analog circuit ground pin 9 DGND — Digital circuit ground pin 16 VCC — Power supply pin Hi-Z : High-Z • Channel selection Table 1 • Mode selection Pin Settings and Channel Selection Table 2 Pin Settings and Mode Selection C1 C0 Channel MOD 0 MOD1 Mode L L AN0 L L Mode 1 L H AN1 L H Mode 2 H L AN2 H L (Disabled) H H AN3 H H Mode 3 3 MB88101A ■ BLOCK DIAGRAM VREF 12-bit D/A converter AN0 Comparator Successive approximation register AN3 12-bit latch C0 C1 MOD0 MOD1 Decoder Sample-and-hold circuit VCC AGND DGND 4 CS CLK Selecter AN2 SAMP Input circuit AN1 DO MB88101A ■ FUNCTIONAL DESCRIPTION 1. Mode 1 This mode sets the DO pin to “L” and stops conversion upon completion of conversion of 12 bits. To restart conversion, set CS to “H” once then to “L”. In this mode, converted data is output from the MSB. • Timing diagram CS MOD0, MOD1 C0, C1 1 CLK 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 1 Sampling Sampling Bit Trial DO 2 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 Hi-Z Hi-Z B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 Hi-Z B1 B0 Hi-Z SAMP 2. Mode 2 This mode continues conversion until CS becomes “H” after it becomes “L”. Converted data is output from the LSB, with the first piece of converted data output 20 clock cycles after CS becomes “L”. Changing the channel select pin settings before starting sampling of one analog input allows another to be converted. • Timing diagram CS MOD0, MOD1 C0, C1 Mode 2 AN0 AN2 AN1 CLK 16CLK Bit Trial MSB (AN0) ⇒ LSB Hi-Z DO Hi-Z MSB (AN2) ⇒ LSB LSB (AN0) ⇒ MSB MSB (AN1) ⇒ LSB LSB (AN2) ⇒ MSB Hi-Z Hi-Z SAMP 5 MB88101A 3. Mode 3 This mode continues conversion until CS becomes “H” after it becomes “L”. Converted data is output from the MSB. Changing the channel select pin settings before starting sampling of one analog input allows another to be converted. • Timing diagram CS MOD0, MOD1 C0, C1 Mode 3 AN0 AN2 AN1 CLK Bit Trial MSB (AN0) ⇒ LSB Hi-Z DO Hi-Z SAMP 6 MSB (AN0) ⇒ LSB MSB (AN2) ⇒ LSB MSB (AN2) ⇒ LSB MSB (AN1) ⇒ LSB MSB (AN1) ⇒ LSB Hi-Z Hi-Z MB88101A ■ ABSOLUTE MAXIMUM RATINGS Parameter Power supply voltage Input voltage Output voltage Symbol Conditions VCC VREF VIN Based on GND (Ta = +25°C) VOUT Rating Unit Min Max –0.3 +7.0 V –0.3* +7.0* V –0.3 VCC + 0.3 V –0.3 VCC + 0.3 V Power consumption PD — — 150 mW Operating temperature Ta — –40 +85 °C Storage temperature Tstg — –55 +150 °C * : VCC ≥ VREF WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings. ■ RECOMMENDED OPERATING CONDITIONS Parameter Power supply voltage Operation temperature Symbol Value Unit Min Typ Max VCC 3.3 — 5.5 V GND — 0 — V Ta –40 — +85 °C WARNING: The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device’s electrical characteristics are warranted when the device is operated within these ranges. Always use semiconductor devices within their recommended operating condition ranges. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their FUJITSU representatives beforehand. 7 MB88101A ■ ELECTRICAL CHARACTERISTIC 1. DC Characteristics (1) Digital section (VCC = 3.3 V to 5.5 V, DGND = 0 V, Ta = –40°C to +85°C) Parameter Symbol Power supply voltage VCC Power supply current ICC Input leakage current IILK Low-level input voltage VIL High-level input voltage VIH High-impedance output leakage current IOLZ Low-level output voltage VOL High-level output voltage VOH Pin name Value Conditions Unit Min Typ Max 3.3 5.0 5.5 V — VCC Operation at CLK =166kHz (with no load) — 0.8 2.0 mA MOD0, MOD1 CLK CS C0 C1 VIN = 0 to VCC –10 — 10 µA — VSS − 0.3 — 0.2 VCC V — 0.8 VCC — VCC + 0.3 V VIN = 0 to VCC –10 — 10 µA IOL = 2.5 mA — — 0.4 V VCC − 0.4 — — V DO SAMP IOH = –400 µA (2) Analog section (VREF, VCC = 3.3 V to 5.5 V (VCC ≥ VREF), AGND = 0 V, Ta = –40°C to +85°C) Parameter 8 Symbol Resolution — Linearity error — Differential linearity error — Conversion time — Consumption current IREF Analog reference voltage — Analog input voltage — Pin name AN0 to AN3 — VREF AN0 to AN3 Value Unit Min Typ Max — 12 — bit –4.0 — 2.0 LSB –1.0 — 3.0 LSB — 16 — CLK — 100 300 µA 3.3 5.0 VCC V 0 — VREF V MB88101A (3) Definitions of A/D converter terms • Resolution Analog transition identifiable by the A/D converter • Linearity error Deviation of the straight line drawn between the zero transition point (0000 0000 0000 ↔ 0000 0000 0001) and the full-scale transition point (1111 1111 1110 ↔ 1111 1111 1111) of the device from actual conversion characteristics • Differential linearity error Deviation from the ideal input voltage required to shift output code by one LSB Actual converted value Digital output 1111 1111 1111 1111 1111 1110 • • • (1 LSB × N + VOT) Ideal converted value • • • • Linearity error • • 0000 0000 0010 0000 0000 0001 0000 0000 0000 Analog output VNT V(N+1)T VOT • 1 LSB = • Linearity error = • Differential linearity error = VFST VFST - VOT 4094 VNT - (1 LSB × N + VOT) 1 LSB V(N+1)T - VNT 1 LSB -1 (LSB) (LSB) • Analog input equivalent circuit Analog input Comparator RON1 RON2 C0 ⋅ RON1 = About 1.5 kΩ ⋅ RON2 = About 1.5 kΩ ⋅ C0 = About 60 pF Note: The above values are reference values. Notes: • The tolerance of output impedance of an external circuit connected to this A/D converter has an effect on conversion time (CLK frequency). See “■ TYPICAL CHARACTERISTICS”. • If the output impedance of the external input is too high, the analog voltage sampling time may be short. • When turning the device on, turn the power supply for the digital system first before turning VREF on. 9 MB88101A 2. AC Characteristics (VREF, VCC = 3.3 V to +5.5 V (VCC ≥ VREF), AGND = 0 V, Ta = –40°C to +85°C) Parameter Symbol Conditions Value Max VCC = 5 V ± 10% *1 1.0 30.0 µs — 6.0 30.0 µs Clock cycle time tCLK Low-level clock pulse width tCKL — 2.8 14.8 µs High-level clock pulse width tCKH — 2.8 14.8 µs Clock rise time Clock fall time tCr tCf — — 0.2 µs CS setup time tCSS — tCKL + 0.4 — µs CS hold time tCSH — 1.0 — µs CS release time tCSR — 1.0 — CLK Channel setup time tCHS — 0 — µs Channel hold time tCHH — 1.0 — CLK Data output delay time tDO *2 — 0.5 µs MOD setup time tMOS — 0.2 — µs MOD hold time tMOH — 0.1 — µs Data active delay time tDVE — — 0.5 µs Data float delay time tDZE — — 0.5 µs SAMP active delay time tSVE — — 0.5 µs SAMP float delay time tSZE — — 0.5 µs SAMP high-level output delay time tSHD *2 — 0.5 µs SAMP low-level output delay time tSLD *2 — 0.5 µs *1: Depending on the output impedance of the external circuit connected to the analog input pin *2: See “• AC test circuit.” • AC test circuit Measurement point CL = 50 pF 10 Unit Min MB88101A ■ TIMING DIAGRAM (1) Input clock timing t CLK t CKH CLK t Cf t CKL t Cr Evaluation levels are 80% and 20% of the VCC. (2) A/D startup timing CLK tCSH tCSS CS tMOS tMOH MOD0, MOD1 tCHS tCHH C0, C1 tSVE SAMP tSHD tSLD Hi-Z tDVE Hi-Z DO 11 MB88101A (3) Data output delay time and A/D stop timing CLK tCSR CS tSZE Hi-Z SAMP tDO tDZE Hi-Z DO 12 MB88101A ■ TYPICAL CHARACTERISTICS Power supply current ICC (µA) Power supply voltage vs. Power supply current 1,000 900 800 700 600 500 400 300 200 100 0 Ta = +25°C VREF = VCC 3.0 3.5 4.0 4.5 5.0 5.5 6.0 Power supply voltage VCC (V) Analog consumption current IREF (µA) Analog reference voltage vs. Analog consumption current 300 Ta = +25°C VCC = VREF 250 200 150 100 50 0 3.0 3.5 4.0 4.5 5.0 5.5 6.0 Analog reference voltage VREF (V) (Continued) 13 MB88101A (Continued) Analog input external impedance vs. Clock cycle time (tCLK) 10 160 Ta = +25°C 9 128 7 6 96 5 4 64 3 2 32 VCC = VREF = 3.3 V VCC = VREF = 5.0 V 1 0 0 0 1 2 3 4 5 6 7 8 Analog input impedance (kΩ) Note ; Conversion time = Clock cycle time (tCLK) × 16 14 9 10 11 12 13 14 15 Conversion time (µs) Clock cycle time tCLK (µs) 8 MB88101A ■ ORDERING INFORMATION Part number MB88101AP MB88101APFV MB88101APF Package Remarks 16-pin Plastic DIP (DIP-16P-M04) 16-pin Plastic SSOP (FPT-16P-M05) 16-pin Plastic SOP (FPT-16P-M06) 15 MB88101A ■ PACKAGE DIMENSIONS 16-pin Plastic DIP (DIP-16P-M04) +0.20 19.55 –0.30 .770 +.008 –.012 INDEX-1 6.20±0.25 (.244±.010) INDEX-2 0.51(.020)MIN 4.36(.172)MAX 0.25±0.05 (.010±.002) 3.00(.118)MIN 0.46±0.08 (.018±.003) +0.30 0.99 –0 +.012 .039 –0 1.27(.050) MAX C +0.30 1.52 –0 +.012 .060 –0 7.62(.300) TYP 15°MAX 2.54(.100) TYP 1994 FUJITSU LIMITED D16033S-2C-3 Dimensions in mm (inches) . Note : The values in parentheses are reference values. (Continued) 16 MB88101A Note 1) *1 : Resin protrusion. (Each side : +0.15 (.006) Max). Note 2) *2 : These dimensions do not include resin protrusion. Note 3) Pins width and pins thickness include plating thickness. Note 4) Pins width do not include tie bar cutting remainder. 16-pin Plastic SSOP (FPT-16P-M05) *1 5.00±0.10(.197±.004) 0.17±0.03 (.007±.001) 9 16 *2 4.40±0.10 6.40±0.20 (.173±.004) (.252±.008) INDEX Details of "A" part +0.20 1.25 –0.10 +.008 .049 –.004 LEAD No. 1 8 0.65(.026) 0.10(.004) C (Mounting height) "A" 0.24±0.08 (.009±.003) 0.13(.005) M 0~8˚ 0.50±0.20 (.020±.008) 0.60±0.15 (.024±.006) 0.10±0.10 (Stand off) (.004±.004) 0.25(.010) 2003 FUJITSU LIMITED F16013S-c-4-6 Dimensions in mm (inches) . Note : The values in parentheses are reference values. (Continued) 17 MB88101A (Continued) Note 1) *1 : These dimensions include resin protrusion. Note 2) *2 : These dimensions do not include resin protrusion. Note 3) Pins width and pins thickness include plating thickness. Note 4) Pins width do not include tie bar cutting remainder. 16-pin Plastic SOP (FPT-16P-M06) +0.25 +.010 +0.03 *110.15 –0.20 .400 –.008 0.17 –0.04 +.001 16 .007 –.002 9 *2 5.30±0.30 7.80±0.40 (.209±.012) (.307±.016) INDEX Details of "A" part +0.25 2.00 –0.15 +.010 .079 –.006 1 "A" 8 1.27(.050) 0.47±0.08 (.019±.003) 0.13(.005) (Mounting height) 0.25(.010) 0~8˚ M 0.50±0.20 (.020±.008) 0.60±0.15 (.024±.006) +0.10 0.10 –0.05 +.004 .004 –.002 (Stand off) 0.10(.004) C 2002 FUJITSU LIMITED F16015S-c-4-7 Dimensions in mm (inches) . Note : The values in parentheses are reference values. 18 MB88101A FUJITSU LIMITED All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. 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