FUJITSU MB4053M

FUJITSU SEMICONDUCTOR
DATA SHEET
DS04-13103-6E
Linear IC
6-Channel 8-BIT A/D Converter
MB4053
■ DESCRIPTION
The Fujitsu MB4053 is 6-channel, 8-bit, single-slope A/D converter subsystem designed to be used in a
microprocessor based data control system.
The MB4053 is single monolithic bipolar IC providing a 1 of 8 address decoder, 8-channel analog multiplier,
sample and hold, constant current generator, ramp integrator and comparator in a 16-pin package.
This A/D converter subsystems are suitable for a wide range of applications. The resolution required by an
application can be obtained by arbitarily selecting a suitable integration time. Also zero offset and full-scale error
corrections can be made automatically (auto-zero and auto-calibration) to minimize conversion error.
■ FEATURES
•
•
•
•
•
•
•
•
•
•
•
Microprocessor compatible
Digital input/output: TTL compatible
Zero offset and full-scale error correction capability
Ratiometric conversion capability
Available in 16-pin DIP and Flat Package
Compatible with MC 14443 and µA9708 (DIP package)
Single power supply: +4.75 V to +15 V
Excellent Iinearity: ±0.2% max. error
Fast conversion time: 300 µs/ch typ.
Analog input volgage: 0 V to VCC – 2 V (5.25 V max.)
Power Dissipation: 25 mW typ. at VCC = 5 V
■ PACKAGES
16-pin Plastic DIP
16-pin Plastic SOP
(DIP-16P-M04)
(FPT-16P-M06)
MB4053
■ PIN ASSIGNMENT
(Top view)
A1
1
16
A0
A2
2
15
I1
RAMP
START
3
14
VCC
CH
4
13
I2
GND
5
12
I3
RREF
6
11
I4
RAMP
STOP
7
10
I5
VREF
8
9
I6
(DIP-16P-M04)
(FPT-16P-M06)
2
MB4053
■ PIN DESCRIPTION
Pin no.
Pin name
Symbol
Function
9 to 13
15
Analog
input
I1 thru I6
Analog inputs for the six channels. One of the 6 is selected by a specific
bit pattern on A0 to A2.
16
1
2
Channel
selection
input
A0
A1
A2
3
RAMP
START
signal
input
RAMP START A/D conversion start signal input. RAMP START (1 → 0)
Ramp time start signal input. RAMP START (0 → 1)
7
RAMP
STOP
signal
output
RAMP STOP Indicates that CH is charged over comparator reference voltage VBE2.
RAMP STOP (0 → 1) A/D conversion end signal (CH discharged to
comparator reference voltage). RAMP STOP (0 → 1)
4
Ramp
capacitor
pin
CH
8
Reference
voltage
supply pin
VREF
Reference voltage supply pin.
This is the reference voltage source for determining the discharge
current and the analog reference voltage for full-scale factor correction.
When the channel selection input is set 111, this pin is selected for
channel conversion. The full-scale factor is corrected using the
conversion results.
The voltage at this pin must be set to (GND + 2 V) to (VCC – 2 V) and
5.25 V or less.
6
Reference
resistance
pin
RREF
Pin for external reference resistance for setting the discharge current.
14
Power
supply
VCC
5
Ground
GND
Input for selecting an analog input channel. Either GND, one of
channels I1 to I6 or VREF is selected by a specific bit pattern on the 3
inputs.
Pin for externally connecting the ramp capacitor. The value of CH in
conjunction with VREF and RREF establishes the ramp time.
The external resistance is connected between the power source pin
(VCC) and the reference resistance pin (RREF). The discharge current is,
then, IR = (VCC – VREF)/RREF.
Power supply pin
Ground pin
This pin is grounded. When the channel selection input is set to 000,
this terminal is selected for channel conversion. The zero offset is
corrected using the conversion results.
3
MB4053
■ BLOCK DIAGRAM
RAMP START
(FROM MPU)
VCC
14
3
SAMPLE/RAMP
AMPLIFIER
COMPARATOR
I1 15
I2 13
I3 12
ANALOG
INPUT
+
VBE1
IR
ANALOG
MULTIPLEXER
I4 11
I5 10
VREF
VBE2
+
I6 9
–
8
REFERENCE
CURRENT
GENERATOR
DECODER
16
1
2
A0
A1 A2
(FROM MPU)
4
–
6
5
4
RREF
GND
CH
7
RAMP STOP
(TO MPU)
MB4053
■ ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Rating
Min.
Max.
Unit
Power supply voltage
VCC
—
18
V
Digital input voltage
VIND
–0.5
+30
V
Digital output voltage when off
VOH
–0.5
+18
V
Analog input voltage
VINA
–0.5
+30
V
IO
—
10
mA
–55
+150
°C
–55
+125
°C
Output current
Storage temperature
Ceramic
Plastic
Tstg
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
■ RECOMMENDED OPERATING CONDITIONS
Parameter
Symbol
Value
Min.
Typ.
Max.
Unit
Power supply voltage
VCC
4.75
5.0
15
V
Reference voltage*
VREF
2.0
—
5.25
V
Ramp capacity
CH
300
—
—
pF
Reference current
IR
12
—
50
µA
Analog input voltage
VIA
0
—
VREF
V
Output current
IO
—
—
1.6
mA
Operating temperature
Ta
–40
—
+85
°C
* : 2 V ≤ VREF ≤ VCC – 2 V
WARNING: Recommended operating conditions are normal operating ranges for the semiconductor device. All
the device’s electrical characteristics are warranted when operated within these ranges.
Always use semiconductor devices within the recommended operating conditions. Operation outside
these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented on
the data sheet. Users considering application outside the listed conditions are advised to contact their
FUJITSU representative beforehand.
5
MB4053
■ ELECTRICAL CHARACTERISTIC
(VCC = 4.75 V to 15 V, Ta = –40°C to +85°C)
Parameter
Symbol
Value
Min.
Typ.
Max.
Unit
Remarks
Conversion error
EA
—
±0.2
±0.3
%
*1
Linearity error
ER
—
±0.08
±0.2
%
*2
Analog input current
IB
—
–50
–250
nA
Crosstalk between any two channels
VCR
60
—
—
dB
Multiplexer input offset voltage
VOSM
—
2.0
4.0
mV
*3
Conversion time
tC
—
296
350
µs/ch
See “■MEASURMENT
CIRCUIT”
Analog input: 0 thru VREF
CH = 3300 pF, IR = 50 µA
Acquisition time
tA
—
20
40
µs
See “■MEASURMENT
CIRCUIT”
CH = 1000 pF*4
Acquisition current
IA
150
—
—
µA
Ramp start delay time
tO
—
100
—
ns
Multiplexer address time
tM
—
1
—
µs
Digital high level input voltage
VIH
2.0
—
—
V
Digital low level input voltage
VIL
—
—
0.8
V
Digital low level input current
IIL
—
–5
–15
µA
VIL = 0.4 V
Digital high level input current
IIH
—
—
1
µA
VIH = 5.5 V
High level output current
IOH
—
—
10
µA
VOH = 15 V
Low level output voltage
VOL
—
—
0.4
V
IOL = 1.6 mA
Power supply current
ICC
—
5
10
mA
A minus sign (–) prefixing a current value indicates that the current flows from the IC to the external circuit.
*1: Conversion error: For all channels, deviation from a straight line between two points obtained by channel
addresses 000 (0 scale) and 111 (full scale).
*2: Linearity error; Deviation from a straight line between the 0 and full scale points for each channel.
*3: Crosstalk between channels: Voltage change VCH of CH terminal occurring when an input voltage of a channel
is changed by ∆V1 while another channel is already charged (RAMP START = 0).
This calculated by 20log ∆VCH
∆V1
*4: Acquisition time: Sum of multiplexer delay time, RAMP START delay time, and time required to charge the
selected input voltage to the ramp capacitor.
6
MB4053
CONVERSION ERROR
LINEARITY ERROR
}
tREF
I1 to I6
tREF′
RAMP TIME
RAMP TIME
Address “111”
EA
Address “000”
INPUT VOLTAGE
In
t0 ′
t0
0
ER
VREF
0
INPUT VOLTAGE
VREF
7
MB4053
■ MEASURMENT CIRCUIT
4.75 V
A1
I1
A1
A2
VCC
RAMP
START
I2
I3
I4
CH
GND
I5
RREF
I6
RAMP
STOP
VREF
2.75 V
CH
20 kΩ
IR
4.75 V
4.75 V
Note: Adjust RREF in the range 40 to 200 kΩ so that IR is 12 to 50 µA.
■ DIAGRAM
VIH
A0 to A2 Input
VIL
tSL
VIH
RAMP START Input
tA
VIL
tO
VIN + VBE1
IR
Slope = –
CH
CH Voltage
VBE2
0V
VOH
RAMP STOP Output
tR
tC
■ CHANNEL SELECTION
Input address line
8
A2
A1
A0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Selected analog input
GND
I1
I2
I3
I4
I5
I6
VREF
VOL
MB4053
■ TYPICAL CHARACTERISTICS
PEAK LINEARITY ERROR vs
AMBIENT TEMPERATURE Ta
LINEARITY ERROR vs INPUT VOLTAGE
IR = 12 µA
Peak Linearity Error [% of FSR]
0.16
VCC = 8 V
VREF = 5 V
CH = 1000 pF
Ta = 25°C
0.12
25 µA
0.08
50 µA
0.04
0
0
1
2
3
Input Voltage VIA [V]
4
5
VCC = 8 V
VREF = 5 V
IR = 12 µA
CH = 1000 pF
0.18
0.16
0.14
0.12
-50
0
50
100
Ambient Temperature Ta [°C]
SUPPLY CURRENT vs
AMBIENT TEMPERATURE
8
Power Supply Current, ICC [mA]
Linearity Error [% of FSR]
0.20
VCC = 8 V
VREF = 5 V
IR = 50 µA
6
4
2
0
-50
0
50
Ambient Temperature Ta [°C]
100
9
MB4053
■ OPERATION DESCRIPTION
Refer to BLOCK DIAGRAM, and DIAGRAM. Address inputs A0 to A2 are used to select the analog input to be
converted, (one of the six analog inputs I1 to I6). The RAMP START input is switched from a logic 1 to a logic
zero. This causes the external ramp capacitor CH to charge at a fixed rate. (Note 1) until it reaches the sum of
the selected analog input voltage and a constant offset voltage VBE1. The RAMP STOP output (open-collector
switches from a logic 0 to logic 1 when the voltage on CH reaches the comparator reference voltage VBE2. The
RAMP START input is switched back to a logic 1 after CH is completely charged. This disconnects the analog
input from CH and allows it to be gin discharging at a fixed rate (Note 2). When the voltage on CH reaches the
comparator reference voltage VBE2 the RAMP STOP output switches back to a logic 0. This completes a
conversion cycle for 1 channel.
The time between the RAMP START input switching (0→1) and RAMP STOP output switching (1→0) is the
RAMP TIME tR. This would be directly proportional to the analog input voltage for the ideal situation where there
was no comparator switching level error, leakage, switching delay times or effect of the impedance of the internal
reference current source. tR can be calculated for the ideal case as follows:
tR = VIN ×
CH
IR
Where: VIN = Analog input voltage to be measured
CH = External ramp capacitor
IR =
VCC - VREF
RREF
This ramp time is converted to a digital representation by counting tR with the microprocessor. If a small error
can be tolerated, the A/D conversion software can be reduced and the conversion time minimized by omitting
corrections.
Notes:
∗1 Charge slope =
I A – IR
CH
≥
150 µA – IR
CH
Where: IA is the acquisition current whose value is determined from the circuit constant in the IC.
∗2 Discharge slope = – IR
CH
10
MB4053
■ ZERO OFFSET AND FULL-SCALE FACTOR CORRECTIONS
High precision conversions can be achieved by correcting for zero offset and full scale factor as follows:
The channel select address (A0 to A2) is set to 000. Ground (GND) is selected (internally) as the analog input
and converted. This results in ramp time tR. Next the address is set to 111. VREF is selected (internally) and
converted. This results in ramp time, tREF. Finally the desired analog input (one of I1 to I6) is selected and converted.
This results in ramp time tX. This conversion sequence is arbitrary and the GND and VREF conversions are not
needed each time a channel is converted but only as required for calibration. The relationships between the
inputs and ramp times are shown below.
(VBE1)C = tZ
(VREF + VBE1)C = tREF
(VIN + VBE1)C = tX
(VREF)C = tREF – tZ
(VIN)C = tX – tZ
(VIN)C
= tX – tZ
(VREF)C
tREF – tZ
VCH
VREF + VBE1
VIN + VBE1
VBE1
VBE2
tR
tZ
tX
tREF
The conversion error can then be minimized by using the above results in the expression below to calculate the
corrected analog input voltage.
(VIN)C = (VREF)C ×
tX – tZ
tREF – tZ
Where: VIN = Analog input voltage to be measured
VREF = Reference voltage
VBE1 = Shift voltage in sample/ramp amplifer
VBE2 = Threshold voltage of comparator
VCH = CH voltage
The GND and VREF conversion sequence is arbitary, the GND and VREF conversions not being needed each time
a channel (I1 to I6) is converted.
11
MB4053
■ APPLICATION EXAMPLES
Examples of analog voltage (0 to 5 V) A/D conversion with 10-bit resolution are shown in “PEAK LINEARITY
ERROR vs AMBIENT TEMPERATURE Ta” and “SUPPLY CURRENT vs AMBIENT TEMPERATURE”.
VCC = 8 V
5V
RB
20 kΩ
VCC
To other
Sensor
Temperature
Sensor
RX
R1
3 kΩ
I1
RAMP
START
I2
RAMP
STOP
I3
A2
I4
MB4053
A0
I6
CH
GND
Ramp Current: IR =
Input Voltage: = VIN
R2
R1 + R2
VCC ............ 7-1
R1
⋅ 1
VCC ......... 7-2
R1 + R2
RREF
RX
=
⋅ VCC ................ 7-3
RX + RB
Ramp Time: tR .=. VIN ⋅ CH
IR
R2
RX
=
⋅ (1 +
) ⋅ CH ⋅ RREF ................. 7-4
R1
RX + RB
5 kΩ
VREF =
×8V=5V
3 kΩ + 5 kΩ
VCC - VREF
8V-5V
=
= 25 µA
RREF
120 kΩ
5000 pF × (5 V + 0.7 V)
CH × VREF
tSL ≥
=
= 228 µs
150 µA - 25 µA
IA(min) - IR
.
5000 pF × 5 V = 1000 µs
CH × VREF
tRmax =.
=
25 µA
IR
IR =
If the ramp time is counted with a 1 MHz clock, the following
resolution is obtained.
1000 µs
.
= 1000 =. 210
1 µs
12
IR
RREF
VREF
Reference Voltage: VREF =
A1
I5
R2
5 kΩ
Control input/output from
MPU
RREF
120 kΩ
CH = 5000 pF
As shown in this example, the voltage output of the sensor is
proportional to VCC (Eq. 7-3) and VREF is also proportional to VCC
(Eq. 7-1), the sensor output conversion results (Eq. 7-4) are not
influenced by power supply voltage fluctuation. Such a conversion
is called ratio metric conversion and is effective for minimizing the
effects of conversion error. Supply voltage fluctuations during
discharge do result in error, however.
MB4053
■ USAGE PRECAUTIONS
1. Shince the impedance of the ramp capacitor pin is approximately 30 MΩ (high), a resistance must not be connected in paralleled with this input. A ramp capacitor with no leakage must be used.
2. At VIN = 0 V, tR has a finite value.
3. Since RAMP STOP is an open collector output, an external pull-up resistor is required. (For example, when a
20 kΩ external pull-up resistor is used.)
4. All digital inputs/output are TTL compatible.
5. The time from RAMP START input switching (0 →1) to RAMP STOP output switching (1 → 0) is ramp time tR.
6. tSL ≥ tA (max) =
CH
150 µA –1R
× (VREF + 0.7 V)
7. tR .=.
CH × VIN, tR (max) . CH × VREF
=.
IR
1R
8. IR =
VCC – VREF
RREF
9. 2 V ≤ VREF ≤ (VCC – 2 V) and VREF ≤ 5.25 V
10.While and analog input voltage is being sampled, channel selection signals A0, A1, and A2 must not be
changed for (tSL).
11.When IR is little, Linearity Error extends. However, Linearity Error is ±0.2 [% of FSR] or less in IR (min) = 12 µA.
13
MB4053
■ ORDERING INFORMATION
Part number
14
Package
MB4053M
16-pin Plastic DIP
(DIP-16P-M04)
MB4053PF
16-pin Plastic SOP
(FPT-16P-M06)
Remarks
MB4053
■ PACKAGE DIMENSIONS
16-pin Plastic DIP
(DIP-16P-M04)
+0.20
19.55 –0.30
.770
+.008
–.012
INDEX-1
6.20±0.25
(.244±.010)
INDEX-2
0.51(.020)MIN
4.36(.172)MAX
0.25±0.05
(.010±.002)
3.00(.118)MIN
0.46±0.08
(.018±.003)
+0.30
0.99 –0
.039
+.012
–0
1.27(.050)
MAX
C
1994 FUJITSU LIMITED D16033S-2C-3
+0.30
1.52 –0
+.012
–0
.060
2.54(.100)
TYP
7.62(.300)
TYP
15°MAX
Dimensions in mm (inches)
(Continued)
15
MB4053
(Continued)
16-pin Plastic SOP
(FPT-16P-M06)
2.25(.089)MAX
+0.25
+.010
10.15 –0.20 .400 –.008
INDEX
0.05(.002)MIN
(STAND OFF)
5.30±0.30
(.209±.012)
+0.40
6.80 –0.20
+.016
.268 –.008
7.80±0.40
(.307±.016)
"B"
1.27(.050)
TYP
0.45±0.10
(.018±.004)
+0.05
Ø0.13(.005)
0.15 –0.02
+.002
.006 –.001
M
Details of "A" part
Details of "B" part
0.40(.016)
0.10(.004)
8.89(.350)REF
16
0.15(.006)
0.20(.008)
"A"
C
0.50±0.20
(.020±.008)
1994 FUJITSU LIMITED F16015S-2C-4
0.20(.008)
0.18(.007)MAX
0.18(.007)MAX
0.68(.027)MAX
0.68(.027)MAX
Dimensions in
in mm
mm (inches)
(inches)
Dimensions
MB4053
FUJITSU LIMITED
For further information please contact:
Japan
FUJITSU LIMITED
Corporate Global Business Support Division
Electronic Devices
KAWASAKI PLANT, 4-1-1, Kamikodanaka
Nakahara-ku, Kawasaki-shi
Kanagawa 211-8588, Japan
Tel: (044) 754-3763
Fax: (044) 754-3329
http://www.fujitsu.co.jp/
North and South America
FUJITSU MICROELECTRONICS, INC.
Semiconductor Division
3545 North First Street
San Jose, CA 95134-1804, USA
Tel: (408) 922-9000
Fax: (408) 922-9179
Customer Response Center
Mon. - Fri.: 7 am - 5 pm (PST)
Tel: (800) 866-8608
Fax: (408) 922-9179
http://www.fujitsumicro.com/
Europe
FUJITSU MIKROELEKTRONIK GmbH
Am Siebenstein 6-10
D-63303 Dreieich-Buchschlag
Germany
Tel: (06103) 690-0
Fax: (06103) 690-122
http://www.fujitsu-ede.com/
Asia Pacific
FUJITSU MICROELECTRONICS ASIA PTE LTD
#05-08, 151 Lorong Chuan
New Tech Park
Singapore 556741
Tel: (65) 281-0770
Fax: (65) 281-0220
http://www.fmap.com.sg/
F9803
 FUJITSU LIMITED Printed in Japan
20
All Rights Reserved.
The contents of this document are subject to change without
notice. Customers are advised to consult with FUJITSU sales
representatives before ordering.
The information and circuit diagrams in this document presented
as examples of semiconductor device applications, and are not
intended to be incorporated in devices for actual use. Also,
FUJITSU is unable to assume responsibility for infringement of
any patent rights or other rights of third parties arising from the
use of this information or circuit diagrams.
FUJITSU semiconductor devices are intended for use in
standard applications (computers, office automation and other
office equipment, industrial, communications, and measurement
equipment, personal or household devices, etc.).
CAUTION:
Customers considering the use of our products in special
applications where failure or abnormal operation may directly
affect human lives or cause physical injury or property damage,
or where extremely high levels of reliability are demanded (such
as aerospace systems, atomic energy controls, sea floor
repeaters, vehicle operating controls, medical devices for life
support, etc.) are requested to consult with FUJITSU sales
representatives before such use. The company will not be
responsible for damages arising from such use without prior
approval.
Any semiconductor devices have inherently a certain rate of
failure. You must protect against injury, damage or loss from
such failures by incorporating safety design measures into your
facility and equipment such as redundancy, fire protection, and
prevention of over-current levels and other abnormal operating
conditions.
If any products described in this document represent goods or
technologies subject to certain restrictions on export under the
Foreign Exchange and Foreign Trade Control Law of Japan, the
prior authorization by Japanese government should be required
for export of those products from Japan.