EMIF02-MIC02F2 2-line IPAD™, EMI filter and ESD protection Features ■ EMI symmetrical (I/O) low-pass filter ■ High efficiency in EMI filtering ■ Lead free package ■ Very low PCB space consuming: 1.42 mm x 0.92 mm ■ Very thin package: 0.65 mm ■ High efficiency in ESD suppression ■ High reliability offered by monolithic integration ■ High reducing of parasitic elements through integration and wafer level packaging Flip Chip (6 bumps) Figure 1. Complies with the following standards ■ ■ IEC 61000-4-2 level 4 on input pins – 15 kV (air discharge) – 8 kV (contact discharge) IEC 61000-4-2 level 1 on input pins – 2 kV (air discharge) – 2 kV (contact discharge) Figure 2. Applications Mobile phones and communication systems ■ Computers, printers and MCU Boards 3 2 1 I2 GND I1 A O2 GND O1 B Basic cell configuration Low-pass Filter Input Where EMI filtering in ESD sensitive equipment is required: ■ Pin configuration (bump side) Output Ri/o = 470 W Cline = 16 pF GND GND GND Description The EMIF02-MIC02 is a highly integrated devices designed to suppress EMI/RFI noise in all systems subjected to electromagnetic interferences. The EMIF02 Flip Chip packaging means the package size is equal to the die size. This filter includes an ESD protection circuitry which prevents the device from destruction when subjected to ESD surges up 15 kV. April 2008 TM: IPAD is a trademark of STMicroelectronics. Rev 3 1/8 www.st.com 8 Electrical characteristics 1 EMIF02-MIC02F2 Electrical characteristics Table 1. Absolute ratings (Tamb = 25 °C) Symbol Tj Parameter Unit 125 °C junction temperature Top Operating temperature range -40 to +85 °C Tstg Storage temperature range -55 to 150 °C Table 2. Electrical characteristics (Tamb = 25 °C) Symbol Parameters VBR Breakdown voltage IRM Leakage current @ VRM VRM Stand-off voltage VCL Clamping voltage Rd Dynamic impedance IPP Peak pulse current RI/O Series resistance between input and output Cline Input capacitance per line Symbol Test conditions VBR IR = 1 mA IRM VRM = 12 V per line RI/O Cline 2/8 Value I IPP VCL VBR VRM IRM IR V VRM VBR VCL IPP Min Typ 14 16 423 @0V IR IRM Max Unit V 500 nA 470 517 Ω 40 45 pF EMIF02-MIC02F2 Figure 3. Electrical characteristics S21 (dB) attenuation measurement Figure 4. and Aplac simulation - 10.00 dB - 15.00 Analog crosstalk measurements -20.00 dB --30.00 - 20.00 Measurement I2/O1 --40.00 - 25.00 - 30.00 --50.00 - 35.00 --60.00 - 40.00 --70.00 - 45.00 Simulation - 50.00 1.0M 3.0M 10.0M 30.0M 100.0M 300.0M f/Hz 1.0G --80.00 1.0M 3.0G 3.0M 10.0M 30.0M 100.0M f/Hz 300.0M 1.0G 3.0G Figure 5. Digital crosstalk measurement Figure 6. ESD response to IEC61000-4-2 (-15 kV air discharge) on one input V(in) and on one output (Vout) Figure 7. ESD response to IEC61000-4-2 (+15 kV air discharge) on one input V(in) and on one output (Vout) Figure 8. Line capacitance versus applied voltage C(pF) 20 F=1MHz Vosc=30mVRMS Tj=25°C 18 16 14 12 10 8 6 4 2 VR(V) 0 0 1 2 3 4 5 6 7 8 9 10 11 12 3/8 Application information 2 EMIF02-MIC02F2 Application information Figure 9. I1 Cox Aplac model gnd O1 R_470R MODEL = D01-int Cox 50pH MODEL = D01-ext Rsubump Rsubump 50pH 50m 50m MODEL = D01-gnd gnd Rsubump Rsubump Lgnd Cgnd MODEL = D01-ext Cox MODEL = D01-int Cox I2 Lgnd Cgnd Rgnd Rgnd O2 R_470R Figure 10. Aplac parameters Model D01-ext BV = 7 CJO = Cz_ext IBV = 1u IKF = 1000 IS = 10f ISR = 100p N=1 M = 0.3333 RS = Rs_ext VJ = 0.6 TT = 50n Model D01-int BV = 7 CJO = Cz_int IBV = 1u IKF = 1000 IS = 10f ISR = 100p N=1 M = 0.3333 RS = Rs_int VJ = 0.6 TT = 50n Model D01-gnd BV = 7 CJO = Cz_gnd IBV = 1u IKF = 1000 IS = 10f ISR = 100p N=1 M = 0.3333 RS = Rs_gnd VJ = 0.6 TT = 50n Ls 400pH Rs 100m R_470R 482.6 Cz_ext 8.73pF Rs_ext 850m Cz_int 2.9pF Rs_int 850m Cz_gnd 215.61pF Rs_gnd 470m Rgnd 10m Lgnd 48pH Cgnd 0.15pF Cox 3.05pF Rsubump 200m 4/8 EMIF02-MIC02F2 3 Ordering information scheme Ordering information scheme Figure 11. Ordering information scheme EMIF yy - xxx zz Fx EMI Filter Number of lines Information x = resistance value (Ohms) z = capacitance value / 10 pF or 3 letters = application 2 digits = version Package F = Flip Chip x = 2: Lead-free, pitch = 500 µm, bump = 315 µm Package information In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at www.st.com. Figure 12. Package dimensions 500 µm ± 50 315 µm ± 50 650µm ± 65 1.42 mm ± 50 µm 500 µm ± 50 210 µm 0.92 mm ± 50µm 210 µm 4 5/8 Ordering information EMIF02-MIC02F2 Figure 13. Footprint Figure 14. Marking Dot, ST logo xx = marking z = manufacturing location yww = datecode (y = year ww = week) Copper pad Diameter: 250 µm recommended, 300 µm max Solder stencil opening: 330 µm E x x z y ww Solder mask opening recommendation: 340 µm min for 300 µm copper pad diameter Figure 15. Flip Chip tape and reel specification Dot identifying Pin A1 location 3.5 ± 0.1 1.02 ST E xxz yww 6/8 1.47 User direction of unreeling Ordering information Table 3. Note: xxz yww 4 ± 0.1 All dimensions in mm 5 ST E ST E xxz yww 8 ± 0.3 0.73 ± 0.05 1.75 ± 0.1 Ø 1.5 ± 0.1 4 ± 0.1 Ordering information Order code Marking Package Weight Base qty Delivery mode EMIF02-MIC02F2 FJ Flip Chip 2.3 mg 5000 Tape and reel 7” More information is available in the application notes: AN1235:"Flip Chip: Package description and recommendations for use" AN1751: “EMI filters: Recommendations and measurements” EMIF02-MIC02F2 6 Revision history Revision history Table 4. Document revision history Date Revision Changes 12-Oct-2004 1 Initial release. 11-Jan-2006 2 ECOPACK statement added. Die dimensions modified in Figure 12. and first page. Typographical errors corrected. 17-Apr-2008 3 Updated ECOPACK statement. Updated Figure 11, Figure 12 and Figure 15. Reformatted to current standards. 7/8 EMIF02-MIC02F2 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. 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