EMIF06-AUD01F2 6-line EMI filter and ESD protection for audio interface Features ■ 4-line EMI filter and ESD protection for internal and external (headset) microphone ■ 2-line EMI filter and ESD protection for headset speaker Benefits ■ EMI (I/O) low-pass filter ■ High efficiency EMI filter ■ Very low PCB space consumption: 4.6 mm2 ■ Very thin package: 0.65 mm ■ High efficiency in ESD suppression ■ High reliability offered by monolithic integration ■ High reduction of parasitic elements through integration and wafer level packaging Complies with following standards ■ IEC 61000-4-2 level 4 external pins – 15 kV (air discharge) – 8 kV (contact discharge) ■ IEC 61000-4-2 level 1 internal pins – 2 kV (air discharge) – 2 kV (contact discharge) Flip chip package, 20 bumps Description The EMIF06-AUD01F2 is a highly integrated device designed to suppress EMI/RFI noise in all systems subjected to electromagnetic interference. The flip chip packaging means the package size is equal to the die size. This filter includes ESD protection circuitry, which prevents damage to the application when it is subjected to ESD surges up to 15 kV. Figure 1. Pin configuration Applications ESD protection and EMI/RFI filtering for the audio bottom connector interface, where EMI filtering in ESD sensitive equipment is required: ■ Mobile phones and communication systems ■ Wireless modules 1 2 3 4 5 A MIC1P MIC2N MIC2P SPK_R SPK_L B MIC1N BIAS1 GND Int HOOK GND C GND MIC1P int MIC2N int BIAS2 SPK_L int D MIC1N int BIAS3 MIC2P int SPK_R int PHG Silicon side February 2008 Rev 1 1/14 www.st.com Characteristics EMIF06-AUD01F2 1 Characteristics Figure 2. Circuit schematic R1 HOOK BIAS2 R2 R3 MIC2_P-ext MIC2_P-int C1 MIC2_N-ext R4 C2 MIC2_N-int GND-int GND-ext R6 C3 R7 MIC1_P-ext BIAS1 MIC1_P-int C4 MIC1_N-ext MIC1_N-int R8 R9 BIAS3 R10 SPK_R-ext C5 SPK_R-int R12 PHG (Phantom Ground) R13 SPK_L-int SPK_L-ext R11 C6 GND-ext C1 to C4 = 1.3 nF typical Table 1. Absolute ratings (limiting values) Symbol Vpp Parameter Test conditions Min Max Unit 15 15 2 2 kV IEC61000-4-2 air discharge on external lines IEC61000-4-2 contact discharge on external lines IEC61000-4-2 air discharge on internal lines IEC61000-4-2 contact discharge on internal lines PSPK Continuous power dissipation per channel SPK_L, SPK_R Tamb = 85 °C 180 mW ISPK Continuous current per channel SPK_L, SPK_R Tamb = 85 °C 135 mA Ptotal Total continuous power dissipation Tamb = 85 °C 285 mW Top Operating temperature range -40 +85 °C Tstg Storage temperature range -40 +125 °C +125 °C Tj Table 2. Junction temperature Electrical characteristics - definitions (Tamb = 25 °C) Symbol Parameters VBR Breakdown voltage IRM Leakage current @ VRM VRM Stand-off voltage VCL Clamping voltage Rd Dynamic impedance IPP Peak pulse current Cline 2/14 Input capacitance per line I IPP VCL VBR VRM IR IRM IRM IR IPP VRM VBR VCL V EMIF06-AUD01F2 Table 3. Characteristics Electrical characteristics - values (Tamb = -40 °C to + 85 °C unless otherwise specified) Symbol Parameter Test conditions VBR Diode reverse breakdown voltage IR = 1 mA Tamb = 25 °C IRM Leakage current through clamping diodes VR = 3 V DC per line Tamb = 25 °C C1-C4(1) Capacitance on MIC lines C5-C6(1) Channel Capacitance SPK_L, SPK_R V = 0 V, F = 1 MHz, VOSC = 30 mV Tamb = 25 °C Min Typ Max 14.0 Unit V 0.5 µA 1.3 nF 60 pF R1(2) Hook Pull up resistance 47 kΩ R2(2) External Microphone Pull up resistance 2.2 kΩ 100 Ω Internal Microphone Pull up and Pull down resistance 1 kΩ SPK Serial Resistance 10 Ω 15 kΩ R3,R4, R7, R8(2) Microphone Serial Resistance R6, R9(2) R10, R11(3) R12, R13(2) SPK PHG Resistance (4) MICx channel THD Distortion Vdc = 0 - 2.4 V, F = 20 Hz - 20 kHz, Rgen = 600 Ω, Vout = 1.5 VPP Rload = 200 kΩ, Tamb = 25 °C Balanced (or differential mode) -75 dB(A) 1. Capacitor tolerance ±30% 2. Resistor tolerances ±10% 3. Resistor tolerances ±20% 4. See Figure 20 and Figure 21 3/14 Characteristics 1.1 EMIF06-AUD01F2 RF filtering The low signal level on the analog inputs and the pulsed transmitter in the phone are a combination that requires efficient RF-filtering. RF-rectification must be avoided. Therefore, the stop band attenuation is optimized for the frequency bands 800-2480 MHz. Table 4. Stop band performance 800 - 2480 MHz Attenuation Channel Test conditions Min Typ Max Unit MIC1_x to MIC1_x-int Rsource = 50 Ω, Rload = 1 kΩ 25 dB MIC2_x to MIC2_x-int Rsource = 50 Ω, Rload = 1 kΩ 25 dB MIC1_P to BIAS1 Rsource = 50 Ω, Rload = 1 kΩ 25 dB MIC2_P to BIAS2 Rsource = 50 Ω, Rload = 1 kΩ 25 dB SPK_x to SPK_x-int Rsource = 50 Ω, Rload = 1 kΩ 25 dB Table 5. Stop band performance 10 - 800 MHz Attenuation Channel Test conditions Min Max Unit MIC1_x to MIC1_x-int Rsource = 50 Ω, Rload = 1 kΩ 20 dB MIC2_x to MIC2_x-int Rsource = 50 Ω, Rload = 1 kΩ 20 dB MIC1_P to BIAS1 Rsource = 50 Ω, Rload = 1 kΩ 20 dB MIC2_P to BIAS2 Rsource = 50 Ω, Rload = 1 kΩ 20 dB 1.2 Attenuation characteristics Figure 3. S21 attenuation measurement MIC1_P and MIC1_N lines (50 Ω / 50 Ω) Figure 4. S21 attenuation measurement MIC1_P and MIC1_N lines (50 Ω / 1 KΩ simulation) 0 0.00 dB dB -10.00 -10 -20.00 -20 -30.00 -30 -40.00 -40 -50.00 -50 F/Hz F/Hz -60.00 -60 100.0k MIC1_P line 4/14 Typ 1.0M 10.0M MIC1_N line 100.0M 1.0G Rsource = 50 Ω / Rload = 50 Ω 100k 1M MIC1_P line 10M MIC1_N line 100M 1G Rsource = 50 Ω / Rload = 1 KΩ EMIF06-AUD01F2 Figure 5. Characteristics S21 attenuation measurement MIC2_P and MIC2_N lines (50 Ω / 50 Ω) 0.00 Figure 6. S21 attenuation measurement MIC2_P and MIC2_N lines (50 Ω / 1 KΩ simulation) 0 dB dB -10.00 - 10 -20.00 - 20 -30.00 - 30 -40.00 - 40 -50.00 - 50 F/Hz F/Hz -60.00 - 60 100.0k 1.0M 100.0M 1.0G 100k Rsource = 50 Ω / Rload = 50 Ω MIC2_N line MIC2_P line Figure 7. 10.0M S21 attenuation measurement SPK_L and SPK_R lines (50 Ω / 50 Ω) 0.00 1M 10M MIC2_P line Figure 8. 100M 1G Rsource = 50 Ω / Rload = 1 KΩ MIC2_N line S21 attenuation measurement SPK_L and SPK_R lines (50 Ω / 1 KΩ simulation) 0.00 dB dB - 10.00 - 10.00 - 20.00 - 20.00 - 30.00 - 30.00 - 40.00 - 40.00 - 50.00 - 50.00 F/Hz F/Hz - 60.00 - 60.00 300.0k 1.0M 3.0M 10.0M 30.0M f/Hz 300.0M 1.0G 3.0G 300.0k SPK_L line SPK_R line Figure 9. 100.0M S21 attenuation measurement MIC1_P and BIAS1 lines (50 Ω / 50 Ω) 0.00 1.0M 3.0M SPK_R line Sim 10.0M 100.0M 300.0M SPK_L line 1.0G 3.0G Sim Figure 10. S21 attenuation measurement MIC1_P and BIAS1 lines (50 Ω / 1 KΩ simulation) 0.00 dB dB - 10.00 - 10.00 - 20.00 - 20.00 - 30.00 - 30.00 - 40.00 - 40.00 - 50.00 - 50.00 - 60.00 - 60.00 F/Hz F/Hz - 70.00 100.0k 30.0M f/Hz - 70.00 1.0M Mic1P/BIAS1 50 10.0M 100.0M 1.0G Rsource = 50 Ω / Rload = 50 Ω 100.0k 1.0M Mic1P/BIAS1 1k 10.0M 100.0M 1.0G Rsource = 50 Ω / Rload = 1 kΩ 5/14 Characteristics EMIF06-AUD01F2 Figure 11. S21 attenuation measurement MIC2_P and BIAS2 lines (50 Ω / 50 Ω) Figure 12. S21 attenuation measurement MIC2_P and BIAS2 lines (50 Ω / 1 KΩ simulation) 0.00 0.00 dB dB - 10.00 - 10.00 - 20.00 - 20.00 - 30.00 - 30.00 - 40.00 - 40.00 - 50.00 - 50.00 F/Hz F/Hz - 60.00 100.0k - 60.00 1.0M Mic2P/BIAS2 50 1.3 10.0M 100.0M 1.0G 100.0k Rsource = 50 Ω / Rload = 50 Ω 1.0M Mic2P/BIAS2 1k 10.0M 100.0M 1.0G Rsource = 50 Ω / Rload = 1 kΩ ESD characteristics Figure 13. ESD response to IEC 61000-4-2 (+15 kV air discharge) on input Vin and output Vout Mic1 line Figure 14. ESD response to IEC 61000-4-2 (-15 kV air discharge) on input Vin and output Vout Mic1 line vi = 20 V/d vi = 20 V/d vo = 5 V/d 100 ns/d Figure 15. ESD response to IEC 61000-4-2 (+15 kV air discharge) on input Vin and output Vout Mic2 line vo = 5 V/d 100 ns/d Figure 16. ESD response to IEC 61000-4-2 (-15 kV air discharge) on input Vin and output Vout Mic2 line vi = 20 V/d vi = 20 V/d vo = 5 V/d 100 ns/d 6/14 vo = 5 V/d 100 ns/d EMIF06-AUD01F2 1.4 Characteristics Filter characteristics Figure 17. Analog crosstalk MIC2_P and MIC1_N lines (50 Ω / 50 Ω) Figure 18. Analog crosstalk SPK_R and MIC2_N lines (50 Ω / 50 Ω) 0.00 0.00 dB -10.00 dB -10.00 -20.00 -20.00 -30.00 -30.00 -40.00 -40.00 -50.00 -50.00 -60.00 -60.00 -70.00 -70.00 -80.00 -80.00 -90.00 -90.00 F/Hz F/Hz -100.00 -100.00 100.0k 1.0M 10.0M 100.0M 1.0G 100.0k MIC2_N/MIC1_P 1.5 -50 10.0M 100.0M 1.0G SPK_R/MIC2_N Total harmonic distortion characteristics Figure 19. Total harmonic distortion and noise Figure 20. with only cables and environmental circuit versus frequency, VBIAS = 0 V 0 1.0M THD+N (dB) -108.517 0 VGEN: 1.5 Vp-p 20 Hz < F < 20 kHz RGEN: 600 Ω RLOAD: 200 kΩ A-Weighting filter Bandwidth: 40 kHz TAMB = 25 °C -50 -100 Variation of total harmonic distortion and noise in microphone lines versus frequency, balanced (or differential) mode, VBIAS = 0 V -80.449 THD+N (dB) VGEN: 1.5 Vp-p VMAX = 0 V 20 Hz < F < 20 kHz RGEN: 600 Ω RLOAD: 200 kΩ A-Weighting filter Bandwidth: 40 kHz TAMB = 25 °C -100 F (Hz) 100 1k 5.3357 k 10 k F (Hz) 100 1k 3.4951 k 10 k 7/14 Characteristics EMIF06-AUD01F2 Figure 22. Figure 21. Variation of total harmonic distortion and noise in microphone lines versus frequency, balanced (or differential) mode, VBIAS = 2.4 V 0 -50 -76.593 THD+N (dB) 0 VGEN: 1.5 Vp-p VMAX = 2.4 V 20 Hz < F < 20 kHz RGEN: 600 Ω RLOAD: 200 kΩ A-Weighting filter Bandwidth: 40 kHz TAMB = 25 °C -61.510 THD+N (dB) -65.688 VGEN: 1.5 Vp-p 20 Hz < F < 20 kHz RGEN: 600 Ω RLOAD: 100 kΩ A-Weighting filter Bandwidth: 40 kHz TAMB = 25 °C -50 -100 Variation of total harmonic distortion and noise in microphone lines versus frequency, unbalanced (or single-ended) mode -100 F (Hz) 100 1k 5.3357 k F (Hz) 10 k 100 1k 3.9933 k 10 k Figure 23. Test setup for measurement of distortion on MIC channels UPV Rohde & Schwarz audio analyzer XLR connectors MIC1N MIC1Nint EMIF06-AUD01F2 MIC1P MIC1Pint Figure 24. Internal UPV setup schematic 300 Ω MIC1N 1.5 V PP To balanced Input amplifier MIC1Nint 120 pF 120 pF 100 kΩ k EMIF06-AUD01F2 1.5 V PP 120 pF 120 pF MIC1P 300 Ω 8/14 MIC1Pint 100 kΩ k To balanced Input amplifier EMIF06-AUD01F2 2 Application schematics Application schematics Figure 25. Basic configuration scheme HOOK BIAS2 R1 R2 R3 MIC2_P MIC2_P-int C1 MIC2_N MIC2_N-int R4 C2 GND-int GND R6 BIAS1 R7 MIC1_P MIC1_N C3 MIC1_P-int C4 MIC1_N-int R8 BIAS3 R9 SPK_R SPK_R-int R10 C5 + R12 PHG (Phantom Ground) R13 SPK_L-int SPK_L + R11 C6 GND Figure 26. Stereo line in HOOK BIAS2 R1 R2 R3 MIC2_P MIC2_P-int C1 MIC2_N R4 MIC2_N-int C2 GND-int GND R6 BIAS1 R7 MIC1_P MIC1_N C3 MIC1_P-int C4 MIC1_N-int R8 BIAS3 R9 SPK_R SPK_R-int R10 C5 + R12 PHG (Phantom Ground) R13 SPK_L-int SPK_L + R11 C6 GND 9/14 Application schematics EMIF06-AUD01F2 Figure 27. Stereo microphone / line in HOOK BIAS2 R1 R2 R3 MIC2_P MIC2_P-int C1 MIC2_N R4 MIC2_N-int C2 GND-int GND R6 BIAS1 R7 MIC1_P MIC1_N C3 MIC1_P-int C4 MIC1_N-int R8 BIAS3 R9 SPK_R SPK_R-int R10 C5 + R12 PHG (Phantom Ground) R13 SPK_L-int SPK_L + R11 C6 GND Figure 28. External balanced microphone / stereo line in HOOK BIAS2 R1 R2 R3 MIC2_P MIC2_P-int C1 MIC2_N R4 MIC2_N-int C2 GND-int GND R6 BIAS1 R7 MIC1_P MIC1_N C3 MIC1_P-int C4 MIC1_N-int R8 BIAS3 R9 SPK_R SPK_R-int R10 C5 + R12 PHG (Phantom Ground) R13 SPK_L-int SPK_L R11 C6 GND 10/14 + EMIF06-AUD01F2 3 Ordering information scheme Ordering information scheme Figure 29. Ordering information scheme EMIF yy - xxx zz Fx EMI Filter Number of lines Information 3 letters = application 2 digits = version Package F = Flip-Chip x = 2: Lead free, pitch = 500 µm, bump = 315 µm Package information In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at www.st.com. Figure 30. Flip chip dimensions 500 µm ± 50 650 µm ± 65 315 µm ± 50 1.92 mm ± 50 µm 500 µm ± 50 4 2.42 mm ± 50 µm 11/14 Package information EMIF06-AUD01F2 Figure 31. Marking Dot, ST logo xx = marking z = manufacturing location yww = datecode (y = year ww = week) Figure 32. Footprint recommendation Copper pad Diameter: 250µm recommended, 300 µm max E x x z y ww Solder stencil opening: 330 µm Solder mask opening recommendation: 340 µm min for 315 µm copper pad diameter Figure 33. Flip chip tape and reel specification Dot identifying Pin A1 location Ø 1.55 ± 0.05 4.0 ± 0.1 3.5 ±- 0.05 2.10 STE xxz yww 2.56 STE xxz yww Note: STE All dimensions in mm xxz yww 8 ± 0.3 0.73 ± 0.05 4 ± 0.1 User direction of unreeling More packing information is available in the application notes: AN1235: “Flip chip: Package description and recommendations for use” AN1751: "EMI Filters: Recommendations and measurements" 12/14 1.75 ± 0.1 2.0 ± 0.05 EMIF06-AUD01F2 5 Ordering information Ordering information Table 6. 6 Ordering information Ordering code Marking Package Weight Base qty Delivery mode EMIF06-AUD01F2 HP Flip chip 6.45 mg 5000 7” Tape and reel Revision history Table 7. Document revision history Date Revision 18-Feb-2008 1 Changes First issue 13/14 EMIF06-AUD01F2 Please Read Carefully: Information in this document is provided solely in connection with ST products. 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