STMICROELECTRONICS ESDA6V1B1

ESDA6V1B1
®
TRANSIL ARRAY
FOR ESD PROTECTION
Application Specific Discretes
A.S.D.
MAIN APPLICATIONS
Where transient overvoltage protection in ESD
sensitive equipment is required, such as :
- COMPUTER
- PRINTERS
- COMMUNICATION SYSTEMS
- GSM HANDSETS AND ACCESSORIES
- CAR RADIO
It is particularly recommended for parallel port
protection where the line interface withstands only
2kV ESD surge
SO8
FEATURES
6 BIDIRECTIONAL TRANSIL FUNCTIONS
LOW LEAKAGE CURRENT : IR MAX < 2 µA
200 W PEAK PULSE POWER (8/20 µs)
FUNCTIONAL DIAGRAM
DESCRIPTION
The ESDA6V1B1 is a monolithic voltage
suppressor designed to protect components which
are connected to data and transmission lines
against ESD.
It clamps the voltage just above the logic level
supply for positive and negative transients.
I/O 1
1
8
I/O 6
I/O 2
2
7
I/O 5
I/O 3
3
6
I/O 4
GND
4
5
GND
BENEFITS
High ESD protection level : up to 25 kV
High integration
Suitable for high density boards
COMPLIES WITH THE FOLLOWING STANDARDS :
IEC 1000-4-2 : level 4
MIL STD 883C-Method 3015-6 : class 3
(human body model)
November 1999 - Ed : 2B
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ESDA6V1B1
ABSOLUTE MAXIMUM RATINGS (Tamb = 25°C)
Symbol
Parameter
Value
Unit
VPP
Electrostatic discharge
MIL STD 883C - Method 3015-6
25
kV
PPP
Peak pulse power (8/20µs)
200
W
Tstg
Tj
Storage temperature range
Maximum junction temperature
- 55 to + 150
150
°C
°C
TL
Maximum lead temperature for soldering during 10s
260
°C
ELECTRICAL CHARACTERISTICS (Tamb = 25°C)
Symbol
Parameter
VRM
Stand-off voltage
VBR
Breakdown voltage
VCL
Clamping voltage
IRM
Leakage current
IPP
Peak pulse current
αT
Voltage temperature coefficient
C
Capacitance
Rd
Dynamic resistance
Types
VBR
min.
IR
@
max.
IRM
@
VRM
max.
note 1
ESDA6V1B1
αT
C
typ.
max.
typ.
note 2
note 3
0V bias
V
V
mA
µA
V
Ω
10-4/°C
pF
6.1
8
1
2
5
0.7
10
50
note 1 : Between two I/O pins or I/O pin and Groung
note 2 : Square pulse, Ipp = 25A, tp=2.5µs.
note 3 : ∆ VBR = αT* (Tamb -25°C) * VBR (25°C)
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Rd
ESDA6V1B1
CALCULATION OF THE CLAMPING VOLTAGE
USE OF THE DYNAMIC RESISTANCE
The ESDA family has been designed to clamp fast
spikes like ESD. Generally the PCB designers
need to calculate easily the clamping voltage VCL.
This is why we give the dynamic resistance in
addition to the classical parameters. The voltage
across the protection cell can be calculated with
the following formula:
VCL = VBR + Rd IPP
As the value of the dynamic resistance remains
stable for a surge duration lower than 20µs, the
2.5µs rectangular surge is well adapted. In addition
both rise and fall times are optimized to avoid any
parasitic phenomenon during the measurement of
Rd.
Where Ipp is the peak current through the ESDA cell.
DYNAMIC RESISTANCE MEASUREMENT
The short duration of the ESD has led us to prefer
a more adapted test wave, as below defined, to the
classical 8/20µs and 10/1000µs surges.
I
Ipp
2µs
t
tp = 2.5µs
2.5µs duration measurement wave.
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ESDA6V1B1
Fig. 1 : Peak power dissipation versus initial
junction temperature.
Fig. 2 : Peak pulse power versus exponential
pulse duration (Tj initial = 25 °C).
Ppp[Tj initial]/Ppp[Tj initial=25°C]
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
2000
Ppp(W)
1000
100
Tj initial(°C)
0
25
50
75
tp(µs)
100
125
150
175
Fig. 3 : Clamping voltage versus peak pulse
current (Tj initial = 25 °C).
Rectangular waveform tp = 2.5 µs.
10
1
10
100
Fig. 4 : Capacitance versus reverse applied
voltage (typical values).
C(pF)
Ipp(A)
50
50.0
F=1MHz
Vosc=30mV
tp=2.5µs
45
10.0
40
35
1.0
30
Vcl(V)
0.1
0
5
10
15
20
25
VR(V)
30
35
40
45
50
Fig. 5 : Relative variation of leakage current versus
junction temperature (typical values).
IR[Tj] / IR[Tj=25°C]
2.2
2.0
1.8
1.6
1.4
1.2
Tj(°C)
1.0
25
4/6
50
75
100
125
150
25
1
2
3
4
5
6
ESDA6V1B1
APPLICATION EXAMPLE: Protection of symmetrical signals.
A1
+/- 2.5 V
6.1V
+/- 2.5 V
A2
6.1V
+/- 2.5 V
A3
6.1V
+/- 2.5 V
A4
6.1V
+/ - 2.5 V
A5
6.1V
+/- 2.5 V
A6
6.1V
6.1V
ORDER CODE
ESDA 6V1 B 1 RL
PACKAGING:
RL = Tape and reel
= Tube
ESD ARRAY
VBR min
PACKAGE : SO8
Bidirectional
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ESDA6V1B1
PACKAGE MECHANICAL DATA
SO8 Plastic
DIMENSIONS
REF.
L
A
a3
A
a1
0.1
a2
e
b
a1
S
E
e3
D
M
8
5
F
1
b1
1.75
0.069
0.25 0.004
0.010
1.65
0.065
a3
0.65
0.85 0.025
0.033
b
0.35
0.48 0.014
0.019
b1
0.19
0.25 0.007
0.010
C
c1
0.25 0.50 0.50 0.010
45° (typ)
0.020
D
E
4.8
5.8
0.197
0.244
e
4
Inches
Min. Typ. Max. Min. Typ. Max.
c1
C
a2
Millimetres
5.0 0.189
6.2 0.228
1.27
e3
0.050
3.81
0.150
F
3.8
4.0
0.15
0.157
L
0.4
1.27 0.016
0.050
0.6
0.024
M
MARKING : Logo, Date Code, E6V1B1
Packaging : Preferred packaging is tape and reel.
Weight : 0.08g.
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of
use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by
implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to
change without notice. This publication supersedes and replaces all information previously supplied.
STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics
© 1999 STMicroelectronics - Printed in Italy - All rights reserved.
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