STMICROELECTRONICS STD70N03L-1

STD70N03L
STD70N03L-1
N-channel 30V - 0.0059Ω - 70A - DPAK / IPAK
STripFET™ III Power MOSFET
General features
■
Type
VDSS
RDS(on)
ID
STD70N03L
30V
<0.0073Ω
70A
STD70N03L-1
30V
<0.0073Ω
70A
■
Conduction losses reduced
■
Switching losses reduced
■
Low threshold device
3
3
RDS(ON) * Qg industry’s benchmark
2
1
DPAK
1
IPAK
Description
This product utilizes the latest advanced design
rules of ST’s proprietary STripFET™ technology.
This is suitable for the most demanding DC-DC
converter application where high efficiency is to
be achieved.
Internal schematic diagram
Applications
■
Switching application
Order codes
Part number
Marking
Package
Packaging
STD70N03L
D70N03L
DPAK
Tape & reel
STD70N03L-1
D70N03L-1
IPAK
Tube
June 2006
Rev 1
1/16
www.st.com
16
Contents
STD70N03L - STD70N03L-1
Contents
1
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1
Electrical characteristics (curves)
............................ 8
3
Test circuit
4
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
5
Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
6
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2/16
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
STD70N03L - STD70N03L-1
1
Electrical ratings
Electrical ratings
Table 1.
Absolute maximum ratings
Symbol
Parameter
VDS
Drain-source voltage (VGS = 0)
VGS
Gate-source voltage
Value
Unit
30
V
± 20
V
ID
Drain current (continuous) at TC = 25°C
70
A
ID
Drain current (continuous) at TC = 100°C
50
A
IDM (1)
Drain current (pulsed)
280
A
PTOT
Total dissipation at TC = 25°C
70
W
Derating factor
0.47
W/°C
EAS (2)
Single pulse avalanche energy
300
mJ
Tj
Operating junction temperature
Storage temperature
-55 to 175
°C
Value
Unit
Tstg
1. Pulse width limited by safe operating area
2. Starting Tj =25°C, Id = 30A, Vdd = 15V
Table 2.
Symbol
Thermal resistance
Parameter
Rthj-case
Thermal resistance junction-case Max
2.14
°C/W
Rthj-amb
Thermal resistance junction-amb Max
100
°C/W
Maximum lead temperature for soldering purpose
275
°C
Tl
3/16
Electrical characteristics
2
STD70N03L - STD70N03L-1
Electrical characteristics
(TCASE=25°C unless otherwise specified)
Table 3.
Symbol
V(BR)DSS
On/off states
Parameter
Drain-source
breakdown voltage
Test condictions
ID = 250µA, VGS= 0
IDSS
Zero gate voltage drain VDS = 20V,
current (VGS = 0)
VDS = 20V,Tc = 125°C
IGSS
Gate body leakage
current(VDS = 0)
VGS(th)
Min.
VGS= 10V, ID= 35A @Tj=125°C
VGS= 5V, ID= 35A @Tj=125°C
Table 4.
Symbol
±100
nA
V
Ω
Ω
Ω
Ω
Dynamic
Parameter
Test condictions
Min.
Typ.
Max.
Unit
VDS =10V, ID = 15A
Input capacitance
Output capacitance
Reverse transfer
capacitance
VDS =25V, f=1MHz, VGS=0
VGS =5V
Qgd
Total gate charge
Gate-source charge
Gate-drain charge
Qgls (2)
Third-quadrant gate
charge
VDS <0V, VGS =10V
15
nC
Gate input resistance
f=1MHz Gate DC Bias =0 Test
signal level =20mV open drain
1.5
Ω
Ciss
Coss
Crss
Qg
Qgs
RG
VDD=15V, ID = 70A
(see Figure 7)
1. Pulsed: pulse duration = 300µs, duty cycle 1.5%
4/16
µA
µA
Forward
transconductance
gfs (1)
2.
1
10
0.0059 0.0073
0.007 0.013
0.0091 0.0113
0.0108 0.0201
VGS= 5V, ID= 35A
Unit
V
1
VGS= 10V, ID= 35A
RDS(on)
Max.
30
VGS = ±20V
Gate threshold voltage VDS= VGS, ID = 250µA
Static drain-source on
resistance
Typ.
Gate charge for synchronous operation: see Appendix A: Power losses estimation
40
S
2200
380
49
pF
pF
pF
15.7
8.3
3.4
21
nC
nC
nC
STD70N03L - STD70N03L-1
Table 5.
Symbol
td(on)
tr
td(off)
tf
Table 6.
Symbol
Electrical characteristics
Switching times
Parameter
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Test condictions
Min.
Typ.
Max.
21
95
19
15
VDD=15V, ID=35A,
RG=4.7Ω, VGS=5V
(see Figure 13)
Unit
ns
ns
ns
ns
Source drain diode
Max
Unit
Source-drain current
70
A
ISDM(1)
Source-drain current (pulsed)
280
A
VSD (2)
Forward on voltage
1.3
V
ISD
trr
Qrr
IRRM
Parameter
Reverse recovery time
Reverse recovery charge
Reverse recovery current
Test condictions
Min
Typ.
ISD=35A, VGS=0
ISD = 70A,
di/dt=100A/µs,
VDD=20V, Tj=150°C
(see Figure 18)
32
51
3.2
ns
nC
A
1. Pulse width limited by safe operating area
2. Pulsed: pulse duration = 300µs, duty cycle 1.5%
5/16
Electrical characteristics
STD70N03L - STD70N03L-1
2.1
Electrical characteristics (curves)
Figure 1.
Safe operating area
Figure 2.
Thermal impedance
Figure 3.
Output characterisics
Figure 4.
Transfer characteristics
Figure 5.
Transconductance
Figure 6.
Static drain-source on resistance
6/16
STD70N03L - STD70N03L-1
Electrical characteristics
Figure 7.
Gate charge vs gate-source voltage Figure 8.
Figure 9.
Normalized gate threshold voltage
vs temperature
Figure 11. Source-drain diode forward
characteristics
Capacitance variations
Figure 10. Normalized on resistance vs
temperature
Figure 12. Normalized BVDSS vs temperature
7/16
Test circuit
3
STD70N03L - STD70N03L-1
Test circuit
Figure 13. Switching times test circuit for
resistive load
Figure 14. Gate charge test circuit
Figure 15. Test circuit for inductive load
Figure 16. Unclamped inductive load test
switching and diode recovery times
circuit
Figure 17. Unclamped inductive waveform
8/16
Figure 18. Switching time waveform
STD70N03L - STD70N03L-1
Appendix A
Power losses estimation
Power losses estimation
Figure 19. Buck converter
The power losses associated with the FETs in a synchronous buck converter can
be estimated using the equations shown in the table below. The formulas give a
good approximation, for the sake of performance comparison, of how different
pairs of devices affect the converter efficiency. However a very important
parameter, the wotking temperature, is not considered. The real device behavior is
really dependent on how the heat generated inside the devices is removed to allow
for a safer working junction temperature.
The low side (SW2) device requires:
●
Very low RDS(on) to reduce conduction losses
●
Small Qgls to reduce the gate charge losses
●
Small Coss to reduce losses due to output capacitance
●
Small Qrr to reduce losses on SW1 during its turn-on
●
The Cgd/Cgs ratio lower than Vth/Vgg ratio especially with low drain to source
voltage to avoid the cross conduction phenomenon.
The high side (SW1) device requires:
●
Small Rg and Lg to allow higher gate current peak and to limit the voltage
feedback on the gate
●
Small Qg to have a faster commutation and to reduce gate charge losses
●
Low RDS(on) to reduce the conduction losses
9/16
Power losses estimation
STD70N03L - STD70N03L-1
High side switch (SW1)
Low side switch (SW2)
Pconduction
R DS ( on ) • I L • δ
R DS ( on ) • I L • ( 1 – δ)
Pswitching
IL
V in • ( Q gsth ( SW1 ) + Q gd ( SW1 ) ) • f • ---Ig
Zero voltage switching
2
Recovery
Not applicable
Conduction
Not applicable
2
1
Vin • Q rr ( SW2 ) • f
Pdiode
V f ( SW2 ) • I L • t deadtime • f
Pgate(Qg)
Q g ( SW1 ) • V gg • f
Q gls ( SW2 ) • V gg • f
PQoss
V in • Q oss ( SW1 ) • f
-------------------------------------------------2
V in • Q oss ( SW2 ) • f
-------------------------------------------------2
Parameter
Meaning
d
Duty-cycle
Qgsth
Post threshold gate charge
Qgls
Third quadrant gate charge
Pconduction
On state losses
Pswitching
On-off transition losses
Pdiode
Conduction and reverse recovery diode losses
Pgate
Gate driver losses
PQoss
Output capacitance losses
10/16
STD70N03L - STD70N03L-1
4
Package mechanical data
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a Lead-free second level interconnect . The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com
11/16
Package mechanical data
STD70N03L - STD70N03L-1
TO-251 (IPAK) MECHANICAL DATA
mm
DIM.
MIN.
inch
TYP.
MAX.
MIN.
TYP.
MAX.
A
2.2
2.4
0.086
0.094
A1
0.9
1.1
0.035
0.043
A3
0.7
1.3
0.027
0.051
B
0.64
0.9
0.025
0.031
B2
5.2
5.4
0.204
0.212
B3
0.85
B5
0.033
0.3
0.012
B6
0.95
C
0.45
C2
0.48
D
6
E
6.4
6.6
0.037
0.6
0.017
0.023
0.6
0.019
0.023
6.2
0.236
0.244
0.252
0.260
G
4.4
4.6
0.173
0.181
H
15.9
16.3
0.626
0.641
L
9
9.4
0.354
0.370
L1
0.8
1.2
0.031
0.047
L2
0.8
1
0.031
0.039
A1
C2
A3
A
C
H
B
B3
=
1
=
2
G
=
=
=
E
B2
=
3
B5
L
D
B6
L2
L1
0068771-E
12/16
STD70N03L - STD70N03L-1
Package mechanical data
DPAK MECHANICAL DATA
mm.
inch
DIM.
MIN.
A
A1
A2
B
b4
C
C2
D
D1
E
E1
e
e1
H
L
(L1)
L2
L4
R
V2
TYP
2.2
0.9
0.03
0.64
5.2
0.45
0.48
6
MAX.
MIN.
2.4
1.1
0.23
0.9
5.4
0.6
0.6
6.2
0.086
0.035
0.001
0.025
0.204
0.017
0.019
0.236
6.6
0.252
5.1
6.4
0.260
0.173
0.368
0.039
2.8
0.8
0.181
0.397
0.110
0.031
1
0.023
0.2
0°
0.094
0.043
0.009
0.035
0.212
0.023
0.023
0.244
0.185
0.090
4.6
10.1
0.6
MAX.
0.200
4.7
2.28
4.4
9.35
1
TYP.
0.039
0.008
8°
0°
8°
0068772-F
13/16
Packaging mechanical data
5
STD70N03L - STD70N03L-1
Packaging mechanical data
DPAK FOOTPRINT
All dimensions are in millimeters
TAPE AND REEL SHIPMENT
REEL MECHANICAL DATA
DIM.
mm
MIN.
A
B
1.5
C
12.8
D
20.2
G
16.4
N
50
T
TAPE MECHANICAL DATA
DIM.
mm
MIN.
MAX.
A0
6.8
7
0.267 0.275
B0
10.4
10.6
0.409 0.417
B1
D
14/16
inch
1.5
D1
1.5
E
1.65
MIN.
MAX.
12.1
0.476
1.6
0.059 0.063
1.85
0.065 0.073
0.059
F
7.4
7.6
0.291 0.299
K0
2.55
2.75
0.100 0.108
0.153 0.161
P0
3.9
4.1
P1
7.9
8.1
0.311 0.319
P2
1.9
2.1
0.075 0.082
R
40
W
15.7
1.574
16.3
0.618
0.641
inch
MAX.
MIN.
MAX.
330
12.992
13.2
0.504 0.520
18.4
0.645 0.724
0.059
0.795
1.968
22.4
0.881
BASE QTY
BULK QTY
2500
2500
STD70N03L - STD70N03L-1
6
Revision history
Revision history
Table 7.
Revision history
Date
Revision
29-Jun-2006
1
Changes
First Release
15/16
STD70N03L - STD70N03L-1
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