FREESCALE 33812_10

Freescale Semiconductor
Advance Information
Document Number: MC33812
Rev. 5.0, 7/2010
Multifunctional Ignition and
Injector Driver
33812
The 33812 is an engine control analog power IC intended for
motorcycle and other single/dual cylinder small engine control
applications. The IC consists of three integrated low side drivers, one
pre-driver, a +5.0 V, voltage pre-regulator, an MCU watchdog circuit,
an ISO 9141 K-Line interface, and a parallel interface for MCU
communication. The three low side drivers are provided for driving a
fuel injector, a lamp or LED, and a relay or other load. The pre-driver
is intended to drive either an Insulated Gate Bipolar Transistor (IGBT)
or a bipolar Darlington transistor to control an ignition coil.
SMALL ENGINE CONTROL IC
Features:
EK Pb-FREE SUFFIX
• Designed to operate over the range of ~4.7 V ≤ VPWR ≤ 36 V
98ASA10556D
• Fuel Injector driver - Current Limit - 4.0 A Typical
32 Pin SOICW EP
• Ignition pre-driver can drive IGBT or Darlington bipolar junction
transistors
ORDERING INFORMATION
• Ignition pre-driver has independent high and low side outputs
• Relay driver - Current Limit - 4.0 A Typical
Temperature
Device
Package
• Lamp driver- Current Limit - 1.5 A Typical
Range (TA)
• All external outputs protected against short to battery, over-current
MCZ33812EK/R2
• Ignition and other drivers protected against over-temperature
-40° to 125°C
32 SOICW-EP
*MCZ33812AEK/R2
• Interfaces directly to MCU Using 5.0 V parallel interface
• VCC voltage pre-regulator provides +5.0 V power for the MCU
*Note: AEC qualified for automotive applications
• MCU Power On RESET generator
• MCU watchdog timer circuit with parallel refresh/time setting line
• Independent fault annunciation outputs for ignition, injector and relay drivers
• ISO-9141 K-Line transceiver for communicating diagnostic messages
• Pb-free packaging designated by suffix code EK
33812
VBAT
LAMPOUT
PNP
+5 V
VCC
GPIO
GPIO
RESET
MCU
+5 V
VCCREF
VCCSENS
LAMPIN
RIN
RESET
GPIO
WDRFSH
GPIO
GPIO
INJIN
INJFLT
GPIO
IGNIN
IGNFLT
RELFLT
MRX
MTX
GPIO
GPIO
RXD
TXD
TM_EN, TEST2
WD_INH
PGND1,2
DGND
VBAT
MIL
VPWR
ROUT
VBAT
INJECTOR
INJOUT
VBAT
IGNSUP
IGNFB
VPWR
RELAY OR
OTHER LOAD
IGNOUTH
(IGBT DRIVER SHOWN)
IGNOUTL
ISO9141
ISO9141
Note: Surge Voltage protection recommended on VPWR
Figure 1. 33812 Simplified Application Diagram
* This document contains certain information on a new product.
Specifications and information herein are subject to change without notice.
© Freescale Semiconductor, Inc., 2010. All rights reserved.
VBAT
33812
VBAT
LAMPOUT
PNP
+5 V
VCC
GPIO
GPIO
RESET
MCU
+5 V
VCCREF
VCCSENS
LAMPIN
RIN
RESET
GPIO
WDRFSH
GPIO
GPIO
INJIN
INJFLT
GPIO
IGNIN
IGNFLT
RELFLT
MRX
MTX
GPIO
GPIO
RXD
TXD
TM_EN, TEST2
WD_INH
PGND1,2
DGND
VBAT
MIL
VPWR
ROUT
INJOUT
IGNSUP
IGNFB
VBAT
INJECTOR
RELAY OR
OTHER LOAD
VBAT
VBAT
+5 V
IGNOUTH
(DARLINGTON
DRIVER SHOWN)
IGNOUTL
ISO9141
ISO9141
Figure 2. 33812 Simplified Application Diagram (Darlington Mode)
33812
2
Analog Integrated Circuit Device Data
Freescale Semiconductor
VPWR
VCC
TM_EN
~50 µA
LOGIC CONTROL
TEST1
TEST2
IGNSUP
Ignition
IGNFB
Predriver
Band Gap
Oscillator
Bias
TEST3
~50 µA
INJIN
VCCREF
VCCSENS
VPWR, VCC
V10.0 Analog
V2.5 Logic
POR, over-voltage
under-voltage
IGNOUTH
Short
Protection
IGNOUTL
Relay and
Injector Output
INJOUT
PGND1
VCC ~50 µA
Gate Control
~50 µA
INJFLT
IGNIN
~50 µA
VCC
VCC
~50 µA
PARALLEL
CONTROL
VClamp
Current Limit
Temperature Limit
Short Protection
Open det. on Injector
ROUT
PGND2
+
–
~50 µA
IGNFLT
~75µA
RS
lLimit
RIN
RELFLT
Lamp Output
LAMPIN
~50 µA
Gate Control
~50 µA
RESET
WATCHDOG
(Open Drain)
LAMPOUT
Current Limit
Temperature Limit
Short Protection
VClamp
+
–
WDRFSH
~50 µAVCC
~50 µA
MTX
RS
lLimit
GND
ISO9141
CONTROLLER
VCC
MRX
DGND ~50 µA
ISO9141
WD_INH
~50 µA
*Note: Pull up and pull down current sources are ~50 µA unless otherwise noted
Figure 3. 33812 Simplified Internal Block Diagram
33812
Analog Integrated Circuit Device Data
Freescale Semiconductor
3
PIN CONNECTIONS
PIN CONNECTIONS
IGNOUTL
IGNOUTH
IGNSUP
IGNFB
ISO9141
VCCSENS
VCCREF
VPWR
RESET
INJFLT
RELFLT
IGNFLT
INJIN
RIN
LAMPIN
IGNIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
GND
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
TEST3
TEST2
TEST1
WD_INH
N.C.
INJOUT
PGND1
DGND
LAMPOUT
PGND2
ROUT
N.C.
TM_EN
WDRFSH
MRX
MTX
Figure 4. 33812 Pin Connections
Table 1. 33812 Pin Definitions
Pin
Pin Name
Pin
Function
Formal Name
1
IGNOUTL
Output
Ignition Output Low
Low side output to drive Gate/Base of IGBT/Bipolar Darlington
2
IGNOUTH
Output
Ignition Output High
High side output to drive Gate/Base of IGBT/Bipolar Darlington
3
IGNSUP
Input
Ignition Output Supply
Tie to +5 V for Darlington, tie to the VPWR supply for IGBT output device
4
IGNFB
Input
Feedback from Source
Voltage feedback from source of Ignition driver transistor through 10:1
voltage divider
5
ISO9141
6
VCCSENS
Input
Voltage Sense from VCC
7
VCCREF
Output
VCC Reference Base drive
Base drive voltage for external PNP pass transistor
8
VPWR
Supply Input
Main Voltage Supply Input
VPWR is the main voltage supply Input for the device. Connected to +12
volt battery (It should have reverse battery protection and transient
suppression.)
9
RESET
Output
Reset Output to MCU
Logic Level Reset signal used to reset the MCU when the watchdog circuit
times out, during under voltage condition on VCC and for initial power up
and power down
10
INJFLT
Output
Injector Fault
11
RELFLT
Output
Relay Fault
12
IGNFLT
Output
Ignition Fault
Logic Level output to MCU indicating any fault in the ignition circuit.
13
INJIN
Input
Injector Parallel Input
Logic Level input from the MCU to control the injector driver output
14
RIN
Input
Relay Parallel Input
Logic Level Parallel input to activate RELAY output, ROUT
15
LAMPIN
Input
LAMP Parallel Input
Logic Level Parallel input to activate the malfunction indicator lamp output,
LAMP
16
IGNIN
Input
Ignition Parallel Input
Logic Level Input from MCU controlling the ignition coil current flow and
spark.
17
MTX
Input
ISO9141 MCU Data Input
Input/Output ISO9141 K-Line Bidirectional
Serial Data Signal
Description
The ISO9141 pin is VPWR level IN/OUT signal connected to external ECU
Tester using ISO9141 Protocol.The Output is Open drain and the Input is
a ratiometric VPWR level threshold comparator
Feedback to internal VCC regulator from external pass transistor
Logic Level output to MCU indicating any fault in the injector circuit.
Logic Level output to MCU indicating any fault in the relay circuit.
Input logic level ISO9141 data from the MCU to the ISO9141 IN/OUT pin
33812
4
Analog Integrated Circuit Device Data
Freescale Semiconductor
PIN CONNECTIONS
Table 1. 33812 Pin Definitions
Pin
Pin Name
Pin
Function
Formal Name
Description
18
MRX
Output
Low Side Driver Output
Output logic level ISO9141 data to the MCU from the ISO9141 IN/OUT pin
19
WDRFSH
Input
Watchdog Refresh
Logic Level input from MCU to refresh the watchdog circuit to prevent
RESET
20
TM_EN
Input
Test Mode Enable
Used by Freescale test engineering, tie to Gnd in operation
21
N.C.
Unused
-------
22
ROUT
Output
Relay Driver Output
23
PGND2
Ground
Power Ground 2
24
LAMPOUT
Output
Warning Lamp Output
25
DGND
Ground
Supply Ground
26
PGND1
Ground
Power Ground 1
27
INJOUT
Output
Injector Driver Output
28
N.C.
Unused
-------
29
WD_INH
Input
Watch Dog Inhibit
30
TEST1
Input
Test 1
MUST be tied to GND.
31
TEST2
Input
Test 2
MUST be tied to GND.
32
TEST3
Input
Test 3
MUST leave OPEN.
EP
GND
Ground
Substrate Ground
Unused pin, leave open
Low side relay driver output driven by parallel input RIN
Ground for RELAY driver output
Low side driver output for MIL (warning lamp) driven by parallel input
LAMPIN
Tied to ground plane, used for ground for all low power signals
Ground for INJOUT injector driver output
Low side driver output for Injector driven by parallel input INJIN
Unused pin, leave open
Normally tied to GND, If tied high through a pull-up, it inhibits RESET from
a watchdog time-out
Should be tied to DGND.
33812
Analog Integrated Circuit Device Data
Freescale Semiconductor
5
ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS
Table 2. Maximum Ratings
All voltages are with respect to ground, unless otherwise noted. Exceeding these ratings may cause a malfunction or
permanent damage to the device.
Rating
Symbol
Value
Unit
VPWR
-0.3 to 45
VDC
VIL
-0.3 to VCC
VDC
VINJOUT
VRELOUT
-0.3 to VCLAMP_INJ
VDC
-0.3 to VCLAMP_REL
LAMPOUT
-0.3 to VCLAMP_LAMP
VDC
Output Clamp Energy (INJOUT and ROUT) (Single Pulse)
TJUNCTION = 150°C, IOUT = 1.5 A
ECLAMP_INJ_SP
ECLAMP_REL_SP
100
mJ
Output Clamp Energy (INJOUT and ROUT) (Continuous operation)
TJUNCTION = 125°C, IOUT = 1.0 A, (Max. frequency is 70 Hz, Maximum Duty Cycle 90%)
ECLAMP_INJ_CP
ECLAMP_REL_CP
100
mJ
IOCC_MAX
2.0
A
ECLAMP_LAMP_SP
35
mJ
VESD1
VESD2
VESD3
VESD4
±2000
±200
±750
±500
TA
TJ
TC
-40 to 125
-40 to 150
-40 to 125
TSTG
-55 to 150
°C
PD
1.7
W
TSOLDER
Note 4
°C
RθJA
RθJL
RθJC
75
8.0
1.2
VPWR Supply Voltage(1)
Logic Input Voltage (MTX, INJIN, IGNIN, WDRFSH, LAMPIN, RIN)
Injector and RELAY Low Side Driver Drain Voltage (VINJOUT)
Lamp Low Side Driver Drain Voltage (LAMPOUT)
Output Continuous Current (INJOUT and ROUT)
TJUNCTION = 150°C
Output Clamp Energy (LAMPOUT) (Single Pulse) - TJUNCTION = 150°C, IOUT = 0.5 A
ESD Voltage(2)
V
Human Body Model
Machine Model
Charge Device Model (Corner pins)
Charge Device Model
THERMAL RATINGS
°C
Operating Temperature
Ambient
Junction
Case
Storage Temperature
Power Dissipation (TA =
25°C)(5)
Peak Package Reflow Temperature During Solder Mounting(3), (4)
Thermal Resistance
Junction-to-Ambient
Junction- to-Lead
Junction-to-Flag
°C/W
Notes
1. Exceeding these limits may cause malfunction or permanent damage to the device.
2. ESD testing is performed in accordance with the Human Body Model (HBM) (CZAP = 100 pF, RZAP = 1500 Ω), the Machine Model (MM)
(CZAP = 200 pF, RZAP = 0 Ω), and the Charge Device Model (CDM), Robotic (CZAP = 4.0 pF).
3.
4.
5.
Pin soldering temperature limit is for 10 seconds maximum duration. Not designed for immersion soldering. Exceeding these limits may
cause malfunction or permanent damage to the device.
Freescale’s Package Reflow capability meets Pb-free requirements for JEDEC standard J-STD-020C. For Peak Package Reflow
Temperature and Moisture Sensitivity Levels (MSL), Go to www.freescale.com, search by part number [e.g. remove prefixes/suffixes
and enter the core ID to view all orderable parts (i.e. MC33xxxD enter 33xxx), and review parametrics.
This parameter is guaranteed by design but is not production tested.
33812
6
Analog Integrated Circuit Device Data
Freescale Semiconductor
ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
Characteristics noted under conditions of 7.0 V ≤ VPWR ≤ 18 V, -40°C ≤ TC ≤ 125°C, unless otherwise noted. Where
applicable, typical values reflect the parameter’s approximate average value with VPWR = 14 V, TA = 25°C.
Characteristic
Symbol
Min
Typ
Max
Unit
VPWR(FO)
VPWR(FP)
4.7
7.0
–
36
18
V
IVPWR(ON)
–
10.0
14.0
mA
VPWR(OV)
36.5
39
42
V
VPWR(OV-HYS)
0.5
1.5
3.0
V
VPWR(UV)
3.0
3.7
4.4
V
VPWR(UV-HYS)
100
200
300
mV
VSENS
4.9
5.0
5.1
V
VCCREF Output Current (9)
IVCCREF
–
-5.0
–
mA
VCCREF Current Limit
IVCCCL
5.0
15
20
mA
Output Capacitance External (ceramic, low ESR recommended)
VOCE
2.2
–
–
μF
IVCCSENS
–
50
1000
μA
Line Regulation (external output PNP transistor and 500 Ω Load on
VCCSENS)
REGLINE_VCC
–
2
25
mV
Load Regulation (external output PNP transistor and 500 Ω Load on
VCCSENS)
REGLOAD_VCC
–
2
25
mV
VDROPOUT
–
46
200
mV
RESETUV_VCC
4.5
4.7
4.9
V
VOUT(FLT-TH)
2.0
2.5
3.0
V
40
75
150
POWER INPUT (VPWR)
Supply Voltage (measured at VPWR pin)(7)
Fully Operational
Full Parameter Specification
Supply Current - All Outputs Disabled (Normal Mode)
VPWR Over-voltage Shutdown Threshold Voltage
(8)
VPWR Over-voltage Shutdown Hysteresis Voltage
VPWR Under-voltage Shutdown Threshold Voltage
(8)
VPWR Under-voltage Shutdown Hysteresis Voltage
VOLTAGE REGULATOR OUTPUTS (VCCREF, VCCSENS)
VCCSENS (VCC) Output Voltage (measured with external output PNP
(FZT753 typical) transistor and 500 Ω Load on VCCSENS)
VCCSENS Input Current
Dropout Voltage (Minimal Input/Output Voltage at full load)
VCC Under-voltage RESET Threshold Voltage
LOW SIDE DRIVER (INJOUT AND ROUT)
Output Fault Detection Voltage Threshold(10)
Outputs programmed OFF (Open Load, Injector/Relay)
Outputs programmed ON (Short to Battery)
Output OFF Open Load Detection Current (Injector/Relay)
VDRAIN = 18 V, Outputs Programmed OFF
μA
I(OFF)OCO
Notes
6. Device is functional provided TJ is less than 150°C. Some table parameters may be out of specification.
7.
8.
9.
10.
Over-voltage thresholds minimum and maximum include hysteresis.
Under-voltage thresholds minimum and maximum include hysteresis, for disabling outputs only, RESET based on VCC under-voltage
This parameter is guaranteed by design, however is not production tested.
Output fault detect thresholds are the same for output open and shorts.
33812
Analog Integrated Circuit Device Data
Freescale Semiconductor
7
ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS (continued)
Characteristics noted under conditions of 7.0 V ≤ VPWR ≤ 18 V, -40°C ≤ TC ≤ 125°C, unless otherwise noted. Where
applicable, typical values reflect the parameter’s approximate average value with VPWR = 14 V, TA = 25°C.
Characteristic
Symbol
Min
Typ
Max
Unit
Drain-to-Source ON Resistance
IOUT =1.0 A, TJ = 125°C, VPWR =14 V
IOUT =1.0 A, TJ = 25°C, VPWR =14 V
IOUT =1.0 A, TJ = -40°C, VPWR =14 V
RDS (ON)-INJ/REL
RDS (ON)-INJ/REL
RDS (ON)-INJ/REL
–
–
–
–
0.25
0.2
0.4
–
–
Output Self Limiting Current
IOUT(LIM)-INJ/REL
3.0
–
6.0
A
Output Clamp Voltage - ID = 20 mA
VCLAMP_INJ/REL
48
53
58
V
Output Leakage Current (INJOUT)
IOUT(LKG)-INJ
–
–
1.0
–
–
1.0
TLIM-INJ/REL
155
–
190
°C
TLIM(HYS)-INJ/REL
5.0
10
15
°C
RDS (ON)LAMP
–
–
1.0
Output Self Limiting Current
IOUT(LIM)-LAMP
1.0
–
2.5
A
Output Clamp Voltage - ID = 20 mA
VCLAMP-LAMP
48
53
58
V
–
–
20
VOUT(FLT-TH)-LAMP
2.0
2.5
3.0
V
TLIM-LAMP
155
–
190
°C
TLIM(HYS)-LAMP
5.0
10
15
°C
LOW SIDE DRIVER (INJOUT AND ROUT) (CONTINUED)
Ω
VDRAIN = 24 V, (Note: Open Load Detection Current can’t be
disabled)
Output Leakage Current (ROUT)
mA
IOUT(LKG)-REL
VDRAIN = 24 V, (Note: Open Load Detection Current can’t be
disabled)
Over-temperature Shutdown(11)
Over-temperature Shutdown Hysteresis(11)
mA
LOW SIDE DRIVER (LAMPOUT)
Drain-to-Source ON Resistance
Ω
IOUT = 300 mA, TJ = 150°C, VPWR = 14 V
Output Leakage
Current(11)
μA
IOUT(LKG)-LAMP
VDRAIN = 24 V, (Note: No Open Load Detection Current)
Output Fault Detection Voltage Threshold(11)
Outputs programmed ON (Short to Battery)
Over-temperature Shutdown(11)
(11)
Over-temperature Shutdown Hysteresis
Notes
11. This parameter is guaranteed by design, however is not production tested.
33812
8
Analog Integrated Circuit Device Data
Freescale Semiconductor
ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS (continued)
Characteristics noted under conditions of 7.0 V ≤ VPWR ≤ 18 V, -40°C ≤ TC ≤ 125°C, unless otherwise noted. Where
applicable, typical values reflect the parameter’s approximate average value with VPWR = 14 V, TA = 25°C.
Characteristic
Symbol
Min
Typ
Max
Unit
IGNITION (IGBT/DARLINGTON) DRIVER PARAMETERS (IGNOUTL, IGNOUTH, IGNFB, IGNSUP)
Drain-to-Source ON Resistance
RDS_L(ON)
150
300
400
Ω
RDS_H(ON)
–
70
90
Ω
I GATEDRIVE_H
40
50
–
mA
PD_IGNOUTH
–
–
300
mW
100
250
400
mV
IFBX(FLT-SNS)
–
–
1.0
VIGNSUP_IGBT
VIGNSUP_DARL
–
–
VPWR
5.0
VPWR_MAX
VCC_MAX
TLIM-IGNOUTH,L
155
–
190
°C
TLIM(HYS)-
5.0
10
15
°C
(IGNOUTL Output, Gate/Base Drive Turn Off Resistance)
Drain-to-Source ON Resistance
(IGNSUP to IGNOUTH Output, Gate/Base Drive Turn On Resistance)
Ignition Output High Source Current (IGNOUTH)
Ignition Output High (IGNOUTH) Device Power Dissipation
Output Fault Detection Voltage
(12)
Threshold(12)
VIGNFB_OUT(FLT-TH)
(At IGNFB pin, not at input of 10:1 Voltage Divider)
Output programmed OFF (Open Load)
Output programmed ON (Short to Battery)
Feedback Sense Current (FBx Input Current)
FBx = 2.0 V, Output Programmed OFF
μA
IGNSUP Voltage for:
IGBT(12)
Darlington(12)
Over-temperature Shutdown on IGNOUTH and IGNOUTL(12)
Over-temperature Shutdown Hysteresis on IGNOUTH and IGNOUTL(13)
V
IGNOUTH,L
ISO9141 TRANSCEIVER PARAMETERS (ISO9141)
Input low voltage at ISO I/O pin
VIL_ISO
–
–
0.3xVPWR
V
Input high voltage at ISO I/O pin
VIH_ISO
0.7*VPWR
–
–
V
VHYST_ISO
0.15xVPWR
–
–
Output low voltage at ISO I/O pin
VOL_ISO
–
–
0.2xVPWR
V
Output high voltage at ISO I/O pin
VOH_ISO
0.8xVPWR
–
–
V
Output current limit at ISO I/O pin (MTX = 0)
ILIM_ISO
50
100
150
mA
Load capacitance at ISO I/O pin(13)
CL_ISO
0.01
3.0
10
nF
Output Logic High-voltage Levelled IOH=1.0 mA load)
VOH
0.8 x VCC
–
VCC + 0.2
V
Output Logic Low-voltage Level (at IOL=1.0 mA load)
VOL
GND
–
0.1 x VCC
V
RRESET
100
–
500
kΩ
Input hysteresis at ISO I/O pin
DIGITAL OUTPUTS (MRX, IGNFLT, RELFLT, INJFLT)
DIGITAL OUTPUT (RESET)
Resistance of Internal pull-down resistor on open drain RESET pin
Notes
12. These parameters are guaranteed by design.
13. This parameter is guaranteed by design, however it is not production tested.
33812
Analog Integrated Circuit Device Data
Freescale Semiconductor
9
ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS (continued)
Characteristics noted under conditions of 7.0 V ≤ VPWR ≤ 18 V, -40°C ≤ TC ≤ 125°C, unless otherwise noted. Where
applicable, typical values reflect the parameter’s approximate average value with VPWR = 14 V, TA = 25°C.
Characteristic
Symbol
Min
Typ
Max
Unit
Input Logic High-voltage Thresholds
VIH
0.7 x VCC
–
VCC + 0.3
V
Input Logic Low-voltage Thresholds
VIL
GND - 0.3
–
0.2 x VCC
V
VIHYS
0.5
–
1.5
V
CIN
–
–
20
pF
Input Logic Pull-down Current (all except MTX) - 0.8 V to 5.0 V
ILOGIC_PD
30
50
100
μA
Input Logic Pull-up Current (MTX only) - 0.8 V to 5.0 V
ILOGIC_PU
-30
-50
-100
μA
DIGITAL INPUTS (MTX, INJIN, IGNIN, LAMPIN, WDRFSH, RIN, WD_INH)
Input Logic Voltage Hysteresis
Input Logic Capacitance
(14)
Notes
14. These parameters are guaranteed by design.
33812
10
Analog Integrated Circuit Device Data
Freescale Semiconductor
ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
Characteristics noted under conditions of 7.0 V ≤ VPWR ≤ 18 V, -40°C ≤ TC ≤ 125°C, unless otherwise noted. Where applicable,
typical values reflect the parameter’s approximate average value with VPWR = 14 V, TA = 25°C.
Characteristic
Symbol
Min
Typ
Max
Unit
POWER INPUT
Required Low State Duration on VPWR for Under-voltage Detect
μs
tUV
VPWR ≤ VPWR_UV(15)
1.0
–
–
WATCHDOG TIMER
Maximum time value Watchdog can be loaded with
WDMAX
–
–
10
s
Maximum WDRFSH pulse width to load full Watchdog time value
WDLOAD
–
–
1.0
ms
WDRFSHMIN
1.0
–
–
μs
WDRESET
100
–
–
μs
Typical ISO9141 Data Rate(15)
ISOBR
–
10
–
kbps
Turn OFF Delay MTX Input to ISO Output
tTXDF
–
–
2.0
μs
tRXDF, tRXDR
–
–
1.0
μs
tRXR, tRXF
–
–
1.0
μs
tTXR, tTXF
–
–
1.0
μs
tOC(BLANK)
5.0
7.0
9.0
ms
tRETRY_LAMP
7.0
10
13
ms
t R(DLO)
–
100
200
ns
t F (DLO)
–
100
200
ns
tSC
30
60
90
µs
Output OFF Open Circuit Fault Filter Timer (INJECTOR and RELAY
Driver)
t(OFF)OC
100
–
400
µs
Output Slew Rate - Rise - ZLOAD = 14 Ω , VLOAD = 14 V
t SR(RISE)
1.0
5.0
10
V/μs
Output Slew Rate - Fall - ZLOAD = 14 Ω, VLOAD = 14 V
t SR(FALL)
1.0
5.0
10
V/μs
Output OFF Open Circuit Fault Filter Timer
t(OFF)OC
100
–
400
µs
Output ON Short-circuit to Battery Fault Detection Timer
t(ON)(SC)
30
60
90
µs
Minimum pulse width on WDRFSH to refresh Watchdog timer
Reset Pulse Width when Watchdog times out
ISO9141 TRANSCEIVER
Turn ON/OFF Delay ISO Input to MRX Output
Rise and Fall Time MRX Output (measured from 10% to 90%)
Maximum Rise and Fall Time MTX Input (measured from 10% to 90%)
(15)
LAMP DRIVER
Inrush Current Blanking Time (LAMPOUT only)
LAMPOUT, automatic retry timer during short to battery fault condition
DIGITAL LOGIC OUTPUTS
INJFLT, IGNFLT Output Signal Rise Time (15)
INJFLT, IGNFLT Output Signal Fall Time
(15)
INJECTOR AND RELAY DRIVER
Output ON Current Limit Fault Filter Timer
IGNITION PRE-DRIVER
Notes
15. This parameter is guaranteed by design, however is not production tested.
33812
Analog Integrated Circuit Device Data
Freescale Semiconductor
11
FUNCTIONAL DESCRIPTION
FUNCTIONAL PIN DESCRIPTION
FUNCTIONAL DESCRIPTION
FUNCTIONAL PIN DESCRIPTION
SUPPLY INPUT (VPWR)
LAMP DRIVER OUTPUT (LAMPOUT)
The VPWR pin is battery input to the 33812 IC. A POR/LVI
sub-circuit monitors this input's voltage level. The VPWR pin
requires external reverse battery and transient protection.
The LAMPOUT output pin is the lamp driver, a low side
driver capable of driving an incandescent lamp. The current
limit blanking time is set to allow the driver to handle the
inrush current of a cold lamp filament. The LAMPOUT output
is controlled by the parallel input pin (LAMPIN). The
LAMPOUT low side driver is protected against overtemperature, and short to battery. Unlike the Injector driver,
when a fault condition is detected, the LAMPOUT driver will
turn off, but when the fault condition clears, it will to turn on
again, while the input line, LAMPIN is high.
OUTPUT (VCCREF)
The VCCREF output pin is used to drive an external 5.0 V
regulator PNP bipolar pass transistor.
INPUT (VCCSENS)
The VCCSENS pin is used to monitor the +5.0 Volts from
the external pass transistor’s output. A POR will be
performed when the voltage on the VCCSENS pin goes from
0 to VCC.
DIGITAL GROUND (DGND)
The DGND pin provides ground reference for the digital
inputs and outputs. The VCC supply is referenced to the
DGND pin.
PGND1 AND PGND2
The PGNDx pins provide power additional ground
reference for the power outputs, ROUT, LAMPOUT, and
INJOUT. The VPWR supply is referenced to the PGND pins.
INJECTOR INPUT (INJIN)
The INJIN pin is the parallel input that controls the Injector
output, INJOUT. The INJIN pin is a logic level input with builtin pull-down to ground to prevent accidental actuation of the
injector if the connection to the pin is lost.
INJECTOR AND RELAY DRIVER OUTPUT (INJOUT/
ROUT)
The INJOUT and ROUT output pin are the Injector driver
and Relay driver outputs for the fuel Injector and Relay that
this IC supports. The Relay Driver and Injector Drivers are
identical in operation and features The Injector driver output
is controlled by the parallel input (INJIN) and the Relay driver
output is controlled by the parallel input (RIN). The Injector
and Relay outputs are turned off during VPWR over-voltage
and under-voltage events. Open circuit (during off state),
short to battery (during on state), and over-temperature faults
are detected and annunciated as a logic high on the INJFLT
and RELFLT lines. Over-current is limited by the current
limiting circuitry but is not annunciated unless the overcurrent is due to a short to battery. For either driver, when a
fault condition is detected, the driver will turn off, and when
the fault condition clears, it will try to turn on again, if the input
line goes low and then high.
PRE-DRIVER OUTPUT, WITH FEEDBACK AND
SUPPLY VOLTAGE INPUT (IGNSUP, IGNOUTL,
IGNOUTH, IGNFB)
The IGNOUTL and IGNOUTH output pins are the low side
and high side output pins of the Ignition pre-driver. They are
used to drive either an IGBT or a Darlington BJT to control the
ignition coil current to produce a spark. The choice of output
device, IGBT or Darlington Bipolar Junction Transistor, is
indicated by the choice of supply voltage on the IGNSUP pin.
When driving a Darlington bipolar transistor, the IGNSUP
line must be tied to the +5.0 V supply. When driving an IGBT,
the IGNSUP may be tied to a protected voltage source (e.g.
VPWR) greater than +5.0 V to achieve the necessary gate
drive voltage required by the IGBT. The high side output
device will current limit if the circuit is forced to supply
currents greater than the maximum indicated.
The IGNOUTL and IGNOUTH lines are controlled by the
parallel input (IGNIN).The IGNOUT(L,H) outputs and the
associated feedback pin, IGNFB, provide short to battery
protection for the external driver transistor. A 10:1 voltage
divider must be used on the feedback pin to prevent >400
Volt Ignition Coil flyback voltage from damaging the IC.
Open circuit (off state), short to battery (on state), and
temperature limit threshold exceeded on the pre-driver stage
are detected on the output, and all annunciated as a logic
high on the IGNFLT line.
There is no individual annunciation of these three fault
conditions. The IGNFLT line goes high when any of the three
fault conditions are present.
If an over-current /short to battery fault condition, as
defined by a VDS greater than the VIGNFB_OUT(FLT-TH) is
detected, the IGNOUTH or IGNOUTL will turn off and not turn
on again until the fault condition has cleared and the IGNIN
input line goes low and then high.
OUTPUTS (INJFLT, RELFLT, IGNFLT)
The INJFLT, RELFLT and IGNFLT pins are the logic level
outputs that indicate when a fault condition has been
detected on the INJOUT, ROUT or IGNOUT pins. These pins
33812
12
Analog Integrated Circuit Device Data
Freescale Semiconductor
FUNCTIONAL DESCRIPTION
FUNCTIONAL PIN DESCRIPTION
are normally low and will go high when a fault is detected.
Toggling the respective input pin will clear the respective fault
pin if the fault has been cleared.
K-LINE COMMUNICATION (MTX, MRX, ISO9141)
These three pins are used to provide an ISO914, K-line
communication link for the MCU to provide diagnostic support
for the system. MRX is the +5.0 V logic level serial output line
to the MCU. MTX is the +5.0 V logic level serial input to the
IC from the MCU. The ISO9141 pin is a bidirectional line,
consistent with the ISO9141 specification for signalling to and
from the MCU.
RESET (RESET)
The RESET pin is an open drain output.Without power on
the circuit, RESET is held low by an internal pull-down
resistor. When power is applied to the circuit and the voltage
on the VCCSENSE pin reaches the lower voltage threshold,
(5.0 volts - 2% = 4.9 V) the RESET pin will remain at a low
level (open drain FET turned on) for a period of time equal to
the value WDRESET. After this time period, the RESET pin will
then go high and stay high until a watchdog RESET is
generated, or an under-voltage event on VCC occurs. The
watchdog time and refresh features are controlled via the
WDRFSH line.
RELOAD AND REFRESH TIME (WDRFSH)
The WDRFSH pin is an input that is supplied by an MCU
output to set up the initial reload time, WDRELOAD, and to
refresh the watchdog timer. See the description of the
watchdog timer for information on how to use this pin.
WATCHDOG INHIBIT(WD_INH)
The WD_INH, watchdog inhibit pin, is normally tied to
ground. If desired, during software development, it can be
lifted from the ground pad and pulled high through an external
pull-up resistor. When high, WD_INH will prevent the
watchdog timer from causing a RESET because of a
watchdog timeout. The WD_INH should not be connected to
an MCU I/O pin or left floating in normal operation.
TEST PINS (TEST1, TEST2, AND TEST3)
These three pins are used only by Freescale test
engineering during the production testing of the 33812. They
are not to be used for any application purpose and must be
handled as specified in the pinout section of this document.
33812
Analog Integrated Circuit Device Data
Freescale Semiconductor
13
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
The 33812 has two states of operation, Normal state and
Reset state.
RESET STATE
Applying VPWR to the device will generate a Power On
RESET (POR) placing the device in the RESET state. The
Power On RESET circuit incorporates a timer to prevent high
frequency transients from causing an erroneous POR.
An under-voltage condition on VCC will also place the
device in the RESET state causing a RESET pulse to be
generated on the RESET line.
All RESETs will pre-load the watchdog timer with the
maximum time value, WDMAX. The Watchdog will begin
counting on the rising edge of the pulse.
NORMAL STATE
The NORMAL State is entered after the RESET line goes
high.
Control register settings from RESET are as follows:
• All Outputs Off.
• Watchdog timer loaded with the WDMAX time value.
Power Supply
The 33812 is designed to operate from 4.5 V to 36 V on
the VPWR pin. The VPWR pin supplies power to all internal
regulators, analog and logic circuit blocks. The VCCREF
output pin controls an external PNP bipolar transistor, such
that the collector is driven to +5.0 V +/- 2%. The VCCSENS
input pin, connected to the collector of the PNP, is used to
monitor the output voltage and provides the feedback to
regulate the PNP collector to +5.0 V.
INJECTOR DRIVER OPERATION
The open drain Low Side Driver (LSD) INJOUT is
designed to control a fuel injector. The Injector Driver is
controlled through the logic level parallel input pin, INJIN.
When INJIN is high, the INJOUT pin is pulled to ground,
turning on the fuel injector. When INJIN is low, the injector
pulls the INJOUT output to VBAT and the injector is turned
off.
The INJOUT driver includes off state open load detection
and it’s output device is protected against over-current, short
to battery, over-temperature, inductive flyback over-voltage
and VPWR over-voltage.
INJOUT Output Protection Features
Over-current (IOUT-LIM)
The Injector Driver protection scheme uses three separate
protection schemes to prevent damage to the output device.
The first protection scheme is deployed when an overcurrent event occurs. In this case the current limiting circuitry
will attempt to limit the maximum current flow to the specified
ILIM-INJ value.
Short to Battery
The second protection scheme is invoked when the overcurrent fault is due to a hard short to battery. In this case, the
protection circuitry will, after the short detection filter time,
turn off the output driver. The output will not try to turn on
again until the INJIN input goes low and then high again.
A short to battery is reported as a high logic level on the
INJFLT line.
Temperature Limit (TLIM)
The third protection scheme deals with the junction
temperature of the output device. Any time the maximum
temperature limit on the output device is exceeded (TLIM), the
device will shutdown until the junction temperature falls below
this maximum temperature minus the hysteresis temperature
value. The TLIM hysteresis value is TLIM(HYST).
The maximum temperature (TLIM) protection scheme
controls the output device regardless of the state of the INJIN
input. The device is unable to be activated until the junction
temperature falls below this maximum temperature minus the
hysteresis temperature value.
An over-temperature fault is also reported as a high logic
level on the INJFLT line.
Over-voltage (VCLAMP-INJ and VPWR(OV))
The injector driver is also protected against two types of
over-voltage conditions:
When the VPWR supply exceeds the VPWR(OV) threshold,
the INJOUT output turns off and stays off until the overvoltage condition abates and the INJIN input pin toggles low
and then high again.
The output device controls inductive flyback voltages by
an active clamping network that limits the voltage across the
output device to VCLAMP-INJ volts.
33812
14
Analog Integrated Circuit Device Data
Freescale Semiconductor
FUNCTIONAL DEVICE OPERATION
IGNITION PRE-DRIVER OPERATION
INJOUT Fault Detection Features
Off State, Open Load Detection
An open load on the injector driver is detected by the
voltage level on the drain of the output device in the off state.
Internal to the device is a pull-down current source. In the
event of an open injector the drain voltage is pulled low.
When the voltage crosses the open load detection threshold,
an open load is detected. The open load fault detect
threshold is set internally and is not programmable. The open
load fault is reported as a high logic level on the INJFLT line.
On State, Shorted Load Detection
The INJOUT driver is capable of detecting a shorted
injector load (short to battery) in the on state. A shorted load
fault is reported when the drain pin voltage is greater than the
preset short threshold voltage. The shorted load fault detect
threshold is set internally and is not programmable. The
shorted load fault is reported as a high logic level on the
INJFLT line.
Clearing the INJFLT line
When the INJFLT line goes high for any of the following
reasons, while the INJIN line is high (on state):
• Short to battery
• Over-temperature
• Over-voltage
• Open load
The INJFLT line will remain high until the INJIN line goes
to a low logic level and the returns high (rising edge).
IGNITION PRE-DRIVER OPERATION
The Ignition pre-driver output is controlled by the logic
level input IGNIN. When IGNIN is high the IGNOUTH pin is
pulled high to IGNSUP. When the IGNIN pin is low, the
IGNOUTL line is pulled to ground turning off the driver
Darlington or IGBT.The IGNOUT pre-driver protects the
output device against over-current, short to battery, and
VPWR over-voltage.
output device in the off state (through a 10:1 voltage divider).
In the event of an open ignition coil the drain/collector voltage
is pulled low. When the voltage crosses the open load
detection threshold, an open load is detected. The open load
fault detect threshold is set internally and is not
programmable. An open load fault is reported as a high logic
level on the IGNFLT line.
IGNOUT OUTPUT PROTECTION FEATURES
Over-voltage (VPWR(OV))
Over-current and Short to battery (ILIM)
The Ignition pre-driver is also protected against an overvoltage condition:
When the VPWR supply exceeds the VPWR(OV) threshold,
the IGNOUTL and IGNOUTH outputs turn off and stays off
until the over-voltage condition clears and the next rising
edge of the IGNIN input pin.
The Ignition Pre-driver protection scheme senses overcurrent in the driver device by monitoring the voltage at the
IGNFB pin. Since this pin is protected by a 10:1 voltage
divider, the over-current threshold voltage is set internally to
1/10 of the voltage expected on the drain or collector of the
output device in an over-current situation. Since the Ignition
output device is external to the 33812, a short to battery is the
same as an over-current fault.
An over-current fault or short to battery is reported as a
high logic level on the IGNFLT line.
Temperature Limit (TLIM)
Since the Ignition output device is external to the 33812,
there is no over-temperature protection provided.
IGNOUT FAULT DETECTION FEATURES
Clearing the IGNFLT line
When the IGNFLT line goes high for any of the following
reasons, while the IGNIN line is high (on state):
• Short to battery
• Over-voltage
• Over-temperature of the IGNOUTL and IGNOUTH
transistors
• Open load
The IGNFLT line will remain high until the IGNIN line goes
to the low logic level and then returns high.
Off State, Open Load Detection
An open load on the ignition driver external device is
detected by the voltage level on the drain or collector of the
33812
Analog Integrated Circuit Device Data
Freescale Semiconductor
15
FUNCTIONAL DEVICE OPERATION
RELAY DRIVER OPERATION
RELAY DRIVER OPERATION
The Relay Driver (ROUT) is a low side driver that is
controlled by the logic level RIN input pin. When RIN is high,
the ROUT pin is pulled to ground, turning on an external relay
or other device. When RIN is low, the relay coil pulls the
ROUT output to VBAT, and the relay is turned off.
The ROUT driver includes off state open load detection
and it’s output device is protected against over-current, short
to battery, over-temperature, inductive flyback over-voltage
and VPWR over-voltage.
The Relay Driver is functionally and electrically identical to
the Injector driver and can be used as a second Injector
driver, for two cylinder applications, as long as maximum
power dissipation considerations are observed.
An over-temperature fault is also reported as a high logic
level on the RELFLT line.
Over-voltage (VCLAMP-RELand VPWR(OV))
ROUT PROTECTION FEATURES
The relay driver is also protected against two types of
over-voltage conditions:
When the VPWR supply exceeds the VPWR(OV) threshold,
the ROUT output turns off and stays off until the over-voltage
condition abates and the RN input pin toggles low and then
high again.
The output device is protected against inductive flyback
voltages greater than VCLAMP-REL by an active clamping
network that limits the voltage across the output device to
VCLAMP-REL volts.
Over-current (IOUT-LIM ROUT)
ROUT FAULT DETECTION FEATURES
The ROUT Driver protection scheme uses three separate
protection schemes to prevent damage to the output device.
The first protection scheme is deployed when an overcurrent event occurs. In this case, the current limiting circuitry
will attempt to limit the maximum current flow to the specified
IOUT LIM-RELvalue.
Off State, Open Load Detection
Short to Battery
The second protection scheme is invoked when the overcurrent fault is due to a hard short to battery. In this case, the
protection circuitry will, after the short detection filter time,
turn off the output driver. The output will not try to turn on
again until the RIN input goes low and then high again.
A short to battery is reported as a high logic level on the
RELFLT line.
Temperature Limit (TLIM)
The third protection scheme deals with the junction
temperature of the output device. Any time the maximum
temperature limit on the output device is exceeded (TLIM), the
device will shutdown until the junction temperature falls below
this maximum temperature minus the hysteresis temperature
value. The TLIM hysteresis value is TLIM(HYST).
The maximum temperature (TLIM) protection scheme
controls the output device regardless of the state of the RIN
input. The device is unable to be activated until the junction
temperature falls below this maximum temperature minus the
hysteresis temperature value.
An open load on the relay driver is detected by the voltage
level on the drain of the output device in the off state. Internal
to the device is a pull-down current source. In the event of an
open injector the drain voltage is pulled low. When the
voltage crosses the open load detection threshold, an open
load is detected. The open load fault detect threshold is set
internally and is not programmable. The open load fault is
reported as a high logic level on the RELFLT line.
On State, Shorted Load Detection
The ROUT driver is capable of detecting a shorted load
(short to battery) in the on state. A shorted load fault is
reported when the drain pin voltage is greater than the preset
short threshold voltage. The shorted load fault detect
threshold is set internally and is not programmable. The
shorted load fault is reported as a high logic level on the
RELFLT line.
Clearing the RELFLT line
When the RELFLT line goes high for any of the following
reasons, while the RIN line is high (on state):
• Short to battery
• Over-temperature
• Over-voltage
• Open load
The RELFLT line will remain high until the RIN line goes to
a low logic level and the returns high (rising edge).
33812
16
Analog Integrated Circuit Device Data
Freescale Semiconductor
FUNCTIONAL DEVICE OPERATION
LAMP DRIVER OPERATION
LAMP DRIVER OPERATION
The Lamp Driver is a low side driver that is controlled by
the logic level LAMPIN input pin. When LAMPIN is high, the
LAMP pin is pulled to ground, turning on an external bulb or
LED. When LAMPIN is low, the bulb or LED pulls the LAMP
output to VBAT, and the lamp is turned off.
protection circuitry will, after the short detection filter time,
turn off the output driver.
There will be an internal retry timer to try to turn on again
if the fault clears.
LAMPOUT Protection Features
Temperature Limit (TLIM)
Over-current (IOUT-LIM-LAMP)
The third protection scheme deals with the junction
temperature of the output device. Any time the maximum
temperature limit on the output device is exceeded (TLIM), the
device will shutdown until the junction temperature falls below
this maximum temperature minus the hysteresis temperature
value. The TLIM hysteresis value is TLIM(HYST).
The maximum temperature (TLIM) protection scheme
controls the output device regardless of the state of the
LAMPIN input. The device is unable to be activated until the
junction temperature falls below this maximum temperature
minus the hysteresis temperature value.
The LAMPOUT Driver protection scheme uses three
separate protection schemes to prevent damage to the
output device.
The first protection scheme is deployed when an overcurrent event occurs. In this case the current limiting circuitry
will attempt to limit the maximum current flow to the specified
IOUT LIM-LAMP value.
Short to Battery
There is no annunciation of any LAMPOUT faults.
The second protection scheme is invoked when the overcurrent fault is due to a hard short to battery. In this case, the
LAMPOUT FAULT DETECTION FEATURES
Off State, Open Load Detection
performed by the 33812 as part of the protection for the
output FET.
Since there is no way to annunciate an open load fault for the
lamp output driver, no open load fault detection is performed
by the 33812.
The LAMPOUT driver also has an over-current blanking
time of tOC(BLANK) to allow for incandescent lamp inrush
current
On State, Shorted Load Detection
Even though there is no way to annunciate a shorted load
fault for the lamp output driver, shorted fault detection is
OVER/UNDER-VOLTAGE SHUTDOWN STRATEGY
How the outputs behave after an over-voltage or undervoltage event on VPWR is listed in Table 3 below:
Table 3. Over-voltage/Under-voltage Truth Table
Output
State
Before OV
or UV
State When
Returning From
Over-voltage
State When
Returning From
Under-voltage
INJOUT
X
OFF
OFF
IGNOUT
X
OFF
OFF
ROUT
OFF
OFF
OFF
ROUT
ON
ON
OFF
LAMPOUT
OFF
OFF
OFF
LAMPOUT
ON
ON
OFF
33812
Analog Integrated Circuit Device Data
Freescale Semiconductor
17
FUNCTIONAL DEVICE OPERATION
WATCHDOG TIMER OPERATION
WATCHDOG TIMER OPERATION
The purpose of the watchdog timer is to provide a RESET
to the MCU whenever the MCU is locked up in a loop or
otherwise hung up, perhaps by executing erroneous code,
such as a HALT instruction. The watchdog timer is initialized
by a power on RESET or a RESET that occurs after a fault
such as an under-voltage event on VCC.
Whenever the watchdog timer is refreshed, it is always
reloaded with the value WDRELOAD which initially has a value
of WDMAX seconds. Whenever a RESET occurs, the
WDRELOAD value is set to WDMAX seconds and the watchdog
timer is re-loaded with this value. When the RESET pulse
returns high, and, if the WDRFSH line is low, the watchdog
timer starts counting. If the watchdog timer reaches the
WDMAX value before the next rising edge on the WDRFSH
line, the watchdog circuit will generate a RESET pulse to the
MCU and reload itself with the maximum time value of
WDRELOAD, which will have been set back to WDMAX
seconds.
In normal operation, the MCU will issue a WDRFSH pulse,
periodically, which re-loads the watchdog timer with the
WDRELOAD value and starts the counting again, thus avoiding
a watchdog timer generated RESET pulse. When the
watchdog timer is refreshed by a WDRFSH pulse, before the
watchdog timer reaches the programmed value, the refresh
will prevent a RESET pulse from being issued to the MCU.
Loading the Watchdog Timer and WDRELOAD
Aside from the RESET case, which always loads the
WDRELOAD value and the watchdog timer with the maximum
time value, WDMAX, there is an additional way that the
watchdog timer and the value WDRELOAD can be re-loaded.
During initialization, if the WDRFSH pulse width is greater
than WDLOAD, both the watchdog timer and the value
WDRELOAD will be loaded with a timer count value,
corresponding to the width of the pulse present on the
WDRFSH input. Once this value is set, no further setting of
the WDLOAD value is possible until a RESET is performed.
Once the WDRFSH input goes low, the watchdog timer will
begin incrementing again, counting up to the new value that
has been loaded into the reload register. The watchdog must
be refreshed by another pulse on the WDRFSH line, before
the watchdog timer counts up to the reload value, or else a
RESET pulse will be generated and sent to the MCU.
If the WDRFSH line is ever kept high for longer than
WDRELOAD seconds, the watchdog will issue an immediate
RESET to the MCU. Upon receiving a RESET input from the
33812, the MCU should always be programmed to bring the
WDRFSH line low to avoid being locked in a “deadly
embrace” condition where the MCU and 33812 alternate
back and forth between the RESET and Normal states.
Disabling the Watchdog Timer
If the WD_INH line is pulled high through a pull-up resistor
of 10 K or less, (i.e. not tied to ground), the watchdog timer
will be inhibited from issuing a RESET to the MCU, while the
line is held in this state. This “watchdog Inhibited” state
should only be used during software testing and development
to avoid being concerned about an inadvertent watchdog
RESET.
Watchdog Timing Diagrams
Watchdog Loaded with WDMAX
5
4
3
2
1
0
WDRFSH
Holding WDRFSH high will trigger RESET every WDMAX time
Voltage
5
4
3
2
1
0
Time
RESET
Watchdog timer
& WDRELOAD= WDMAX
RESET loads the watchdog timer and WDRELOAD with WDMAX Time
Voltage
5
4
3
2
1
0
PWA<WDLOAD
WDRFSH
Time
Refresh pulses, PWA, on WDRFSH load the Watchdog timer with the
WDRELOAD
Voltage
5
4
3
2
1
0
PWB >WDLOAD
WDRFSH
Time
During initialization, for the first WDRFSH pulse only, PWB, that is greater
than WDLOAD but less than WDMAX, the Watchdog timer and WDRELOAD
value will be loaded with a time value corresponding to the width of that
pulse, PWB. All pulses on the WDRFSH line width less than WDRELOAD, will
result in the Watchdog timer being reloaded with the time value corresponding to PWB. This programmability is only allowed once per RESET.
33812
18
Analog Integrated Circuit Device Data
Freescale Semiconductor
FUNCTIONAL DEVICE OPERATION
ISO-9141 TRANSCEIVER OPERATION
ISO-9141 TRANSCEIVER OPERATION
Bus I/O Pin (ISO9141)
This I/O pin represents the single-wire bus transmitter and
receiver.
Transmitter Characteristics
The ISO-9141 bus transmitter is a low side MOSFET with
internal over-current thermal shutdown. An internal pull-up
resistor with a serial diode structure is integrated so no
external pull-up components are required for the application
in a slave node.
Voltage can go from -18 V to 40 V without current supplied
from any other source than the pull-up resistance. The
ISO9141 pin exhibits no reverse current from the ISO9141
bus line to VPWR, even in the event of GND shift or VPWR
disconnection.
The transmitter has one slew rate (normal slew rate)
Receiver Characteristics
The receiver thresholds are ratiometric with the VPWR
supply pin.
33812
Analog Integrated Circuit Device Data
Freescale Semiconductor
19
TYPICAL APPLICATIONS
ISO-9141 TRANSCEIVER OPERATION
TYPICAL APPLICATIONS
Low Voltage Operation
During a low voltage condition (4.5 V < VPWR < 9.0 V) the
device will operate as described in the functional description,
however, certain parameters listed in the tables may be out of
specification. Fault condition annunciation is not guaranteed
below the minimum parametric operating voltage.
Low Side Injector Driver Voltage Clamp
The Injector output of the 33812 incorporates an internal
voltage clamp to provide fast turn OFF and transient
protection. Each clamp independently limits the drain-tosource voltage to VCLAMP_INJ. The total energy clamped (EJ)
can be calculated by multiplying the peak current (IPEAK)
times the clamp voltage (VCL) times the Time (τ) all divided by
2 (see Figure 5).
Characterization of the output clamp, using a repetitive
pulse method at 1.0 A, indicates the maximum energy to be
100 mJ at 125°C junction temperature per output
.
Drain-to-Source Clamp
Voltage (VCL = 50 V)
Drain Voltage
Clamp Energy
EJ=(τ x IPEAK xVCL)/2
Drain Current
(IPEAK = 0.3 A)
Drain-to-Source ON
Voltage (VDS(ON))
Time
GND
τ
Figure 5. Output Voltage Clamping
Reverse Battery and Transient Protection
The 33812 device requires external reverse battery
protection on the VPWR pin.
All outputs consist of a power MOSFET with an integral
substrate diode. During a reverse battery condition, current
will flow through the load via the substrate diode. Under this
condition load devices will turn on. If reverse battery
protection for the loads is required, a diode must be placed in
series with the load.
Good automotive engineering practices recommend the
use of transient voltage suppression on the VPWR line. A
TVS device and adequate capacitive decoupling are
necessary for a robust design.
33812
20
Analog Integrated Circuit Device Data
Freescale Semiconductor
PACKAGING
PACKAGE DIMENSIONS
PACKAGING
PACKAGE DIMENSIONS
For the most current package revision, visit www.freescale.com and perform a keyword search using the “98A” listed below.
EK SUFFIX
32-PIN
98ASA10556D
REVISION D
33812
Analog Integrated Circuit Device Data
Freescale Semiconductor
21
PACKAGING
PACKAGE DIMENSIONS
EK SUFFIX
32-PIN
98ASA10556D
REVISION D
33812
22
Analog Integrated Circuit Device Data
Freescale Semiconductor
PACKAGING
PACKAGE DIMENSIONS
EK SUFFIX
32-PIN
98ASA10556D
REVISION D
33812
Analog Integrated Circuit Device Data
Freescale Semiconductor
23
REVISION HISTORY
REVISION HISTORY
REVISION
DATE
DESCRIPTION OF CHANGES
4.0
7/2009
•
Initial release
5.0
7/2010
•
Changed Part Number from PCZ33812AEK/R2 to MCZ33812AEK/R2
33812
24
Analog Integrated Circuit Device Data
Freescale Semiconductor
How to Reach Us:
Home Page:
www.freescale.com
Web Support:
http://www.freescale.com/support
USA/Europe or Locations Not Listed:
Freescale Semiconductor, Inc.
Technical Information Center, EL516
2100 East Elliot Road
Tempe, Arizona 85284
1-800-521-6274 or +1-480-768-2130
www.freescale.com/support
Europe, Middle East, and Africa:
Freescale Halbleiter Deutschland GmbH
Technical Information Center
Schatzbogen 7
81829 Muenchen, Germany
+44 1296 380 456 (English)
+46 8 52200080 (English)
+49 89 92103 559 (German)
+33 1 69 35 48 48 (French)
www.freescale.com/support
Japan:
Freescale Semiconductor Japan Ltd.
Headquarters
ARCO Tower 15F
1-8-1, Shimo-Meguro, Meguro-ku,
Tokyo 153-0064
Japan
0120 191014 or +81 3 5437 9125
support.japan@freescale.com
Asia/Pacific:
Freescale Semiconductor China Ltd.
Exchange Building 23F
No. 118 Jianguo Road
Chaoyang District
Beijing 100022
China
+86 10 5879 8000
support.asia@freescale.com
For Literature Requests Only:
Freescale Semiconductor Literature Distribution Center
P.O. Box 5405
Denver, Colorado 80217
1-800-441-2447 or +1-303-675-2140
Fax: +1-303-675-2150
LDCForFreescaleSemiconductor@hibbertgroup.com
Information in this document is provided solely to enable system and
software implementers to use Freescale Semiconductor products. There are
no express or implied copyright licenses granted hereunder to design or
fabricate any integrated circuits or integrated circuits based on the
information in this document.
Freescale Semiconductor reserves the right to make changes without further
notice to any products herein. Freescale Semiconductor makes no warranty,
representation or guarantee regarding the suitability of its products for any
particular purpose, nor does Freescale Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation consequential or
incidental damages. “Typical” parameters that may be provided in Freescale
Semiconductor data sheets and/or specifications can and do vary in different
applications and actual performance may vary over time. All operating
parameters, including “Typicals”, must be validated for each customer
application by customer’s technical experts. Freescale Semiconductor does
not convey any license under its patent rights nor the rights of others.
Freescale Semiconductor products are not designed, intended, or authorized
for use as components in systems intended for surgical implant into the body,
or other applications intended to support or sustain life, or for any other
application in which the failure of the Freescale Semiconductor product could
create a situation where personal injury or death may occur. Should Buyer
purchase or use Freescale Semiconductor products for any such unintended
or unauthorized application, Buyer shall indemnify and hold Freescale
Semiconductor and its officers, employees, subsidiaries, affiliates, and
distributors harmless against all claims, costs, damages, and expenses, and
reasonable attorney fees arising out of, directly or indirectly, any claim of
personal injury or death associated with such unintended or unauthorized
use, even if such claim alleges that Freescale Semiconductor was negligent
regarding the design or manufacture of the part.
Freescale™ and the Freescale logo are trademarks of
Freescale Semiconductor, Inc. All other product or service names
are the property of their respective owners.
© Freescale Semiconductor, Inc., 2010. All rights reserved.
MC33812
Rev. 5.0
7/2010