TI TSB43DA42

TSB43DA42, TSB43DB42
www.ti.com
SLLS560 – FEBRUARY 2007
IEEE 1394a-2000 CONSUMER ELECTRONICS SOLUTION
FEATURES
•
•
•
•
1394 Features
– Integrated 400/200/100 Mbps 2-Port PHY
– Compliant to IEEE 1394-1995 and IEEE
1394a-2000 Standards
– Supports Bus Manager Functions and
Automatic 1394 Self-ID Verification
– Separate Asyncchronous Ack FIFOs
Decrease the Ack-Tracking Burden on
External CPU
DTLA Encryption Support for MPEG2-DVB,
DSS, and Audio Data (TSB43DA42 Only)
– Support for up to Three
Encrypted/Decrypted Streams at One Time
– Full Ake Performed With Hardware Assist
– Secure Method for Loading DTLA
Information Using Ex-CPU Interface
Audio and Video Interfaces
– Three Configurable High-Speed Data Ports
for Video Data
– Two Ports Configurable as Parallel or
Serial
– One Port Serial Only
– Two Interfaces for Audio Data (Only One
Audio Stream Supported at a Time)
– 60958 Port
– I2S-Style DAC Interface for PCM Data
(Two Channel)
– Pass-Through Modes for HSDI0 and HSDI1
– Packet Insertion – Two Insertion Buffers
per HSDI
– PID Filtering (32 PID Filters per HSDI Port)
External CPU Interfaces
– Motorola 68K-Style 16-Bit Asynchronous
Interface (Supports External DMA Only)
•
•
•
– SRAM-Like 16-Bit Asynchronous Interface
(Supports External DMA Only)
– PCI Interface (33 MHz) Compliant to PCI
Specification Version 2.2 (Supports PCI
Slave and Master Function)
Data Buffers
– 3x 4K Byte Isochronous Buffers for Audio
and Video Data
– 2x 2K Byte Asynchronous/Asynchronous
Stream Transmit Buffers
– 2x 2K Byte Asynchronous/Asynchronous
Stream Receive Buffers
– 1x 1K Byte Self-ID Buffer
– Insertion Buffers for MPEG2 Packet
Insertion (DAT, PMT, SIT, and DIT)
– Programmable Data/Space Available
Indicators for Buffer Flow Control
Hardware Packet Formatting for the Following
Standards
– IEC61883-1 (General)
– IEC61883-2 (SD-DVCR)
– IEC61883-4 (MPEG2-TS)
– IEC61883-6 (Audio and Music)
– IEC61883-7 (ITU-R BO.1294 System B) –
DSS
– Asynchronous Packets
– Asynchronous Streams
– PHY Packets (Including Self-IDs)
Additional Features
– JTAG Interface to Support Post-Assembly
Scan of Device I/O – Boundary Scan
– Unique Binding Method for Protecting
Sensitive Off-Chip Data From Ex-CPU
Interface
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
UNLESS OTHERWISE NOTED this document contains
PRODUCTION DATA information current as of publication date.
Products conform to specifications per the terms of Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2007, Texas Instruments Incorporated
TSB43DA42, TSB43DB42
www.ti.com
SLLS560 – FEBRUARY 2007
DESCRIPTION/ORDERING INFORMATION
The TSB43DA42/TSB43DB42 are high-performance consumer electronics 1394 link layer and integrated
physical layer devices designed for digitally interfacing advanced audio/video consumer electronics applications.
TSB43DA42/DB42 support formatting and transmission of IEC61883 data; including IEC61883-1 (general),
IEC61883-2 (SD-DVCR), IEC61883-4 (MPEG2-TS), IEC61883-5 (SDL-DVCR), IEC61883-6 (audio and music),
and IEC61883-7 (ITU-R BO.1294 SystemB-DSS). TSB43DA42/DB42 also supports standard 1394 data types,
such as asynchronous, asynchronous streams, and PHY packets.
The TSB43DA42 version incorporates M6 baseline per the 5C specification to support transmit and receive of up
to three MPEG2 or audio formatted transport streams with encryption and decryption. The TSB43DA42 version
also includes hardware acceleration for content key generation.
The TSB43DB42 version is identical to the TSB43DA42 without implementation of the encryption/decryption
features. The TSB43DB42 device allows customers that do not require the encryption/decryption features to
incorporate the TSB43DA42 function without becoming DTLA licensees.
The TSB43DA42/TSB43DB42 feature an integrated two-port PHY. The PHY operates at 100 Mbps, 200 Mbps,
or 400 Mbps. They follow all requirements as stated in the IEEE 1394-1995 and IEEE 1394a-2000 standards.
ORDERING INFORMATION
TA
PACKAGE
TOP-SIDE MARKING
Reel of 126
TSB43DA42AGHC
Reel of 1000
TSB43DA42AGHCR
Reel of 126
TSB43DA42GHC
Reel of 1000
TSB43DA42GHCR
Reel of 126
TSB43DA42AZHC
Reel of 1000
TSB43DA42AZHCR
LQFP – PGF
Tube of 36
TSB43DA42PGF
PREVIEW
PQFP – PDV
Tube of 40
TSB43DA42PDV
PREVIEW
BGA – GHC
–20°C to 85°C
BGA – ZHC
2
ORDERABLE PART
NUMBER
Submit Documentation Feedback
TSB43DA42A
TSB43DA42
TSB43DA42A
TSB43DA42, TSB43DB42
www.ti.com
SLLS560 – FEBRUARY 2007
APPLICATION INFORMATION
HDTV Application
SDRAM
M6
Async RX FIFO
SPDIF
1394
Bus
PHY
M6
HSDI
TSB43DA42
CPU
MPEG2 Transport
Stream
Audio DAC
(2 chnl
audio)
Speaker
Video
NTSC/PAL
Encoder
Display
MPEG2 Demux and Decode
Digital Audio Output
61937
Ex-CPU or PCI I/F
PCI or 68K Bus
Graphics
Controller
Figure 1. TSB43DA42 in HDTV Application
In the HDTV application, the TSB43DA42 receives the MPEG2 transport stream, decrypts it using the M6 cipher,
and outputs it to the application over the HSDI port. The MPEG2 demux and decode device separates the audio
and video streams, decodes them, and outputs the 2-channel audio to an audio DAC for listening and video to
an NTSC/PAL encoder for display.
The HDTV receives on-screen display (OSD) information from the video source, such as a set top box, using the
EIA775 standard. The system processor receives the OSD data through the TSB43DA42 asynchronous receive
buffer. The system graphics controller controls the OSD and mixes it with the video data for display.
The MPEG2 demux device also outputs the encoded audio in SPDIF format using the IEC61937 standard. This
stream is input to the TSB43DA42 using the SPDIF input port. The TSB43DA42 encrypts the stream using the
M6 cipher (if necessary) and transmits it over 1394 to an AV/R or other audio device.
Submit Documentation Feedback
3
TSB43DA42, TSB43DB42
www.ti.com
SLLS560 – FEBRUARY 2007
APPLICATION INFORMATION (continued)
STB Application
TSB43DA42
M6
M6
1394 Bus
PHY
MPEG2
Transport
Stream
HSDI
MPEG2
Transport Stream
from Satellite or
Cable
CPU
SPDIF
SDRAM
MPEG2 Demux
Digital Audio
61937
Async TX FIFO
Ex-CPU or PCI I/F
PCI or 68K Bus
Graphics
Controller
Figure 2. TSB43DA42 in STB Application
The set top box receives the MPEG2 transport stream from either satellite or cable sources. The MPEG2 demux
device splits the audio and video portion of the MPEG2 transport stream. The video portion, including 2-channel
audio, is input to the TSB43DA42 HSDI port. The TSB43DA42 performs any PID filtering or packet insertion,
encrypts the stream using M6 cipher, and transmits the stream over 1394.
The audio portion of the transport stream is packed into SPDIF format by the MPEG2 demux device using the
IEC61937 standard. The audio stream is input to the TSB43DA42 audio port, encrypted using M6 cipher if
necessary, and transmitted over 1394.
The set top box also creates on screen display (OSD) graphics to transmit to the sink device. The system inputs
the OSD data to the TSB43DA42 asynchronous transmit FIFO. The TSB43DA42 transmits the OSD using
asynchronous packets to the sink device.
4
Submit Documentation Feedback
PACKAGE OPTION ADDENDUM
www.ti.com
28-Feb-2007
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
Lead/Ball Finish
MSL Peak Temp (3)
TSB43DA42AGHC
ACTIVE
BGA
GHC
196
126
TBD
Call TI
Level-3-220C-168 HR
TSB43DA42AGHCR
ACTIVE
BGA
GHC
196
1000
TBD
Call TI
Level-3-220C-168 HR
TSB43DA42AZHC
ACTIVE
BGA MI
CROSTA
R
ZHC
196
126
Green (RoHS &
no Sb/Br)
SNAGCU
Level-3-260C-168 HR
TSB43DA42AZHCR
ACTIVE
BGA MI
CROSTA
R
ZHC
196
1000 Green (RoHS &
no Sb/Br)
SNAGCU
Level-3-260C-168 HR
TSB43DA42GHC
ACTIVE
BGA
GHC
196
126
TBD
Call TI
Level-3-220C-168 HR
TSB43DA42GHCR
ACTIVE
BGA
GHC
196
1000
TBD
Call TI
Level-3-220C-168 HR
TSB43DB42GHC
ACTIVE
BGA
GHC
196
126
TBD
Call TI
Level-3-220C-168 HR
TSB43DB42GHCR
ACTIVE
BGA
GHC
196
1000
TBD
Call TI
Level-3-220C-168 HR
TSB43DB42ZHC
ACTIVE
BGA MI
CROSTA
R
ZHC
196
126
Green (RoHS &
no Sb/Br)
SNAGCU
Level-3-260C-168 HR
TSB43DB42ZHCR
ACTIVE
BGA MI
CROSTA
R
ZHC
196
1000 Green (RoHS &
no Sb/Br)
SNAGCU
Level-3-260C-168 HR
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
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Addendum-Page 1
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