KIC7SZ66FU SEMICONDUCTOR SILICON MONOLITHIC CMOS DIGITAL INTEGRATED CIRCUIT TECHNICAL DATA BILATERAL SWITCH FEATURES 250MHz-3dB bandwidth. Super High Speed tPD=2.7nS(Typ.) at VCC=5V. B On Resistance ROH=3 (Typ.) at VCC=4.5V B1 (VIN=0V, IIN=30mA.) 5 1 A 2 C T.H.D : THD=0.11%(Typ.) at VCC=5V. A1 C Wide Operating Voltage Range : VCC(opr)=1.65~5.5V. 4 MAXIMUM RATINGS (Ta=25 H 3 ) CHARACTERISTIC SYMBOL RATING UNIT DC Supply Voltage VCC -0.5~7.0 V Control Input Voltage VIN -0.5~7.0 V Swith I/O Voltage VI/O -0.5~7.0 V Control Diode Current ICK -50 mA Output Diode Current IOK 50 mA DC VCC/Ground Current ICC 100 mA Power Dissipation PD 200 Storage Temperature Range Tstg -65 150 Lead Temperature (10s) TL 260 D DIM A A1 B B1 C D G H T MILLIMETERS _ 0.20 2.00 + _ 0.1 1.3 + _ 0.1 2.1 + _ 0.1 1.25 + 0.65 0.2+0.10/-0.05 0-0.1 _ 0.1 0.9 + 0.15+0.1/-0.05 T G USV mW MARKING Type Name T H Logic Diagram C X 1 I/O I I TRUTH TABEL CONTROL SWITCH FUNCTION H ON L OFF 2003. 3. 11 Revision No : 1 O/I PIN CONNECTION(TOP VIEW) IN/OUT 1 OUT/IN 2 GND 3 5 VCC 4 CONT. 1/4 KIC7SZ66FU RECOMMENDED OPERATING CONDIITIONS CHARACTERISTIC SYMBOL RATING UNIT Supply Voltage VCC 1.65 Control Input Voltage VIN 0 5.5 V Switch I/O Voltage VI/O 0 VCC V Operating Temperature Topr -40 85 Input Rise and Fall Time tr, tf V 5.5 0 10 (VCC=2.3~3.6V) 0 5 (VCC=4.5~5.5V) nS/V ELECTRICAL CHARACTERISTICS DC Characteristics TEST CONDITION CHARACTERISTIC High Level SYMBOL VIH - Input Voltage Low Level VIL - Ta=25 VIN=0V, IIN=24mA RON VIN=3V, IIN=24mA VIN=0V, IIN=8mA VIN=2.3V, IIN=8mA VIN=0V, IIN=4mA VIN=1.8V, IIN=4mA MAX. - - - - MIN. 1.65~1.95 - - - 2.3~5.5 - - - 1.65~1.95 - - - - - 2.3~5.5 - - - - - - - - - 3 7 - - - - 5 12 - - - - 7 15 - - - - 4 9 - - - - 10 20 - - - - 5 12 - - - - 13 30 - - - - 7 28 - - - - 25 60 4.5 VIN=4.5V, IIN=30mA Switch On Resistance (Note 1) TYP. (Note4) VCC(V) VIN=0V, IIN=30mA VIN=2.4V, IIN=15mA Ta=-40~85 3.0 2.3 1.8 TYP. MAX. MIN. 0.75 VCC 0.7 VCC 0.25 VCC 0.3 UNIT V VCC A V IA=-30mA, 0 VBn VCC 5.0 - 6 - - - - IA=-24mA, 0 VBn VCC 3.3 - 12 - - - - IA=-8mA, 0 VBn VCC 2.5 - 28 - - - - IA=-4mA, 0 VBn VCC 1.8 - 125 - - - - =5.5V 0~5.5 - - - - 0.05 1.0 A =VCC 1.65~5.5 - - - - 0.05 10.0 A 1.65~5.5 - - - - 10 A On Resistance Flatness (Note 1) (Note 2) (Note 3) Rflat Input Leakage Current IIN 0 VIN Power Off Leakage Current IOFF 0 A,B Quiescent Supply Current ICC VIN=VCC or GND IOUT=0 0.05 Note1 : Measured by the voltage drop between A and B pins at the indicated current through the switch. On Resistance is determined by the lower of the voltages on the two (A or B) pins. Note2 : Parameter is characterized but not tested in production. Note3 : Flatness is defined as the difference between the maximum and minimum value of On Resistance over the specified range of conditions. Note4 : All typical values are at the specified VCC, and Ta=25 2003. 3. 11 Revision No : 1 2/4 KIC7SZ66FU AC Characteristics CHARACTERISTIC Propagation Delay Bus to Bus (Figures 1,2) Output Enable Time (Figures 1,2) Output Disable Time (Figures 1,2) Charge Injection (Figures 3) tPHL tPLH tPZL tPZH tPLZ tPHZ Q Off lsolation (Figures 4) OIRR Ta=-40 ~85 , CL=50pF, RU=RD=500 TEST CONDITION SYMBOL UNIT VCC(V) MIN. TYP. MAX. 1.65~1.95 - - 4.3 2.3~2.7 - - 1.2 3.0~3.6 - - 0.8 4.5~5.5 - - 0.3 1.65~1.95 1.5 7.0 14.2 2.3~2.7 1.5 3.3 7.0 3.0~3.6 1.5 2.4 5.5 4.5~5.5 1.5 2.0 4.5 1.65~1.95 1.5 9.2 18.2 2.3~2.7 1.5 5.3 9.0 3.0~3.6 1.5 4.0 7.0 4.5~5.5 1.5 2.7 5.0 CL=0.1nF, VGEN=0V, RGEN=0 , f=1MHz 1.65~5.5 - 0.05 - pC RL=50 , CL=5pF, f=10MHz 1.65~5.5 - -50 - dB 1.65~5.5 - >250 - MHz 5 - 0.011 - % VIN=OPEN VIN=2 VCC for tPZL VIN=0V for tPZH VIN=2 VCC for tPLZ VIN=0V for tPHZ -3dB Bandwidth (Figures 5) BW RL=50 Total Harmonic Distortion THD RL=600 , 0.5VP-P f=600Hz~20kHz ns ns ns Capacitance Symbol Parameter Typ. Max. Units Conditions CIN Control Pin Input Capacitance 2 pF VCC=0V CI/O Input/Output Capacitance 6 pF VCC=5.0V 2003. 3. 11 Revision No : 1 3/4 KIC7SZ66FU AC Loading and Waveforms VI RU SWITCH INPUT ENABLE INPUT A B SWITCH OUTPUT CL DE RD Input driven by 50Ω source terminated in 50Ω CL includes load and stray capacitance. Input PRR=1.0MHz ; t w =500ns FIGURE 1. AC Test Circuit t r =2.5ns t r =2.5ns t f =2.5ns 90% 50% 10% SWITCH INPUT tw VCC VCC 90% 50% ENABLE INPUT 10% GND t PLZ t PZL GND t PHL t PLH t f =2.5ns VTRI 50% OUTPUT VOL +0.3V VOH OUTPUT 50% t PZH 50% VOL t PHZ VOH VOL VOH - 0.3V 50% OUTPUT VTRI FIGURE 2. AC Waveforms RGEN V GEN BN VOUT A SE1 RL 1MΩ CL 0.1nF LOGIC INPUT OFF ON OFF V OUT VOUT Logic Input Q=( V OUT )(C L ) FIGURE 3. Charge Injection Test 10nF 10nF A VCC 50Ω SE LOGIC INPUT =VCC SIGNAL GENERATOR 0dBm VCC A B 50Ω B Analyzer GND 50Ω FIGURE 4. Off lsolation 2003. 3. 11 SE LOGIC INPUT =VCC Revision No : 1 GND FIGURE 5. Bandwidth 4/4