DATA SHEET MOS FIELD EFFECT TRANSISTOR µ PA1721 SWITCHING N-CHANNEL POWER MOS FET INDUSTRIAL USE PACKAGE DRAWING (Unit : mm) DESCRIPTION The µPA1721 is N-Channel MOS Field Effect 8 Transistor designed for DC/DC converters and power 5 management applications of notebook computers. 1,2,3 ; Source ; Gate 4 5,6,7,8 ; Drain FEATURES • Low on-resistance RDS(on)1 = 10.5 mΩ MAX. (VGS = 10 V, ID = 5.0 A) 0.05 MIN. • Built-in G-S protection diode • Small and surface mount package (Power SOP8) 4.4 5.37 MAX. 0.8 +0.10 –0.05 • Low Ciss: Ciss = 2200 pF TYP. 6.0 ±0.3 4 0.15 1.8 MAX. RDS(on)3 = 17.0 mΩ MAX. (VGS = 4.0 V, ID = 5.0 A) 1.44 1 RDS(on)2 = 14.0 mΩ MAX. (VGS = 4.5 V, ID = 5.0 A) 0.5 ±0.2 0.10 1.27 0.78 MAX. 0.40 +0.10 –0.05 0.12 M ORDERING INFORMATION PART NUMBER PACKAGE µPA1721G Power SOP8 ABSOLUTE MAXIMUM RATINGS (TA = 25°C, All terminals are connected.) Drain to Source Voltage (VGS = 0 V) VDSS 30 V Gate to Source Voltage (VDS = 0 V) VGSS ±20 V Drain Current (DC) ID(DC) ±10 A ID(pulse) ±40 A PT 2.0 W Channel Temperature Tch 150 °C Storage Temperature Tstg –55 to +150 °C Drain Current (pulse) Note1 Total Power Dissipation (TA = 25°C) Note2 EQUIVALENT CIRCUIT Drain Body Diode Gate Gate Protection Diode Source Notes 1. PW ≤ 10 µs, Duty Cycle ≤ 1 % • 2 2. Mounted on ceramic substrate of 1200 mm x 2.2 mm Remark The diode connected between the gate and source of the transistor serves as a protector against ESD. When this device actually used, an additional protection circuit is externally required if a voltage exceeding the rated voltage may be applied to this device. The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all devices/types available in every country. Please check with local NEC representative for availability and additional information. Document No. G13889EJ1V0DS00 (1st edition) Date Published November 1999 NS CP(K) Printed in Japan The mark ★ shows major revised points. © 1998,1999 µ PA1721 ELECTRICAL CHARACTERISTICS (TA = 25 °C, All terminals are connected.) CHARACTERISTICS SYMBOL Drain to Source On-state Resistance TEST CONDITIONS MIN. TYP. MAX. UNIT RDS(on)1 VGS = 10 V, ID = 5.0 A 8.0 10.5 mΩ RDS(on)2 VGS = 4.5 V, ID = 5.0 A 10.0 14.0 mΩ RDS(on)3 VGS = 4.0 V, ID = 5.0 A 12.0 17.0 mΩ VGS(off) VDS = 10 V, ID = 1 mA 1.5 2.0 2.5 V Forward Transfer Admittance | yfs | VDS = 10 V, ID = 5.0 A 7.0 14.0 Drain Leakage Current IDSS VDS = 30 V, VGS = 0 V 10 µA Gate to Source Leakage Current IGSS VGS = ±20 V, VDS = 0 V ±10 µA Input Capacitance Ciss VDS = 10 V 2200 pF Output Capacitance Coss VGS = 0 V 710 pF Reverse Transfer Capacitance Crss f = 1 MHz 270 pF Turn-on Delay Time td(on) ID = 5.0 A 30 ns VGS(on) = 10 V 90 ns td(off) VDD = 15 V 90 ns tf RG = 10 Ω 50 ns Total Gate Charge QG ID = 10 A 39 nC Gate to Source Charge QGS VDD = 24 V 6.3 nC Gate to Drain Charge QGD VGS = 10 V 10.0 nC VF(S-D) IF = 10 A, VGS = 0 V 0.8 V Reverse Recovery Time trr IF = 10 A, VGS = 0 V 40 ns Reverse Recovery Charge Qrr di/dt = 100 A/ µs 50 nC Gate to Source Cut-off Voltage Rise Time tr Turn-off Delay Time Fall Time Body Diode Forward Voltage TEST CIRCUIT 1 SWITCHING TIME TEST CIRCUIT 2 GATE CHARGE D.U.T. D.U.T. RL RG RG = 10 Ω PG. VGS VGS Wave Form 0 PG. VDD ID 90 % 90 % 10 % 0 10 % Wave Form τ = 1µ s Duty Cycle ≤ 1 % tr td(on) ton IG = 2 mA RL 50 Ω VDD 90 % ID τ 2 VGS(on) 10 % ID VGS 0 S td(off) tf toff Data Sheet G13889EJ1V0DS00 µ PA1721 TYPICAL CHARACTERISTICS (TA = 25 °C) DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA TOTAL POWER DISSIPATION vs. AMBIENT TEMPERATURE PT - Total Power Dissipation - W dT - Percentage of Rated Power - % 2.8 100 80 60 40 20 0 20 40 60 80 2.0 1.6 1.2 0.8 0.4 0 100 120 140 160 Mounted on ceramic substrate of 1200mm 2 ×2.2mm 2.4 TA - Ambient Temperature - ˚C 20 40 60 80 100 120 140 160 TA - Ambient Temperature - ˚C FORWARD BIAS SAFE OPERATING AREA 100 100 µs RD (V S(on) G S= Lim 10 ite V) d 10 Note 1m ID(pulse) s 10 Mounted on ceramicsubstrate of 1200 mm × 2.2 mm 2 m s ID(DC) 10 0m s iss rD we Po 1 n io at ip d ite m Li TA = 25 ˚C Single Pulse 0.1 0.1 1 10 0.01 VDS - Drain to Source Voltage - V rth(t) - Transient Thermal Resistance - ˚C/W ID - Drain Current - A • 100 TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH 1000 Rth(ch-A) = 62.5˚C/W 100 10 1 Mounted on ceramic substrate of 1200 mm2 to 2.2 mm Single Pulse, TA = 25 ˚C Channel to Ambient 0.1 0.01 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 PW - Pulse Width - s Data Sheet G13889EJ1V0DS00 3 µ PA1721 DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE FORWARD TRANSFER CHARACTERISTICS 100 Pulsed Pulsed ID - Drain Current - A ID - Drain Current - A 50 TA = 150˚C 75˚C 25˚C −25˚C 10 1 4.5 V VGS = 10 V 40 4.0 V 30 20 10 0.1 0 VDS = 10 V 3 4 2 1 0.0 100 10 TA = −25˚C 25˚C 75˚C 150˚C VDS =10 V Pulsed 10 100 1 0.1 RDS(on) - Drain to Source On-state Resistance - mΩ |yfs| - Forward Transfer Admittance - S FORWARD TRANSFER ADMITTANCE vs. DRAIN CURRENT 0.1 0.01 DRAIN TO SOURCE ON-STATE RESISTANCE vs. GATE TO SOURCE VOLTAGE 100 90 80 ID = 5 A 70 ID = 10 A 60 50 40 30 20 10 0 5 0 4 DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT Pulsed 36 32 28 24 20 VGS = 4.0 V 16 12 4.5 V 8 10 V 4 0 0.1 1 10 10 15 VGS - Gate to Source Voltage - V 100 VGS(off) - Gate to Source Cut-off Voltage - V RDS(on) - Drain to Source On-state Resistance - mΩ ID- Drain Current - A 40 0.8 0.6 VDS - Drain to Source Voltage - V VGS - Gate to Source Voltage - V 1 0.4 0.2 GATE TO SOURCE CUT-OFF VOLTAGE vs. CHANNEL TEMPERATURE VDS = 10 V ID = 1 mA 4 3 2 1 0 −100 ID - Drain Current - A −50 0 50 100 Tch - Channel Temperature - ˚C Data Sheet G13889EJ1V0DS00 150 DRAIN TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE 20 VGS = 4.0 V 16 4.5 V 14 12 10 V 10 8 6 4 2 ID = 5 A 0 −50 50 0 100 10 1 0.8 1.0 1.2 1 10 30 12 10 VGS 8 6 10 4 2 20 35 40 10 100 45 VGS - Gate to Source Voltage - V 14 VDS 10 15 1 ID - Drain Current - A DYNAMIC INPUT/OUTPUT CHARACTERISTICS 40 16 VDD = 24 V 15 V 6V di/dt = 100A /µs VGS = 0 V 10 1 0.1 100 1.4 100 VDS - Drain to Source Voltage - V VDS - Drain to Source Voltage - V 0.6 1 000 Crss 100 5 0.4 REVERSE RECOVERY TIME vs. DRAIN CURRENT Coss 0 0.2 CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE Ciss 0 0V VSD - Source to Drain Voltage - V 1000 20 VGS = 10 V Tch - Channel Temperature - ˚C VGS = 0 V f = 1 MHz 10 0.1 100 0.1 0 150 10000 Ciss, Coss, Crss - Capacitance - pF Pulsed ISD - Diode Forward Current - A 18 SOURCE TO DRAIN DIODE FORWARD VOLTAGE trr - Reverse Recovery Diode - ns RDS(on) - Drain to Source On-state Resistance - mΩ µ PA1721 0 50 QG - Gate Charge - nC Data Sheet G13889EJ1V0DS00 5 µ PA1721 [MEMO] 6 Data Sheet G13889EJ1V0DS00 µ PA1721 [MEMO] Data Sheet G13889EJ1V0DS00 7 µ PA1721 • The information in this document is subject to change without notice. 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