DATA SHEET MOS FIELD EFFECT TRANSISTOR µ PA1812 P-CHANNEL MOS FIELD EFFECT TRANSISTOR FOR SWITCHING PACKAGE DRAWING (Unit : mm) DESCRIPTION The µPA1812 is a switching device which can be driven directly by a 4.0-V power source. The µPA1812 features a low on-state resistance and excellent switching characteristics, and is suitable for applications such as power switch of portable machine and so on. 8 5 1, 5, 8 : Drain 2, 3, 6, 7: Source 4 : Gate 1.2 MAX. 1.0±0.05 0.25 FEATURES • 3° +5° –3° • Can be driven by a 4.0-V power source • Low on-state resistance RDS(on)1 = 39 mΩ MAX. (VGS = –10 V, ID = –2.5 A) RDS(on)2 = 63 mΩ MAX. (VGS = –4.5 V, ID = –2.5 A) RDS(on)3 = 69 mΩ MAX. (VGS = –4.0 V, ID = –2.5 A) 1 6.4 ±0.2 µPA1812GR-9JG Power TSSOP8 0.65 0.27 +0.03 –0.08 VDSS –30 V Gate to Source Voltage VGSS –20/+5 V Drain Current (DC) ID(DC) ±5.0 A ID(pulse) ±20 A PT 2.0 W Channel Temperature Tch 150 °C Storage Temperature Tstg –55 to +150 °C Total Power Dissipation Note2 0.1 0.10 M EQUIVALENT CIRCUIT Drain to Source Voltage Drain Current (pulse) 1.0 ±0.2 0.8 MAX. ABSOLUTE MAXIMUM RATINGS (TA = 25°C) Note1 4.4 ±0.1 0.145 ±0.055 ORDERING INFORMATION PACKAGE 0.6 +0.15 –0.1 4 3.15 ±0.15 3.0 ±0.1 PART NUMBER 0.5 0.1±0.05 Drain Body Diode Gate Gate Protection Diode Source Notes 1. PW ≤ 10 µs, Duty Cycle ≤ 1 % 2 2. Mounted on ceramic substrate of 5000 mm x 1.1 mm Remark The diode connected between the gate and source of the transistor serves as a protector against ESD. When this device actually used, an additional protection circuit is externally required if a voltage exceeding the rated voltage may be applied to this device. The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all devices/types available in every country. Please check with local NEC representative for availability and additional information. Document No. D12967EJ1V0DS00 (1st edition) Date Published October 1999 NS CP(K) Printed in Japan The mark ★ shows major revised points. © 1997, 1999 µ PA1812 • ELECTRICAL CHARACTERISTICS (TA = 25 °C) CHARACTERISTICS SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Zero Gate Voltage Drain Current IDSS VDS = –30 V, VGS = 0 V –10 µA Gate Leakage Current IGSS VGS = ±20 V, VDS = 0 V ±10 µA –2.5 V Gate Cut-off Voltage Forward Transfer Admittance Drain to Source On-state Resistance VGS(off) VDS = –10 V, ID = –1 mA –1.0 –1.6 | yfs | VDS = –10 V, ID = –2.5 A 1 8 RDS(on)1 VGS = –10 V, ID = –2.5 A 29 39 mΩ RDS(on)2 VGS = –4.5 V, ID = –2.5 A 46 63 mΩ RDS(on)3 VGS = –4.0 V, ID = –2.5 A 52 69 mΩ S Input Capacitance Ciss VDS = –10 V 1500 pF Output Capacitance Coss VGS = 0 V 550 pF Reverse Transfer Capacitance Crss f = 1 MHz 270 pF Turn-on Delay Time td(on) VDD = –10 V 30 ns tr ID = –2.5 A 160 ns VGS(on) = –10 V 110 ns RG = 10 Ω 80 ns Rise Time Turn-off Delay Time td(off) Fall Time tf Total Gate Charge QG VDS = –24 V 31 nC Gate to Source Charge QGS ID = –5.0 A 4 nC Gate to Drain Charge QGD VGS = –10 V 8 nC 0.76 V Diode Forward Voltage VF(S-D) IF = 5.0 A, VGS = 0 V TEST CIRCUIT 1 SWITCHING TIME TEST CIRCUIT 2 GATE CHARGE D.U.T. D.U.T. RL RG RG = 10 Ω PG. VGS VGS Wave Form 0 PG. 90 % 90 % ID VGS 0 ID 10 % 0 10 % Wave Form τ τ = 1µ s Duty Cycle ≤ 1 % tr td(on) ton RL 50 Ω VDD 90 % VDD ID 2 VGS(on) 10 % IG = 2 mA td(off) tf toff Data Sheet D12967EJ1V0DS00 µ PA1812 TYPICAL CHARACTERISTICS (TA = 25 °C) DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA FORWARD BIAS SAFE OPERATING AREA −100 PW 80 60 40 d ite V) Lim 4.5 n) S(o RD GS = V (@ −10 ID - Drain Current - A dT - Derating Factor - % 100 0 30 60 120 90 TA - Ambient Temperature - ˚C 150 ms 10 ms 10 0m s TA = 25˚C Single Pulse Mounted on Ceramic Substrate of 5000 mm2 x 1.1 mm −0.01 −0.1 −10.0 −1.0 −100.0 VDS - Drain to Source Voltage - V FORWARD TRANSFER CHARACTERISTICS −100 Pulsed VGS = −10 V VDS = −10 V −10 −15 ID - Drain Current - A ID - Drain Current - A ID(DC) =1 DC −0.1 DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE −20 ID(pulse) −1 20 −4.5 V −10 −4.0 V −5 −1 TA = 125˚C 75˚C −0.1 TA = 25˚C −25˚C −0.01 −0.001 0 −0.2 −0.4 −0.6 −0.8 −1.0 −0.0001 −1.0 0 VDS - Drain to Source Voltage - V VDS = −10 V ID = −1 mA −1.8 −1.6 −1.4 −1.2 −1.0 −50 0 50 100 Tch - Channel Temperature - ˚C −3.0 −4.0 150 FORWARD TRANSFER ADMITTANCE vs. DRAIN CURRENT 100 | yfs | - Forward Transfer Admittance - S −2.0 −2.0 VGS - Gate to Source Voltage - V GATE TO SOURCE CUT-OFF VOLTAGE vs. CHANNEL TEMPERATURE VGS(off) - Gate to Source Cut-off Voltage - V • VDS = −10 V 10 TA = −25 ˚C 25 ˚C 75 ˚C 125 ˚C 1 0.1 −0.1 −1 −10 −100 ID - Drain Current - A Data Sheet D12967EJ1V0DS00 3 VGS = −4.0 V 80 TA = 125˚C 60 75˚C 25˚C −25˚C 40 20 −0.1 −1 −10 ID - Drain Current - A −100 DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT 50 VGS = −10 V TA = 125˚C 40 75˚C 30 25˚C −25˚C 20 10 −0.1 −1 −10 ID - Drain Current - A −100 RDS(on) - Drain to Source On-state Resistance - mΩ 100 DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT 80 VGS = −4.5 V TA = 125˚C 60 75˚C 25˚C 40 −25˚C 20 −0.1 RDS (on) - Drain to Source On-state Resistance - mΩ DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT ID = −2.5 A 80 60 40 20 0 −5 −10 −15 80 ID = −2.5 A VGS = −4.0 V 60 −4.5 V 40 −10 V 20 0 −50 0 50 100 150 CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE 10000 −20 −25 f = 1 MHz VGS = 0 V Ciss 1000 Coss Crss 100 10 −1 VGS - Gate to Source Voltage - V 4 −100 DRAIN TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE DRAIN TO SOURCE ON-STATE RESISTANCE vs. GATE TO SOURCE VOLTAGE 100 −1 −10 ID - Drain Current - A Tch - Channel Temperature - ˚C Ciss, Coss, Crss - Capacitance - pF RDS (on) - Drain to Source On-state Resistance - mΩ RDS(on) - Drain to Source On-state Resistance - mΩ RDS(on) - Drain to Source On-state Resistance - mΩ µ PA1812 −10 VDS - Drain to Source Voltage - V Data Sheet D12967EJ1V0DS00 −100 µ PA1812 SOURCE TO DRAIN DIODE FORWARD VOLTAGE 100 SWITCHING CHARACTERISTICS VDD = −10 V VGS(on) = −4 V RG = 10 Ω IF - Source to Drain Current - A td(on), tr, td(off), tf - Switchig Time - ns 1000 tr tf td(off) 100 td(on) 10 −0.1 −1 10 1 0.1 0.01 0.001 0.0001 0.4 −10 ID - Drain Current - A 0.8 1 DYNAMIC INPUT CHARACTERISTICS ID = −5 A VDD = −24 V −8 −6 −4 −2 5 0 10 15 20 25 30 35 Qg - Gate Charge - nC TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH 1000 rth(ch-A) - Transient Thermal Resistance - ˚C/W VGS - Gate to Source Voltage - V −10 0.6 VF(S-D) - Source to Drain Voltage - V Mounted on ceramic substrate of 50 cm2 x 1.1 mm Single Pulse 100 62.5˚C/W 10 1 0.1 0.001 0.01 0.1 1 10 100 1000 PW - Pulse Width - s Data Sheet D12967EJ1V0DS00 5 µ PA1812 [MEMO] 6 Data Sheet D12967EJ1V0DS00 µ PA1812 [MEMO] Data Sheet D12967EJ1V0DS00 7 µ PA1812 • The information in this document is subject to change without notice. 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