NEC UPA2707GR-E1

DATA SHEET
MOS FIELD EFFECT TRANSISTOR
µ PA2707GR
SWITCHING
N-CHANNEL POWER MOS FET
DESCRIPTION
ORDERING INFORMATION
The µ PA2707GR is N-channel MOS Field Effect
PART NUMBER
Transistor designed for DC/DC converter and power
PACKAGE
µ PA2707GR-E1
management applications of notebook computer.
Power SOP8
µ PA2707GR-E1-A
FEATURES
Note
µ PA2707GR-E2
• Low on-state resistance
Power SOP8
µ PA2707GR-E2-A
RDS(on)1 = 4.3 mΩ MAX. (VGS = 10 V, ID = 9.0 A)
Power SOP8
Note
Power SOP8
Note Pb-free (This product does not contain Pb in
RDS(on)2 = 5.6 mΩ MAX. (VGS = 4.5 V, ID = 9.0 A)
external electrode and other parts.)
• Low Ciss: Ciss = 6600 pF TYP. (VDS = 10 V, VGS = 0 V)
• Small and surface mount package (Power SOP8)
ABSOLUTE MAXIMUM RATINGS (TA = 25°C, All terminals are connected.)
Drain to Source Voltage (VGS = 0 V)
VDSS
30
V
Gate to Source Voltage (VDS = 0 V)
VGSS
±20
V
Drain Current (DC)
ID(DC)
±19
A
ID(pulse)
±76
A
PT1
1.1
W
PT2
2.5
W
Tch
150
°C
Drain Current (pulse)
Note1
Total Power Dissipation
Note2
Total Power Dissipation (PW = 10 sec)
Channel Temperature
Note2
Tstg
−55 to +150
°C
Single Avalanche Current
Note3
IAS
19
A
Single Avalanche Energy
Note3
EAS
36
mJ
Storage Temperature
Notes 1. PW ≤ 10 µs, Duty Cycle ≤ 1%
2. Mounted on glass epoxy board of 1 inch x 1 inch x 0.8 mm
3. Starting Tch = 25°C, VDD = 15 V, RG = 25 Ω, L = 100 µH, VGS = 20 → 0 V
THERMAL RESISTANCE
Channel to Ambient
Note
Channel to Drain Lead
Note
Rth(ch-A)
114
°C/W
Rth(ch-L)
22
°C/W
Note Mounted on glass epoxy board of 1 inch x 1 inch x 0.8 mm
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No. G17032EJ1V0DS00 (1st edition)
Date Published June 2005 NS CP(K)
Printed in Japan
2004
µ PA2707GR
ELECTRICAL CHARACTERISTICS (TA = 25°C, All terminals are connected.)
CHARACTERISTICS
SYMBOL
TEST CONDITIONS
Zero Gate Voltage Drain Current
IDSS
VDS = 30 V, VGS = 0 V
Gate Leakage Current
IGSS
VGS = ±20 V, VDS = 0 V
Gate Cut-off Voltage
Forward Transfer Admittance
Note
Drain to Source On-state Resistance
Note
MIN.
TYP.
MAX.
UNIT
10
µA
±100
nA
2.5
V
VGS(off)
VDS = 10 V, ID = 1 mA
1.0
| yfs |
VDS = 10 V, ID = 10 A
12
RDS(on)1
VGS = 10 V, ID = 10 A
3.3
4.3
mΩ
RDS(on)2
VGS = 4.5 V, ID = 10 A
4.1
5.6
mΩ
S
Input Capacitance
Ciss
VDS = 10 V
6600
pF
Output Capacitance
Coss
VGS = 0 V
970
pF
Reverse Transfer Capacitance
Crss
f = 1 MHz
530
pF
Turn-on Delay Time
td(on)
VDD = 15 V, ID = 10 A
24
ns
Rise Time
Turn-off Delay Time
tr
VGS = 10 V
29
ns
td(off)
RG = 10 Ω
130
ns
39
ns
Fall Time
tf
Total Gate Charge
QG
VDD = 15 V
52
nC
Gate to Source Charge
QGS
VGS = 5 V
16
nC
QGD
ID = 19 A
18
nC
VF(S-D)
IF = 19 A, VGS = 0 V
0.8
V
Reverse Recovery Time
trr
IF = 19 A, VGS = 0 V
42
ns
Reverse Recovery Charge
Qrr
di/dt = 100 A/µs
41
nC
Gate Resistance
RG
f = 1 MHz
1.2
Ω
Gate to Drain Charge
Body Diode Forward Voltage
Note
Note Pulsed
TEST CIRCUIT 1 AVALANCHE CAPABILITY
D.U.T.
RG = 25 Ω
D.U.T.
L
50 Ω
PG.
VGS = 20 → 0 V
TEST CIRCUIT 2 SWITCHING TIME
RL
RG
PG.
VDD
VGS
VGS
Wave Form
0
VGS
10%
90%
VDD
VDS
90%
BVDSS
IAS
VDS
ID
VDS
τ
τ = 1 µs
Duty Cycle ≤ 1%
TEST CIRCUIT 3 GATE CHARGE
D.U.T.
IG = 2 mA
PG.
2
50 Ω
0
10%
10%
tr
td(off)
Wave Form
VDD
Starting Tch
90%
VDS
VGS
0
RL
VDD
Data Sheet G17032EJ1V0DS
td(on)
ton
tf
toff
µ PA2707GR
TYPICAL CHARACTERISTICS (TA = 25°C)
FORWARD BIAS SAFE OPERATING AREA
DERATING FACTOR OF FORWARD BIAS
SAFE OPERATING AREA
100
100
60
40
1
0.1
20
40
60
80
100
0.01
0.01
120 140 160
TA - Ambient Temperature - ˚C
=
10
0
µs
1 ms
Po
we
r
Di
ss
ip
10 ms
at
io
n
Li
m
ite
d
100 ms
TA = 25°C
Single pulse
Mounted on glass epoxy board of
1 inch x 1 inch x 0.8 mm
20
0
ID(DC)
d
ite )
im 0 V
L
1
)
=
on
S
S(
RD t VG
(a
10
80
0
PW
ID(pulse)
ID - Drain Current - A
dT - Percentage of Rated Power - %
120
0.1
1
10 s
10
100
VDS - Drain to Source Voltage - V
TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH
rth(t) - Transient Thermal Resistance - °C/W
1000
Rth(ch-A) = 114ºC/W
100
10
1
0.1
Single pulse
Mounted on galass epoxy board of 1 inch x 1 inch x 0.8 mm, TA = 25 ºC
0.01
100 µ
1m
10 m
100 m
1
PW - Pulse Width - s
10
DRAIN CURRENT vs.
DRAIN TO SOURCE VOLTAGE
100
1000
FORWARD TRANSFER CHARACTERISTICS
100
80
VGS = 10 V
ID - Drain Current - A
ID - Drain Current - A
Tch = −55°C
25°C
75°C
150°C
10
60
4.5 V
40
20
Pulsed
0
0
0.1
0.2
0.3
0.4
1
0.1
Pulsed
VDS = 10 V
0.01
0.5
0
1
2
3
4
5
VGS - Gate to Source Voltage - V
VDS - Drain to Source Voltage - V
Data Sheet G17032EJ1V0DS
3
µ PA2707GR
GATE CUT-OFF VOLTAGE vs.
CHANNEL TEMPERATURE
FORWARD TRANSFER ADMITTANCE vs.
DRAIN CURRENT
100
1
VDS = 10 V
Pulsed
0
RDS(on) - Drain to Source On-state Resistance - mΩ
-50
0
50
100
150
| yfs | - Forward Transfer Admittance - S
2
Tch = −55°C
25°C
75°C
150°C
10
1
V DS = 10 V
Pulsed
0.1
0.01
10
100
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
DRAIN CURRENT
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
GATE TO SOURCE VOLTAGE
15
Pulsed
10
VGS = 4.5 V
5
10 V
0
0.1
1
10
100
15
ID = 10 A
Pulsed
10
5
0
0
5
10
15
20
VGS - Gate to Source Voltage - V
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
CHANNEL TEMPERATURE
CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE
10
10000
Ciss
8
Ciss, Coss, Crss - Capacitance - pF
RDS(on) - Drain to Source On-state Resistance - mΩ
1
ID - Drain Current - A
ID - Drain Current - A
6
VGS = 4.5 V
4
10 V
2
ID = 10 A
Pulsed
1000
Coss
Crss
100
0
VGS = 0 V
f = 1 MHz
10
-50
0
50
100
150
Tch - Channel Temperature - °C
4
0.1
Tch - Channel Temperature - °C
RDS(on) - Drain to Source On-state Resistance - mΩ
VGS(off) - Gate Cut-off Voltage - V
3
0.1
1
10
VDS - Drain to Source Voltage - V
Data Sheet G17032EJ1V0DS
100
µ PA2707GR
SWITCHING CHARACTERISTICS
DYNAMIC INPUT/OUTPUT CHARACTERISTICS
6
td(of f)
100
tf
td(on)
10
tr
V DD = 15 V
V GS = 10 V
RG = 10 Ω
1
0.1
1
10
100
5
VDD = 24 V
15 V
6V
20
10
2
VDS
0
0
10
20
30
40
50
QG - Gate Charge - nC
REVERSE RECOVERY TIME vs.
DIODE FORWARD CURRENT
100
1000
V GS = 10 V
trr - Reverse Recovery Time - ns
IF - Diode Forward Current - A
1
0
SOURCE TO DRAIN DIODE FORWARD VOLTAGE
10
0V
1
0.1
Pulsed
0.01
0
0.2
0.4
0.6
0.8
1
100
10
di/dt = 100 A/µ s
VGS = 0 V
1
1.2
0.1
1
10
SINGLE AVALANCHE CURRENT vs.
INDUCTIVE LOAD
SINGLE AVALANCHE ENERGY
DERATING FACTOR
100
120
VDD = 15 V
RG = 25 Ω
VGS = 20 → 0 V
IAS ≤ 19 A
10
EAS = 36 mJ
VDD = 15 V
RG = 25 Ω
VGS = 20 → 0 V
Starting Tch = 25°C
Energy Derating Factor - %
100
IAS = 19 A
0.1
0.01
100
IF - Diode Forward Current - A
VF(S-D) - Source to Drain Voltage - V
IAS - Single Avalanche Current - A
4
VGS
3
ID - Drain Current - A
1
VGS - Gate to Source Voltage - V
VDS - Drain to Source Voltage - V
td(on), tr, td(off), tf - Switching Time - ns
1000
30
80
60
40
20
0
0.1
1
10
25
50
75
100
125
150
Starting Tch - Starting Channel Temperature - °C
L - Inductive Load - mH
Data Sheet G17032EJ1V0DS
5
µ PA2707GR
PACKAGE DRAWING (Unit: mm)
Power SOP8
8
5
1, 2, 3
; Source
4
; Gate
5, 6, 7, 8 ; Drain
6.0 ±0.3
4
4.4
5.37 MAX.
0.8
0.15
+0.10
–0.05
1.44
0.05 MIN.
1.8 MAX.
1
1.27 0.78 MAX.
0.40
+0.10
–0.05
0.5 ±0.2
0.10
0.12 M
EQUIVALENT CIRCUIT
Drain
Body
Diode
Gate
Source
Remark Strong electric field, when exposed to this device, can cause destruction of the gate oxide and ultimately
degrade the device operation. Steps must be taken to stop generation of static electricity as much as
possible, and quickly dissipate it once, when it has occurred.
6
Data Sheet G17032EJ1V0DS
µ PA2707GR
• The information in this document is current as of June, 2005. The information is subject to change
without notice. For actual design-in, refer to the latest publications of NEC Electronics data sheets or
data books, etc., for the most up-to-date specifications of NEC Electronics products. Not all
products and/or types are available in every country. Please check with an NEC Electronics sales
representative for availability and additional information.
• No part of this document may be copied or reproduced in any form or by any means without the prior
written consent of NEC Electronics. NEC Electronics assumes no responsibility for any errors that may
appear in this document.
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M8E 02. 11-1