DATA SHEET MOS FIELD EFFECT TRANSISTOR 2SK4070 SWITCHING N-CHANNEL POWER MOS FET DESCRIPTION The 2SK4070 is N-channel MOS FET device that features a low gate charge and excellent switching characteristics, and designed for high voltage applications such as switching power supply, AC adapter. FEATURES • Low on-state resistance RDS(on) = 11 Ω MAX. (VGS = 10 V, ID = 0.5 A) • Low gate charge QG = 5 nC TYP. (VDD = 450 V, VGS = 10 V, ID = 1.0 A) • Gate voltage rating : ±30 V • Avalanche capability ratings <R> ORDERING INFORMATION PART NUMBER 2SK4070-S15-AY LEAD PLATING Note 2SK4070(1)-S27-AY Note 2SK4070-ZK-E1-AY Note 2SK4070-ZK-E2-AY Note Pure Sn (Tin) PACKING PACKAGE Tube 70 p/tube TO-251 (MP-3-a) typ. 0.39 g Tube 75 p/tube TO-251 (MP-3-b) typ. 0.34 g Tape 2500 p/reel TO-252 (MP-3ZK) typ. 0.27 g Note Pb-free (This product does not contain Pb in external electrode.) (TO-251) ABSOLUTE MAXIMUM RATINGS (TA = 25°C) Drain to Source Voltage (VGS = 0 V) VDSS 600 V Gate to Source Voltage (VDS = 0 V) VGSS ±30 V Drain Current (DC) (TC = 25°C) ID(DC) ±1.0 A ID(pulse) ±4.0 A PT1 22 W PT2 1.0 W Tch 150 °C Drain Current (pulse) Note1 Total Power Dissipation (TC = 25°C) Total Power Dissipation (TA = 25°C) Note2 Channel Temperature Tstg −55 to +150 °C Single Avalanche Current Note3 IAS 0.8 A Single Avalanche Energy Note3 EAS 38.4 mJ Storage Temperature (TO-252) Notes 1. PW ≤ 10 μs, Duty Cycle ≤ 1% 2. Mounted on glass epoxy board of 40 mm × 40 mm × 1.6 mm 3. Starting Tch = 25°C, VDD = 150 V, RG = 25 Ω, VGS = 20 → 0 V The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all products and/or types are available in every country. Please check with an NEC Electronics sales representative for availability and additional information. Document No. D18573EJ2V0DS00 (2nd edition) Date Published June 2007 NS Printed in Japan The mark <R> shows major revised points. The revised points can be easily searched by copying an "<R>" in the PDF file and specifying it in the "Find what:" field. 2006 2SK4070 ELECTRICAL CHARACTERISTICS (TA = 25°C) CHARACTERISTICS SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Zero Gate Voltage Drain Current IDSS VDS = 600 V, VGS = 0 V 100 μA Gate Leakage Current IGSS VGS = ±30 V, VDS = 0 V ±100 nA VGS(off) VDS = 10 V, ID = 1 mA 2.5 2.9 3.5 V | yfs | VDS = 10 V, ID = 0.5 A 0.2 0.4 RDS(on) VGS = 10 V, ID = 0.5 A 9.2 Input Capacitance Ciss VDS = 10 V, 110 pF Output Capacitance Coss VGS = 0 V, 50 pF Reverse Transfer Capacitance Crss f = 1 MHz 11 pF Turn-on Delay Time td(on) VDD = 150 V, ID = 0.5 A, 7.5 ns Rise Time tr VGS = 10 V, 6 ns Turn-off Delay Time td(off) RG = 10 Ω 11 ns Fall Time tf 18 ns Total Gate Charge QG VDD = 450 V, 5 nC Gate to Source Charge QGS VGS = 10 V, 1 nC QGD ID = 1.0 A 2.8 nC VF(S-D) IF = 1.0 A, VGS = 0 V 0.86 Reverse Recovery Time trr IF = 1.0 A, VGS = 0 V, 135 ns Reverse Recovery Charge Qrr di/dt = 100 A/μs 285 nC Gate Cut-off Voltage Forward Transfer Admittance Note Drain to Source On-state Resistance Note Gate to Drain Charge Body Diode Forward Voltage Note S Ω 11 1.5 V Note Pulsed TEST CIRCUIT 1 AVALANCHE CAPABILITY TEST CIRCUIT 2 SWITCHING TIME D.U.T. RG = 25 Ω D.U.T. L VGS RL PG. 50 Ω VGS VDD VGS = 20 → 0 V RG PG. Wave Form 0 VGS 10% 90% VDD VDS IAS 90% BVDSS VDS ID VDS τ VDD Starting Tch τ = 1 μs Duty Cycle ≤ 1% TEST CIRCUIT 3 GATE CHARGE D.U.T. PG. 2 IG = 2 mA RL 50 Ω VDD 90% VDS VGS 0 Data Sheet D18785EJ2V0DS 0 10% 10% tr td(off) Wave Form td(on) ton tf toff 2SK4070 TYPICAL CHARACTERISTICS (TA = 25°C) <R> DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA 25 PT - Total Power Dissipation - W dT - Percentage of Rated Power - % 120 100 80 60 40 20 0 TOTAL POWER DISSIPATION vs. CASE TEMPERATURE 0 25 50 75 100 125 20 15 10 5 0 150 0 25 75 100 125 150 TC - Case Temperature - °C Tch - Channel Temperature - °C <R> 50 FORWARD BIAS SAFE OPERATING AREA DRAIN CURRENT vs. CASE TEMPERATURE 100 1.2 TC = 25°C, Single ID(pulse) PW =1 i ID(DC) 1 1i Po w 0.1 m 00 ID - Drain Current - A 10 ms μs s i er D i ss RDS(on) Limited (VGS = 10 V) ip at io nL im it e d 0.8 0.6 0.4 0.2 0 0.01 1 10 100 0 1000 <R> 25 50 75 100 125 150 TC - Case Temperature - °C VDS - Drain to Source Voltage - V rth(ch-A) - Transient Thermal Resistance - °C/W ID - Drain Current - A 1 10 TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH 1000 Rth(ch-A) = 125 °C/Wi 100 10 Rth(ch-C) = 5.68 °C/Wi 1 0.1 Single pulse 0.01 100 μ 1m 10 m 100 m 1 10 100 1000 PW - Pulse Width - s Data Sheet D18785EJ2V0DS 3 2SK4070 DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE FORWARD TRANSFER CHARACTERISTICS 2 10 VDS = 10 V Pulsed 1.6 ID - Drain Current - A ID - Drain Current - A 1.8 VGS = 20 V 1.4 1.2 1 10 V 0.8 0.6 1 Tch = −55°C −25°C 25°C 75°C 125°C 150°C 0.1 0.4 0.2 Pulsed 0 0.01 0 5 10 15 20 0 2 VDS - Drain to Source Voltage - V | yfs | - Forward Transfer Admittance - S VGS(off) - Gate Cut-off Voltage - V 5 4 3.5 3 2.5 2 1.5 VDS = 10 V ID = 1 mA 0 -50 0 50 100 150 1 16 14 ID = 1.0 A 10 0.5 A 6 5 10 15 20 VGS – Gate to Source Voltage - V 4 Tch = −55°C −25°C 25°C 75°C 125°C 150°C 0.1 0.01 0.01 0.1 1 10 DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT RDS(on) - Drain to Source On-state Resistance - Ω RDS(on) - Drain to Source On-state Resistance - Ω Pulsed 0 14 ID - Drain Current - A 20 8 12 VDS = 10 V Pulsed DRAIN TO SOURCE ON-STATE RESISTANCE vs. GATE TO SOURCE VOLTAGE 12 10 10 Tch - Channel Temperature - °C 18 8 FORWARD TRANSFER ADMITTANCE vs. DRAIN CURRENT 4.5 0.5 6 VGS - Gate to Source Voltage - V GATE CUT-OFF VOLTAGE vs. CHANNEL TEMPERATURE 1 4 14 12 10 VGS = 10 V 8 20 V Pulsed 6 0.01 0.1 1 ID - Drain Current - A Data Sheet D18785EJ2V0DS 10 2SK4070 CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE 25 1000 Ciss, Coss, Crss - Capacitance - pF 20 ID = 1.0 A 15 10 0.5 A 5 VGS = 10 V Pulsed Ciss 100 Coss 10 1 0 -50 0 50 100 0.1 150 SWITCHING CHARACTERISTICS 10 100 DYNAMIC INPUT/OUTPUT CHARACTERISTICS 1000 10 600 VDD = 150 V VGS= 10 V RG = 10 Ω tf 100 td(off) td(on) 10 tr VDS – Drain to Source Voltage - V td(on), tr, td(off), tf - Switching Time - ns 1 VDS - Drain to Source Voltage – V Tch - Channel Temperature - °C 1 VDD = 450 V 250 V 150 V 500 9 8 7 VGS 400 6 5 300 4 200 3 VDS 2 100 1 ID = 1.0 A 0 0 0.1 1 10 0 ID - Drain Current - A 1 2 3 4 5 6 QG – Gate Chage - nC SOURCE TO DRAIN DIODE FORWARD VOLTAGE REVWESE RECOVERY TIME vs. DRAIN CURRENT 100 1000 10 1 VGS = 10 V 0.1 0V Pulsed trr – Reverse Recovery Time - ns IF – Diode Forward Current - A Crss VGS = 0 V f = 1 MHz 100 di/dt = 100 A/μs VGS = 0 V 10 0.01 0 0.2 0.4 0.6 0.8 1 1.2 VF(S-D) – Source to Drain Voltage - V Data Sheet D18785EJ2V0DS 0.1 1 10 100 IF – Diode Forward Current - A 5 VGS – Gate to Source Voltage - V RDS(on) - Drain to Source On-state Resistance - Ω DRAIN TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE 2SK4070 SINGLE AVALANCHE CURRENT vs. INDUCTIVE LOAD SINGLE AVALANCHE ENERGY DERATING FACTOR 10 120 RG = 25 Ω VDD = 150 V VGS = 20 → 0 V Starting Tch = 25°C Energy Derating Factor - % IAS - Single Avalanche Current - A 100 IAS = 0.8 A 1 EAS = 38.4 mJ 0.1 0.01 80 60 40 20 0 0.1 1 10 100 25 50 75 100 125 150 Starting Tch - Starting Channel Temperature - °C L - Inductive Load - H 6 VDD = 150 V RG = 25 Ω VGS = 20 → 0 V IAS ≤ 0.8 A 100 Data Sheet D18785EJ2V0DS 2SK4070 PACKAGE DRAWINGS (Unit: mm) 1) TO-251 (MP-3-a) 2) TO-251 (MP-3-b) 2.3 ±0.1 1.06 TYP. 0.5 ±0.1 6.6±0.2 4 3 1.14 MAX. 0.76±0.12 1.04 TYP. 2.3 TYP. 2.3 TYP. 1.02 TYP. 2.3 TYP. 0.5±0.1 2.3 TYP. 0.5 ±0.1 0.76 ±0.1 1. Gate 2. Drain 3. Source 4. Fin (Drain) Drain 2.3±0.1 1.0 TYP. 6.5±0.2 5.1 TYP. 4.3 MIN. 0.5±0.1 No Plating 1.14 MAX. Source No Plating 0 to 0.25 0.5±0.1 0.76±0.12 2.3 Body Diode Gate 0.51 MIN. 3 6.1±0.2 10.4 MAX. (9.8 TYP.) 4.0 MIN. 4 2 1.Gate 2.Drain 3.Source 4.Fin (Drain) EQUIVALENT CIRCUIT 3) TO-252 (MP-3ZK) 1 4.13 TYP. 6.1±0.2 2 1.1±0.13 1.14 MAX. 1 No Plating 9.3 TYP. 3 16.1 TYP. 2 1.8 ±0.2 1 0.5±0.1 4 6.1 ±0.2 4.0 MIN. 5.3 TYP. 2.3±0.1 11.25 TYP. Mold Area 0.7 TYP. 6.6 ±0.2 5.3 TYP. 4.3 MIN. 0.8 <R> 2.3 1. Gate 2. Drain 3. Source 4. Fin (Drain) 1.0 Remark Strong electric field, when exposed to this device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it once, when it has occurred. Data Sheet D18785EJ2V0DS 7 2SK4070 • The information in this document is current as of June, 2007. The information is subject to change without notice. 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