CXG1027TM Driver Amplifier for Transmission Description The CXG1027TM is a two-stage driver amplifier for 800 MHz and 1.5 GHz PDC. This is used to amplify the transmission-side power of the RF signal. Features • Ultraminiature package (10 pin TSSOP) • Low voltage operation : 2.9 V (Min.) • Low current consumption : 45 mA (Typ.) • High gain : 27.5 dB (Typ.) (for 1.5 GHz) 29.5 dB (Typ.) (for 800 MHz) • Low distortion (Adjacent channel leak power ratio) : –50 dBc (Typ.) (30 kHz offset) –69 dBc (Typ.) (50 kHz offset) • Positive power supply operation (Adjustment-free for VGG) • Supports both 800 MHz and 1.5 GHz by the external matching circuit Applications Power amplification between the quadrature modulator IC for 800 MHz/1.5 GHz PDC transmitter (approx. –15 dBm output) and the power module or power amplifier MMIC (approx. +10 dBm input) 10 pin TSSOP (Plastic) Absolute Maximum Ratings (Ta=25 °C) • Supply voltage VDD 6 • Operating temperature Topr –35 to +85 • Storage temperature Tstg –65 to +150 • Allowable power dissipation PD 550 mW • Voltage between gate and source VGSO 15 • Drain current 150 V mA Operating Condition Supply voltage VDD VGG 3.4 0.2 V °C °C V V Structure GaAs MMIC Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. —1— E97223-TE CXG1027TM Electrical Characteristics VGG=0.2 V, VDD=3.4 V, f=941.5 MHz ∗1 ∗1 ∗2 ∗2 (Ta=25 °C) Item Current consumption Output power Power gain Adjacent channel leak power ratio (30 kHz offset) Adjacent channel leak power ratio (50 kHz offset) Symbol IDD POUT GP Min. Typ. 45 Max. 65 29.5 32 Unit mA dBm dB ACPR30 –50 –47 dBc ACPR50 –69 –65 dBc 10 27 VGG=0.2 V, VDD=3.4 V, f=1.441 GHz (Ta=25 °C) Item ∗1 Current consumption Output power ∗1 Power gain ∗2 Adjacent channel leak power ratio (30 kHz offset) ∗2 Adjacent channel leak power ratio (50 kHz offset) ∗1 : When +10 dBm output Symbol IDD Min. Typ. 45 Max. 65 27.5 30 Unit mA dBm dB POUT GP 10 25 ACPR30 –50 –47 dBc ACPR50 –69 –65 dBc ∗2 : When +10 dBm output, 21 kHz band width Block Diagram Package Description/Pin Configuration 1 VDD1 10 GND GND GND (CAP) GND (CAP) RFOUT/VDD2 RFIN RFIN RFOUT/VDD2 VGG GND (1.5GHz) or GND (IND) (800MHz) VDD1 VGG GND 10pin TSSOP (PLASTIC) —2— CXG1027TM Recommended Circuit (For 800 MHz) 1 Cp 1000pF 10 R1 15Ω 2 9 C2 10pF C1 100pF 3 RFOUT L1 33nH 8 RFIN L4 12nH Cp 1000pF Cp 1000pF L2 39nH 4 7 5 6 L3 8.2nH R2 12Ω VGG Cp 1000pF L5 5.6nH VDD Cp 1000pF (For 1.5 GHz) 1 Cp 1000pF 10 R1 15Ω 2 9 C1 100pF C2 4pF 3 RFOUT L1 18nH 8 L4 4.7nH Cp 1000pF Cp 1000pF 4 7 5 6 RFIN L2 18nH L3 10nH R2 12Ω VGG Cp 1000pF VDD Cp 1000pF —3— CXG1027TM Recommended Evaluation Board (For 800 MHz) 25mm VDD Cp L4 Cp L2 C1 C2 RFOUT Cp Cp L1 R1 RFIN L5 Cp L3 R 2 GND VGG GND (For 1.5 GHz) GND VDD Cp L3 R 2 VGG Cp L2 C1 C2 RFOUT Cp Cp L1 R1 RFIN L4 Cp GND Glass fabric-base epoxy 4-layer board (Thickness : 0.3 mm × 2) GND for the overall 2nd, 3rd and 4th sides —4— CXG1027TM Example of Representative Characteristics (Ta=25 °C) POUT, Gain, IDD, ACPR vs. PIN Freq.=1.441GHz, VDD=3.4V, VGG=0.2V 30 –20 Gain 10 –40 POUT 0 –50 60 ACPR50 ACPR30 –10 50 IDD –20 –40 –30 ACPR [dBc] –30 –20 –10 PIN [dBm] 0 IDD [mA] POUT [dBm] Gain [dB] 20 –60 –70 40 POUT, Gain, IDD, ACPR vs. VDD Freq.=1.441GHz, VGG=0.2V, PIN=–18dBm 30 –20 Gain POUT –40 60 ACPR30 –10 50 IDD ACPR50 –20 2.0 2.5 3.0 3.5 4.0 VDD [V] 4.5 –50 IDD [mA] 0 40 5.5 5.0 –70 Gain, ACPR vs. IDD Freq.=1.441GHz, POUT=10dBm, VDD=3.4V, VGG=var. 30 –20 Gain 20 –40 ACPR30 0 –50 –10 –60 ACPR50 –20 20 30 40 50 IDD [mA] 60 —5— 70 80 –70 ACPR [dBc] –30 10 –60 ACPR [dBc] –30 10 Gain [dB] POUT [dBm] Gain [dB] 20 CXG1027TM Unit : mm 10PIN TSSOP(PLASTIC) 1.2MAX ∗2.8 ± 0.1 0.1 10 6 + 0.15 0.1 – 0.05 0.45 ± 0.15 3.2 ± 0.2 ∗2.2 ± 0.1 5 1 0.5 0.22 0.1 0.25 0° to 10° M A (0.1) + 0.025 0.12 – 0.015 Package Outline (0.2) + 0.08 0.22 – 0.07 DETAIL A NOTE: “∗” Dimensions do not include mold protrusion. PACKAGE STRUCTURE PACKAGE MATERIAL EPOXY RESIN LEAD TREATMENT SOLDER PLATING EIAJ CODE LEAD MATERIAL COPPER ALLOY JEDEC CODE PACKAGE MASS 0.02g SONY CODE TSSOP-10P-L01 —6—