CXG1061TN Low Noise Down Conversion Mixer for PHS Description The CXG1061TN is a low noise down conversion mixer MMIC for PHS. This IC is designed using the Sony’s GaAs J-FET process. Features • High gain Gc=22 dB (Typ.) • Low distortion Input IP3=–13 dBm (Typ.) • Low LO input power operation PLO=–15 dBm • High image suppression ratio IMR=27 dBc (Typ.) • LO input matching circuit • Single 3 V power supply operation • 10-pin TSSOP package 10 pin TSSOP (Plastic) Absolute Maximum Ratings (Ta=25 °C) • Supply voltage VDD 4.5 V • Input power PIN +5 dBm • Operating temperature Topr –35 to +85 °C • Storage temperature Tstg –65 to +150 °C Recommended Operating condition • Supply voltage VDD 2.7 to 3.3 Function Frequency conversion V Applications Japan digital cordless telephones (PHS) Structure GaAs J-FET MMIC Block Diagram RFIN 7 Pin Configuration AA AA AAAAAA AA RF AMP IF AMP 5 IFOUT VDD (RF AMP) 6 5 IFOUT/VDD (MIX, IF AMP) RFIN 7 4 CAP CAP 8 3 GND GND 9 2 CAP VDD (LO AMP) 10 1 LOIN MIX 1 LOIN LO AMP Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. —1— E98335A8Y CXG1061TN Electrical Characteristics VDD=3.0 V, fRF=1.9 GHz, fLO=1.66 GHz, PLO=–15 dBm, RF input and IF output 50 Ω matching; unless otherwise specified (Ta=25 °C) Item Current consumption Conversion gain Noise figure Input IP3 Image suppression ratio 1/2 IF suppression ratio LO to RF leak level LO input VSWR Symbol IDD Gc NF Min. — 19.5 — Typ. 7 22 3.3 Max. 9 24.5 4.5 Unit mA dB dB IIP3 –15.5 –13 — dBm IMR 1/2IFR PLK VSWRLO 22 35 — — 27 40 –46 2 — — –41 3.5 dBc dBc dBm — Measurement condition When no signal When a small signal When a small signal PRF=–40 dBm offset=600 kHz Conversion by the IM3 suppression ratio for two-wave input When PRF=–40 dBm input When PRF=–40 dBm input (Note) The values shown above are the specified values on the Sony’s recommended evaluation board. Recommended Evaluation Board VDD (RF AMP) C8 C5 C7 VDD (MIX, IF AMP) L2 L1 C4 RFIN 50Ω L3 C9 C10 L4 6 VDD IFOUT 5 7 RFIN CAP 4 8 CAP GND 3 9 CAP 2 LOIN 1 GND 10 VDD VDD (LO AMP) C2 C6 C3 LOIN 50Ω C1 L1 L2 L3 L4 C1 C2 C3 82 nH 3.9 nH 12 nH 10 nH 18 pF 1000 pF 18 pF —2— C4 C5 C6 C7 C8 C9 C10 IFOUT 50Ω 5 pF 1000 pF 0.1 µF 13 pF 1000 pF 3 pF 1000 pF CXG1061TN Example of Representative Characteristics (Ta=25 °C) POUT, IM3 vs. PIN 20 POUT-IF output power [dBm] 0 POUT –20 –40 IM3 VDD=3.0V fRF1=1.90GHz fRF2=1.9006GHz fLO=1.66GHz PLO= –15dBm –60 –80 –50 –40 –30 –20 –10 PIN-RF input power [dBm] IIP3, PLK vs. PLO Gc, NF vs. PLO 6 –12 21 5 19 4 NF VDD=3.0V fRF=1.90GHz fLO=1.66GHz 17 15 –25 –20 –15 –10 –5 0 IIP3 –35 –40 –14 PLK –45 –16 3 –18 2 –20 –25 PLO-LO input power [dBm] –30 VDD=3.0V fRF=1.90GHz fLO=1.66GHz –20 –15 –10 –5 PLO-LO input power [dBm] —3— –50 0 –55 PLK-LO-RF leak level [dBm] Gc –10 IIP3-Input IP3 [dBm] 23 7 NF-Noise figure [dB] Gc-Conversion gain [dB] 25 CXG1061TN Recommended Evaluation Board Front 25mm SONY CXG1061TN EVB IFOUT C8 C7 L2 RFIN L4 C9 L3 C10 C4 L1 C6 C3 C5 LOIN C1 C2 VDD (RF AMP) VDD (LO AMP) GND VDD (MIX, IF AMP) Back VDD (MIX, IF AMP) GND VDD (LO AMP) VDD (RF AMP) Glass fabric-base 4-layer epoxy board (thickness: 0.3 mm × 2) GND for the 2nd and 3rd layers —4— CXG1061TN Unit : mm 10PIN TSSOP(PLASTIC) 1.2MAX ∗2.8 ± 0.1 0.1 10 6 + 0.15 0.1 – 0.05 0.45 ± 0.15 3.2 ± 0.2 ∗2.2 ± 0.1 5 1 0.5 + 0.08 0.22 – 0.07 0.1 0.25 0° to 10° M A (0.1) + 0.025 0.12 – 0.015 Package Outline (0.2) + 0.08 0.22 – 0.07 DETAIL A NOTE: Dimension “∗” does not include mold protrusion. PACKAGE STRUCTURE PACKAGE MATERIAL EPOXY RESIN LEAD TREATMENT SOLDER PLATING EIAJ CODE LEAD MATERIAL COPPER ALLOY JEDEC CODE PACKAGE MASS 0.02g SONY CODE TSSOP-10P-L01 —5—