SONY CXG1090EN

CXG1090EN
High Power 2 × 4 Antenna Switch MMIC with Integrated Control Logic
Description
The CXG1090EN is a high power antenna switch
MMIC. This IC is suited to connect Tx/Rx to one of 4
antennas in cellular handset such as PDC.
The CXG1090EN has the integrated control logic
and can be operated with CMOS input.
This IC is designed using the Sony's GaAs J-FET
process which enable the CXG1090EN to be operated
with low voltage.
16 pin VSON (Plastic)
Features
• Low insertion loss: 0.30dB (Typ.)@900MHz, 0.40dB (Typ.)@1.5GHz
• Small package: 16-pin VSON
• High power handling: Pl dB: 37dBm
• CMOS compatible input control
• Low bias voltage: VDD = 3.0V
Applications
2 × 4 antenna switch for digital cellular telephones such as PDC handsets
Structure
GaAs J-FET MMIC
Absolute Maximum Ratings
• Bias voltage
VDD
• Control voltage
VCTL
• Operating temperature Topr
• Storage temperature Tstg
7
5
–35 to +85
–65 to +150
V @Ta = 25°C
V @Ta = 25°C
°C
°C
Note on Handling
GaAs MMICs are ESD sensitive devices. Special handling precautions are required.
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E00222-PS
CXG1090EN
Block Diagram
RF4
(Ant/Ext.1)
Pin Configuration
F1
9
8
F2
RF5 11
(Rx)
RF6 13
(Diversity 1)
RF4
F4
6
F3
4
F5
RF3
(Tx)
F6
F7
RF2
(Ant/Ext. 2)
RF1
(Diversity 2)
F8
14
3
RF-GND6
RF-GND1
9
8
RF3
GND 10
7
GND
RF5 11
6
RF2
GND 12
5
GND
RF6 13
4
RF1
RF-GND6 14
3
RF-GND1
VDD 15
2
CTLC
CTLA 16
1
CTLB
Recommended Circuit
9
RF4
L1
GND
RF5
L1
RF6
L1
RF-GND6
100pF
10
7
11
6
100pF
GND
12
5
13
4
VDD
3
15
2
100pF
16
CTLA
1kΩ
RF2
L1
GND
RF1
100pF
14
L1
GND
100pF
100pF
Z6
RF3
8
100pF
L1
Z1
100pF
RF-GND1
CTLC
1kΩ
1
100pF
CTLB
100pF
1kΩ
∗ DC blocking capacitors (CRF) are needed.
∗ Recommended to use bypass capacitors (Cbypass).
∗ Recommended to use control resistors (RCTL), when it is necessary to improve the electrostatic discharge
strength (ESD).
–2–
CXG1090EN
Truth Table
Control
ON
F1
F2
F3
F4
F5
F6
F7
F8
L
RF3 → RF2
OFF
ON
OFF
ON
OFF
OFF
ON
ON
L
H
RF3 → RF4
ON
OFF
ON
OFF
OFF
OFF
ON
ON
L
L
L
RF5 → RF2
ON
OFF
ON
OFF
OFF
OFF
ON
ON
L
L
H
RF5 → RF4
OFF
ON
OFF
ON
OFF
OFF
ON
ON
L
H
L
RF5 → RF6
OFF
OFF
OFF
OFF
ON
OFF
OFF
ON
L
H
H
RF5 → RF1
OFF
OFF
OFF
OFF
OFF
ON
ON
OFF
CTLA
CTLB
CTLC
H
L
H
DC Bias Condition
Item
(Ta = 25°C)
Min.
Typ.
Max.
Unit
VCTL (H) A to C
2.4
3.6
V
VCTL (L) A to C
0
0.8
V
2.8
3.2
V
VDD
–3–
CXG1090EN
Electrical Characteristics 1
Item
Insertion loss
Isolation
VSWR
ACP (±50kHz)
(VCTL (L) = 0V, VCTL (H) = 3V, Ta = 25°C)
Frequency
Typ.
Max.
Unit
RF3-RF2 889 to 960MHz Pin = 29.5dBm, VDD = 2.8 to 3.0V
0.32
0.55
dB
RF3-RF4 889 to 960MHz Pin = 29.5dBm, VDD = 2.8 to 3.0V
0.30
0.55
dB
RF5-RF2 810 to 885MHz Pin = 7dBm, VDD = 2.8 to 3.0V
0.55
0.85
dB
RF5-RF4 810 to 885MHz Pin = 7dBm, VDD = 2.8 to 3.0V
0.55
0.85
dB
RF5-RF1 810 to 885MHz Pin = 7dBm, VDD = 2.8 to 3.0V
0.5
0.8
dB
RF5-RF6 810 to 885MHz Pin = 7dBm, VDD = 2.8 to 3.0V
0.5
0.8
dB
17
19
dB
RF3-RF4 889 to 960MHz Pin = 29.5dBm, VDD = 2.8 to 3.0V
17
21
dB
RF5-RF2 810 to 885MHz Pin = 7dBm, VDD = 2.8 to 3.0V
17
21
dB
RF5-RF4 810 to 885MHz Pin = 7dBm, VDD = 2.8 to 3.0V
17
19
dB
RF5-RF1 810 to 885MHz Pin = 7dBm, VDD = 2.8 to 3.0V
31
38
dB
RF5-RF6 810 to 885MHz Pin = 7dBm, VDD = 2.8 to 3.0V
24
29
dB
Each ON
810 to 960MHz
Port
RF3-RF2
RF3-RF2
RF3-RF2
Pin = 29.5dBm, VDD = 3.0V∗1
Pin = 29.5dBm, VDD = 2.8V∗1
889 to 960MHz
Pin = 29.5dBm, VDD = 3.0V∗1
Pin = 29.5dBm, VDD = 2.8V∗1
889 to 960MHz
Pin = 29.5dBm, VDD = 3.0V∗1
Pin = 29.5dBm, VDD = 2.8V∗1
889 to 960MHz
Pin = 29.5dBm, VDD = 3.0V∗1
Pin = 29.5dBm, VDD = 2.8V∗1
RF3-RF4
3nd harmonics
RF3-RF2
RF3-RF4
1.4
889 to 960MHz
RF3-RF4
2nd harmonics
–67
–57
dBc
–67
–55
dBc
–75
–65
dBc
–75
–62
dBc
–67
–60
dBc
–67
–57
dBc
–67
–60
dBc
–67
–57
dBc
85
150
µA
VDD = 3.0V
0.45
1
mA
VDD = 2.8V
0.4
0.9
mA
1.0
5.0
µs
Control current
Bias current
Min.
RF3-RF2 889 to 960MHz Pin = 29.5dBm, VDD = 2.8 to 3.0V
RF3-RF4
ACP (±100kHz)
Condition
Switching speed
∗1 Input signal: ACP (±50kHz) < –65dBc, APC (±100kHz) < –75dBc,
2nd harmonics < –65dBc, 3rd harmonics < –65dBc
–4–
CXG1090EN
Electrical Characteristics 2
Item
Insertion loss
Isolation
VSWR
ACP (±50kHz)
(VCTL (L) = 0V, VCTL (H) = 3V, Ta = 25°C)
Frequency
Typ.
Max.
Unit
RF3-RF2 1429 to 1453MHz Pin = 29.5dBm, VDD = 2.8 to 3.0V
0.40
0.70
dB
RF3-RF4 1429 to 1453MHz Pin = 29.5dBm, VDD = 2.8 to 3.0V
0.40
0.70
dB
RF5-RF2 1477 to 1501MHz Pin = 7dBm, VDD = 2.8 to 3.0V
0.65
0.95
dB
RF5-RF4 1477 to 1501MHz Pin = 7dBm, VDD = 2.8 to 3.0V
0.65
0.95
dB
RF5-RF1 1477 to 1501MHz Pin = 7dBm, VDD = 2.8 to 3.0V
0.60
0.90
dB
RF5-RF6 1477 to 1501MHz Pin = 7dBm, VDD = 2.8 to 3.0V
0.60
0.90
dB
12
15
dB
RF3-RF4 1429 to 1453MHz Pin = 29.5dBm, VDD = 2.8 to 3.0V
15
18
dB
RF5-RF2 1477 to 1501MHz Pin = 7dBm, VDD = 2.8 to 3.0V
15
18
dB
RF5-RF4 1477 to 1501MHz Pin = 7dBm, VDD = 2.8 to 3.0V
13
16
dB
RF5-RF1 1477 to 1501MHz Pin = 7dBm, VDD = 2.8 to 3.0V
35
40
dB
RF5-RF6 1477 to 1501MHz Pin = 7dBm, VDD = 2.8 to 3.0V
20
25
dB
Each ON
1429 to 1501MHz
Port
RF3-RF2
RF3-RF2
RF3-RF2
Pin = 29.5dBm, VDD = 3.0V∗1
Pin = 29.5dBm, VDD = 2.8V∗1
1429 to 1453MHz
Pin = 29.5dBm, VDD = 3.0V∗1
Pin = 29.5dBm, VDD = 2.8V∗1
1429 to 1453MHz
Pin = 29.5dBm, VDD = 3.0V∗1
Pin = 29.5dBm, VDD = 2.8V∗1
1429 to 1453MHz
Pin = 29.5dBm, VDD = 3.0V∗1
Pin = 29.5dBm, VDD = 2.8V∗1
RF3-RF4
3nd harmonics
RF3-RF2
RF3-RF4
1.4
1429 to 1453MHz
RF3-RF4
2nd harmonics
–67
–55
dBc
–67
–53
dBc
–75
–65
dBc
–75
–62
dBc
–67
–60
dBc
–67
–57
dBc
–67
–57
dBc
–67
–55
dBc
85
150
µA
VDD = 3.0V
0.45
1
mA
VDD = 2.8V
0.4
0.9
mA
1.0
5.0
µs
Control current
Bias current
Min.
RF3-RF2 1429 to 1453MHz Pin = 29.5dBm, VDD = 2.8 to 3.0V
RF3-RF4
ACP (±100kHz)
Condition
Switching speed
∗1 Input signal: ACP (±50kHz) < –65dBc, APC (±100kHz) < –75dBc,
2nd harmonics < –65dBc, 3rd harmonics < –65dBc
–5–
CXG1090EN
Package Outline
Unit: mm
16PIN VSON(PLASTIC)
0.9 MAX
0.6
3.5
0.05 S
A
B
0.4
2x
0.35 ± 0.1
0.2 S B
4x
0.2 S A B
0.03 ± 0.03
0.2 ± 0.01
0.05 M S A-B
0.23 ± 0.02
1.4
0.5 ± 0.2
2.7
2.5
0.35 ± 0.1
S
Soldrer Plating
0.13 ± 0.025
+ 0.09
0.14 – 0.03
NOTE: 1) The dimensions of the terminal section apply to the
ranges of 0.1mm and 0.25mm from the end of a terminal.
TERMINAL SECTION
PACKAGE STRUCTURE
PACKAGE MATERIAL
EPOXY RESIN
LEAD TREATMENT
SOLDER PLATING
EIAJ CODE
LEAD MATERIAL
COPPER ALLOY
JEDEC CODE
PACKAGE MASS
0.02 g
SONY CODE
VSON-16P-01
–6–