CXP81100 CMOS 8-bit Single Chip Microcomputer Description The CXP81100 is a CMOS 8-bit single chip microcomputer of piggyback/evaluator combined type, which is developed for evaluating the function of the CXP81120/81124. 64 pin PQFP (Ceramic) Features • A wide instruction set (213 instructions) which cover various types of data — 16-bit operation/multiplication and division/ boolean bit operation instructions • Minimum instruction cycle 333ns at 12MHz operation (3.0 to 5.5V) 250ns at 16MHz operation (4.5 to 5.5V) • Applicable EPROM LCC type 27C128, LCC type 27C256 (Maximum 24Kbytes are available.) • Incorporated RAM capacity 832bytes • Peripheral functions — A/D converter 8-bit, 8-channel, successive approximation method (Conversion time of 20µs/16MHz) — Serial interface Incorporated buffer RAM (Auto transfer for 1 to 32bytes), 1channel Incorporated 8-bit, 8-stage FIFO (Auto transfer for 1 to 8bytes), 1channel — Timer 8-bit timer 8-bit timer/counter 19-bit time base timer — PWM output 12bits, 2channels (repetitive frequency 62.5kHz/16MHz) • Interruption 10 factors, 10 vectors, multi-interruption possible • Standby mode SLEEP/STOP • Package 64-pin ceramic PQFP Note) Mask option depends on the type of the CXP81100. Refer to the Products List for details. Structure Silicon gate CMOS IC Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. –1– E94X09-ST CXP81100 PB6 PB7 PA0 PA1 PA2 PA3 Vss VDD NC PA4 PA5 PA6 PA7 Pin Assigument in Piggyback Mode 64 63 62 61 60 59 58 57 56 55 54 53 52 51 PG3/TO PB4 2 50 PG4 PB3 3 49 PG5/SCK1 PB2 4 48 PG6/SO1 PB1 5 47 PG7/SI1/INT1 PB0 6 46 PE0/INT0 PC7 7 45 PE1/EC/INT2 44 PE2/PWM0 43 PE3/PWM1 PC6 8 A12 A15 NC 4 3 2 1 32 31 30 VDD A7 A13 1 A14 PB5 A6 5 29 A8 A5 6 28 A9 A4 7 27 A11 A3 8 26 NC 9 25 OE 42 PF0/AN0 41 PF1/AN1 40 PF2/AN2 39 PF3/AN3 38 PF4/AN4 37 PF5/AN5 36 PF6/AN6 PC5 9 PC4 10 A2 PC3 11 A1 10 24 A10 A0 11 23 CE NC 12 22 D7 D0 13 21 D6 PC2 12 PC1 13 PC0 14 PD7 15 PD6 16 PD5 17 35 PF7/AN7 PD4 18 34 AVDD PD3 19 33 AVREF Vss D5 D4 D3 29 30 31 32 AVss EXTAL 28 SCK0 XTAL 27 SO0 26 SI0 25 CS0 24 RST 23 MP NC 22 PD0 GND 21 PD1 D2 20 PD2 D1 14 15 16 17 18 19 20 Note) 1. NC (Pin 56) is always connected to VDD. 2. VSS (Pins 26 and 58) are both connected to GND. 3. MP (Pin 23) is always connected to GND. –2– CXP81100 PB6 PB7 PA0 PA1 PA2 PA3 Vss VDD NC PA4 PA5 PA6 PA7 Pin Assigument in Evaluator Mode 64 63 62 61 60 59 58 57 56 55 54 53 52 PG PB3 3 49 PG5/SCK1 PB2 4 48 PG6/SO1 PB1 5 47 PG7/SI1/INT1 PB0 6 46 PE0/INT0 45 PE1/EC/INT2 PC7 7 3 4 2 A13 50 A14 2 VDD PB4 NC PG3/TO A15 51 A12 1 A7/D7 PB5 1 32 31 30 A6/D6 5 29 A8 A5/D5 6 28 A9 A4/D4 7 27 A11 44 PE2/PWM0 43 PE3/PWM1 42 PF0/AN0 41 PF1/AN1 PC6 8 PC5 9 A3/D3 8 26 NC PC4 10 A2/D2 9 25 HALT A1/D1 10 24 A10 A0/D0 11 23 E/P 22 I/T 40 PF2/AN2 21 MON 39 PF3/AN3 38 PF4/AN4 37 PF5/AN5 36 PF6/AN6 PC3 11 PC2 12 NC 12 PC1 13 RD 13 14 15 16 17 18 19 20 17 35 PF7/AN7 PD4 18 34 AVDD PD3 19 33 AVREF PD1 PD0 MP XTAL EXTAL 27 28 29 30 31 32 AVss PD2 26 SCK0 25 SO0 24 SI0 23 CS0 22 RST 21 Vss 20 RST PD5 C1 16 C2 PD6 NC 15 GND PD7 SYNC 14 WR PC0 Note) 1. NC (Pin 56) is always connected to VDD. 2. VSS (Pins 26 and 58) are both connected to GND. 3. MP (Pin 23) is always connected to GND. –3– CXP81100 EPROM Read Timing (Ta=–20 to +75°C, VDD=3.0 to 5.5V, Vss=0V reference) Item Symbol Pin Min. Address → data input delay time tACC A0 to A15 D0 to D7 Address → data hold time tIH A0 to A15 D0 to D7 Max. Unit 75∗ ns 0 ns ∗ At 12MHz operation (VDD=3.0 to 5.5V), At 16MHz operation (VDD=4.5 to 5.5V) 0.8VDD A0 to A15 Address data 0.2VDD tACC tIH 0.8VDD D0 to D7 Input data 0.2VDD Products List Products Option item Mask product CXP81120 Package ROM capacity CXP81124 64-pin plastic LQFP 20K bytes 24K bytes Piggyback/evaluator product CXP81100-U01Q 64-pin ceramic PQFP EPROM 24K bytes Pull-up resistor for reset pin Existent/Non-existent Existent Power on reset circuit Existent/Non-existent Existent –4– CXP81100 Piggyback mode/evaluator mode can be switched as shown below. Piggyback mode Piggyback/evaluator product Evaluator mode Pin 1 marking Pin 1 index LCC type EPROM Pin 1 marking Note) CPU probe Note) Evaluation cap should be connected to CPU probe. Package Outline Unit : mm 64PIN PQFP (CERAMIC) PIN No. 1 INDEX 18.7 ± 0.5 INDEX PIN No.1 INDEX 16.3 ± 0.2 64 51 1.0 ± 0.05 1 64 51 1 33 19 14.22 18.12 ± 0.2 12.02 1.05 0.7 0.4 ± 0.08 0.3 6.0 1.27 ± 0.13 4.5 22.3 ± 0.25 32 9.48 0.75 20 1.3 ± 0.3 33 19 32 20 0.6 0.9 11.66 15.58 ± 0.2 PACKAGE STRUCTURE PACKAGE MATERIAL + 0.05 0.15 – 0.02 9.8 MAX –5– CERAMIC SONY CODE PQFP-64C-L02 LEAD TREATMENT GOLD PLATING EIAJ CODE AQFP064-C-0000-B LEAD MATERIAL 42 ALLOY PACKAGE WEIGHT 5.2g JEDEC CODE 3.57 ± 0.36 24.7 ± 0.5 52 52