SUPERTEX TP5335K1

TP5335
Low Threshold
Product Objective Specification
P-Channel Enhancement-Mode
Vertical DMOS FETs
Ordering Information
Order Number/Package
BVDSS /
BVDGS
RDS(ON)
(max)
VGS(th)
(max)
TO-236AB*
Wafer
-350V
30Ω
-2.4V
TP5335K1
TP5335NW
Product marking for SOT-23
P3S❋
Where *=2-week alpha date code
*Same as SOT-23. All units shipped on 3,000 piece carrier tape reels.
Advanced DMOS Technology
Features
These enhancement-mode (normally-off) transistors utilize a
vertical DMOS structure and Supertex’s well-proven silicon-gate
manufacturing process. This combination produces devices with
the power handling capabilities of bipolar transistors and with the
high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, these
devices are free from thermal runaway and thermally-induced
secondary breakdown.
Free from secondary breakdown
Low power drive requirement
Ease of paralleling
Low CISS and fast switching speeds
Excellent thermal stability
Integral Source-Drain diode
Supertex’s vertical DMOS FETs are ideally suited to a wide range
of switching and amplifying applications where high breakdown
voltage, high input impedance, low input capacitance, and fast
switching speeds are desired.
High input impedance and high gain
Complementary N- and P-channel devices
Applications
Package Options
Logic level interfaces – ideal for TTL and CMOS
Solid state relays
Analog switches
Drain
Power Management
Telecom switches
Absolute Maximum Ratings
Gate
Drain-to-Source Voltage
BVDSS
Drain-to-Gate Voltage
BVDGS
Gate-to-Source Voltage
± 20V
Operating and Storage Temperature
Soldering Temperature*
Source
TO-236AB
(SOT-23)
top view
-55°C to +150°C
300°C
Note: See Package Outline section for dimensions.
* Distance of 1.6 mm from case for 10 seconds.
11/12/01
Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability
indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to
workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the
Supertex website: http://www.supertex.com. For complete liability information on all Supertex products, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website.
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TP5335
Thermal Characteristics
Package
ID (continuous)*
SOT-23
ID (pulsed)
-85mA
Power Dissipation
@ TA = 25°C
θjc
θja
°C/W
°C/W
0.36W
200
350
-400mA
IDR*
IDRM
-85mA
-400mA
* ID (continuous) is limited by max rated Tj.
Electrical Characteristics (@ 25°C unless otherwise specified)
Symbol
Parameter
BVDSS
VGS(th)
∆V GS(th)
IGSS
IDSS
Min
Drain-to-Source Breakdown Voltage
Gate Threshold Voltage
Change in VGS(th) with Temperature
Gate Body Leakage
Zero Gate Voltage Drain Current
-350
-1.0
ON-State Drain Current
ID(ON)
Typ
Max
Unit
Conditions
-2.4
4.5
-100
-10
V
V
mV/°C
nA
µA
VGS = 0V, ID = -100µA
VGS = VDS, ID = -1.0mA
VGS = VDS, ID = -1.0mA
VGS = ±20V, VDS = 0V
VGS = 0V, VDS = Max Rating
-1.0
mA
VGS = 0V, VDS = 0.8 Max Rating
TA = 125°C
-5.0
nA
VGS = 0V, VDS = -330V
VGS = -4.5V, VDS = -25V
-200
mA
Static Drain-to-Source
ON-State Resistance
75
Ω
VGS = -10V, VDS = -25V
VGS = -4.5V, ID = -150mA
30
Ω
VGS = -10V, ID = -200mA
∆RDS(ON)
Change in RDS(ON) with Temperature
1.7
%/°C
VGS = -10V, ID = -200mA
GFS
Forward Transconductance
CISS
Input Capacitance
COSS
Common Source Output Capacitance
60
CRSS
Reverse Transfer Capacitance
22
td(ON)
Turn-ON Delay Time
20
tr
Rise Time
15
td(OFF)
Turn-OFF Delay Time
tf
Fall Time
VSD
Diode Forward Voltage Drop
trr
Reverse Recovery Time
RDS(ON)
125
m
Ω
-400
VDS = -25V, ID = -200mA
110
25
pF
VGS = 0V, VDS = -25V
f = 1 MHz
ns
VDD = -25V
ID = -150mA
RGEN = 25Ω
V
VGS = 0V, ISD = -200mA
ns
VGS = 0V, ISD = -200mA
25
-1.8
800
Notes:
1. All D.C. parameters 100% tested at 25°C unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.)
2. All A.C. parameters sample tested.
Switching Waveforms and Test Circuit
0V
10%
PULSE
GENERATOR
INPUT
90%
-10V
t(ON)
td(ON)
Rgen
t(OFF)
td(OFF)
tr
tF
D.U.T.
0V
90%
OUTPUT
INPUT
90%
RL
OUTPUT
VDD
10%
10%
VDD
11/12/01
©2001 Supertex Inc. All rights reserved. Unauthorized use or reproduction prohibited.
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1235 Bordeaux Drive, Sunnyvale, CA 94089
TEL: (408) 744-0100 • FAX: (408) 222-4895
www.supertex.com