Si9979 Vishay Siliconix Si9979 3-Phase Brushless DC Motor Controller FEATURES • Hall-Effect Commutation é 60° or 120° Sensor Spacing é Integral High-Side Drive for all N-Channel MOSFET Bridges é PWM Input é é é é é Quadrature Selection Tachometer Output Reversible Braking Output Enable Control é é é é Cross Conduction Protection Current Limiting Undervoltage Lockout Internal Pull-Up Resistors DESCRIPTION The Si9979 is a monolithic brushless dc motor controller with integral high-side drive circuitry. The Si9979 is configured to allow either 60° or 120° commutation sensor spacing. The internal low-voltage regulator allows operation over a wide input voltage range, 20- to 40-V dc. quadrature select, and braking inputs are included for control along with a tachometer output. Protection features include cross conduction protection, current limiting, and undervoltage lockout. The FAULT output indicates when undervoltage, over current, disable, or invalid sensor shutdown has occurred. The Si9979 provides commutation from Hall-effect sensors. The integral high-side drive, which utilizes combination bootstrap/charge pump supplies, allows implementation of an all n-channel MOSFET 3-phase bridge. PWM, direction, The Si9979 is specified to operate over the commercial temperature range of 0 to 70°C (C suffix), and the industrial temperature range of -40 to 85°C (D suffix). FUNCTIONAL BLOCK DIAGRAM FaxBack 408-970-5600, request 70012 www.siliconix.com S-60752-Rev. D, 05-Apr-99 1 Si9979 Vishay Siliconix ABSOLUTE MAXIMUM RATINGS Voltage on Pin 42 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 V Operating Temperature C Suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to 70°C D Suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40 to 85°C Voltage on Pins 1-4, 10, 11 . . . . . . . . . . . . . . . .-0.3 V to VDD + 0.3 V Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65 to 150°C Voltage on Pins 5-9 . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to 5.5 V Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C Voltage on Pins 26, 28, 30, 32, 34, 36 . . . . . . . . . . . . . . . . . . . . . 60 V Power Dissipation (PD) C Suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.70 W D Suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.55 W Voltage on Pins 27, 31, 35 . . . . . . . . . . . . . . . . . . . . . . . . . . -2 to 50 V RECOMMENDED OPERATING RANGE V+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +20 to 40 VDC RT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 kΩ Min SPECIFICATIONS Limits Test Conditions Unless Otherwise Specified Parameter Symbol V+ = 20 to 40 V, IDD = 0 mA -40°C to 85°C Mina Typb Maxa Units Power Supply Voltage Range Logic Voltage Supply Current Logic Current Internal Referencec V+ VDD 20 -20 mA ≤ IDD ≤ 0 mA 14.5 I+ 40 16 17.5 4.5 mA -20 IDD VREF V 4.2 V Commutation Inputs (INA, INB, INC, 60/120) High-State VIH 4.0 Low-State VIL High-State Input Current IIH VIH = VDD Low-State Input Current IIL VIL = 0 V 1.0 10 -50 V µA Logic Inputs (F/R, EN, QS, PWM, BRK) High-State VIH 2.0 Low-State VIL High-State Input Current IIH VIH = 5.5 V Low-State Input Current IIL VIL = 0 V 0.8 10 -125 V µA Outputs Low-Side Gate Drive, High State VGBH Low-Side Gate Drive, Low State VGBL High-Side Gate Drive, High State VGTH High-Side Gate Drive, Low State VGTL Capacitor Voltaged VCAP Low-Side Switching, Rise Time trL Low-Side Switching, Fall Time tfL High-Side Switching, Rise Time trH High-Side Switching, Fall Time tfH Break-Before-Make Time TACH Output/FAULT Output TACH Output Pulsewidth S-60752-Rev. D, 05-Apr-99 2 14 16 0.1 TA = 0 to 70°C C Suffix 16 18 TA = -40 to 85°C D Suffix 16 20 55 Risetime = 1 to 10 V Falltime = 10 to 1 V CL = 600 pF 25 70 100 ns 40 100 tBHL 300 tT V 0.1 V+ = 40 V tBLH VOL 17.5 IOL = 1.0 mA 0.15 300 600 0.4 V ns FaxBack 408-970-5600, request 70012 www.siliconix.com Si9979 Vishay Siliconix SPECIFICATIONS Limits Test Conditions Unless Otherwise Specified Parameter Symbol -40°C to 85°C Mina V+ = 20 to 40 V, IDD = 0 mA Typb Maxa Units Protection Low-Side Undervoltage Lockout Low-Side Hysteresis High-Side Undervoltage Lockout UVLL 12.2 VH 0.8 SA, B, C = 0 V UVLH V VDD - 3.3 Current Limit Comparator Input Bias Current IIB Comparator Threshold Voltage VTH Common Mode Voltage VCM One Shot Pulse Width µA -5 TA = 0 to 70°C C Suffix 90 100 110 TA = -40 to 85°C D Suffix 85 100 125 0 tp 1 RT = 10 k, CT = 0.001 µF 8 10 12 RT = 10 k, CT = 0.01 µF 80 100 120 mV V µs Notes a. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum. b. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. c. The reference voltage is not available for external use. d. VCAP = (V+) + (VDD) COMMUTATION TRUTH TABLE Inputs Sensors (60°Spacing) Outputs Sensors (60°Spacing) Top Drive Bottom Drive INA INB INC INA INB INC EN F/R BRK IS+ GTA GTB GTC GBA GBB GBC FAULT 0 0 0 1 0 1 1 1 0 0 1 0 0 0 1 0 1 1 0 0 1 0 0 1 1 0 0 1 0 0 0 0 1 1 1 1 0 1 1 0 1 1 0 0 0 1 0 0 0 1 1 1 1 1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 0 1 1 0 1 1 1 1 0 0 0 0 1 1 0 0 1 0 0 1 0 0 1 1 1 0 0 0 0 1 0 1 0 1 0 0 0 1 0 1 1 0 0 0 0 1 0 1 0 0 1 1 0 0 1 0 0 1 0 0 0 0 0 1 1 0 0 1 1 1 0 1 1 0 1 0 0 0 0 0 1 0 1 0 1 1 1 1 0 1 0 1 0 0 0 1 0 0 0 1 0 1 0 1 1 0 1 1 1 0 0 0 1 0 0 0 0 1 1 0 0 1 0 0 1 1 0 0 0 0 1 0 0 0 1 1 X X X X X X 0 X 0 X 0 0 0 0 0 0 0 Disable X X X X X X 0 X 1 X 0 0 0 1 1 1 0 Power Down L L L L L L 1 X 1 0 0 0 0 1 1 1 1 Brake L L L L L L 1 X 1 1 0 0 0 1 1 1 0 Over I in BRK L L L L L L 1 X 0 1 0 0 0 0 0 0 0 Over I 1 0 1 1 1 1 1 X 0 X 0 0 0 0 0 0 0 1 0 1 1 1 1 1 X 1 X 0 0 0 1 1 1 0 0 1 0 0 0 0 1 X 0 X 0 0 0 0 0 0 0 0 1 0 0 0 0 1 X 1 X 0 0 0 1 1 1 0 Notes: L. Any valid sensor combination FaxBack 408-970-5600, request 70012 www.siliconix.com Conditions X. Don’t care S-60752-Rev. D, 05-Apr-99 3 Si9979 Vishay Siliconix PIN CONFIGURATION PIN DESCRIPTION Pins 1-3: INA, INB, INC Pin 7: QS (Quadrature Select) INA, INB, and INC are the commutation sensor inputs, and are intended to be driven by open collector Hall effect switches. These inputs have internal pull up resistors tied to VDD, which eliminates the need for external pull up resistors. This input determines whether the bottom MOSFETs or both bottom and top MOSFETs switch in response to the PWM signal. A logic “1” on this input enables only the bottom MOSFETs. This is the default condition as this pin is pulled up internally. When this pin is pulled to ground, both the bottom and top MOSFETs are enabled. Pin 4: 60/120 The 60/120 input allows the use of the Si9979 with either a 60° or 120° commutation sensor spacing. An internal pull up resistor, which is tied to VDD, sets the default condition to 60° spacing. 120° spacing is selected by pulling this input to ground. Pin 5: EN (Enable) A logic “1” on this input allows commutation of the motor. This is the default condition as this pin is pulled up internally. When this pin is pulled to ground, all gate drive outputs are turned off. Pin 6: F/R (Forward/Reverse) A logic “1” on this input selects commutation for motor rotation in the “forward” direction. This is the default condition as this pin is pulled up internally. When this pin is pulled to ground, the commutation sensor logic levels are inverted internally, causing reverse rotation. S-60752-Rev. D, 05-Apr-99 4 Pin 8: PWM An open collector (drain) or TTL compatible signal is applied to this input to control the motor speed. The QS input determines which MOSFETs are switched in response to the PWM signal. If no PWM signal is being used, this input is left open. It is pulled up internally, which allows the MOSFETs to follow the commutation sequence. Pin 9: BRK With this input at logic “1”, the top MOSFETs are turned off and the bottom MOSFETs are turned on, shorting the motor windings together. This provides a braking torque which is dependent on the motor speed. This is the default condition as this pin is pulled up internally. When this pin is pulled to ground, the MOSFETs are allowed to follow the commutation sequence. FaxBack 408-970-5600, request 70012 www.siliconix.com Si9979 Vishay Siliconix Pin 10: TACH Pin 27: SC This output provides a minimum 300-nanosecond output pulse for every commutation sensor transition, yielding a 6 pulse per electrical revolution tachometer signal. This output is open drain. This pin is negative supply of the high-side drive circuitry. As such, it is the connection for the negative side of the bootstrap capacitor, the top MOSFET Source, the bottom MOSFET Drain, and the Phase C output. Pin 11: FAULT Pin 28: CAPC The FAULT output switches low to indicate that at least one of the following conditions exists, controller disable (EN), undervoltage lockout, invalid commutation sensor code shutdown, or overcurrent shutdown. This output is open drain. This pin is the positive supply of the high-side circuitry. The bootstrap capacitor for Phase C is connected between this pin and SC. Pin 17: RT/CT The junction of the current limit one shot timing resistor and capacitor is connected to this pin. This one-shot is triggered by the current limit comparator when an overcurrent condition exists. This action turns off all the gate drives for the period defined by RT and CT , thus stopping the flow of current. Pin 29: GBB This is the gate drive output for the bottom MOSFET in Phase B. Pin 30: GTB This is the gate drive output for the top MOSFET in Phase B. Pin 18: RT Pin 31: SB One side of the current limit one shot timing resistor is connected to this pin. This pin is negative supply of the high-side drive circuitry. As such, it is the connection for the negative side of the bootstrap Pin 19: IS+ Pin 34: GTA This is the sensing input of the current limit comparator and should be connected to the positive side of the current sense resistor. When the voltage across the current sense resistor exceeds 100 mV, the comparator switches and triggers the current limit one-shot. The one-shot turns off all the gate drives for the period defined by RT and CT, thus stopping the flow of current. If the overcurrent condition remains after the shutdown period, the gate drives will be held off until the overcurrent condition no longer exists. This is the gate drive output for the top MOSFET in Phase A. Pin 35: SA This pin is negative supply of the high-side drive circuitry. As such, it is the connection for the negative side of the bootstrap capacitor, the top MOSFET Source, the bottom MOSFET Drain, and the Phase A output. Pin 36: CAPA Pin 20: ISThis pin is the ground reference for the current limit comparator. It should be connected directly to the ground side of the current sense resistor to enhance noise immunity. This pin is the positive supply of the high-side circuitry. The bootstrap capacitor for Phase A is connected between this pin and SA. Pin 42: V+ Pins 12-16, 21-24, 37-41, 44-48: GND These pins are the return path for both the logic and gate drive circuits. Also, they serve to conduct heat out of the package, into the circuit board. The supply voltage for the Si9979 is connected between this pin and ground. The internal logic and high-side supply voltages are derived from V+. Pin 43: VDD Pin 25: GBC This is the gate drive output for the bottom MOSFET in Phase C. VDD is the internal logic and gate drive voltage. It is necessary to connect a capacitor between this pin and ground to insure that the current surges seen at the turn on of the bottom MOSFETs does not trip the undervoltage lockout circuitry. Pin 26: GTC This is the gate drive output for the top MOSFET in Phase C. FaxBack 408-970-5600, request 70012 www.siliconix.com S-60752-Rev. D, 05-Apr-99 5 Si9979 Vishay Siliconix APPLICATIONS FIGURE 1. Three-Phase Brushless DC Motor Controller FIGURE 2. Single H-Bridge Controller S-60752-Rev. D, 05-Apr-99 6 FaxBack 408-970-5600, request 70012 www.siliconix.com Si9979 Vishay Siliconix FIGURE 3. Three-Phase AC Motor Controller FIGURE 4. External VDD Regulator FaxBack 408-970-5600, request 70012 www.siliconix.com S-60752-Rev. D, 05-Apr-99 7