1WCFS0808V1E WCFS0808V1E 32K x 8 3.3V Static RAM Features • Single 3.3V power supply • Ideal for low-voltage cache memory applications • High speed — 12/15 ns • Plastic SOJ and TSOP packaging Functional Description The WCFS0808V1E is a high-performance 3.3V CMOS Static RAM organized as 32K words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable (CE) and active LOW Output Enable (OE) and three-state drivers. The device has an automatic power-down feature, reducing the power consumption by more than 95% when deselected. An active LOW Write Enable signal (WE) controls the writing/ reading operation of the memory. When CE and WE inputs are both LOW, data on the eight data input/output pins (I/O0 through I/O7) is written into the memory location addressed by the address present on the address pins (A0 through A14). Reading the device is accomplished by selecting the device and enabling the outputs, CE and OE active LOW, while WE remains inactive or HIGH. Under these conditions, the contents of the location addressed by the information on address pins is present on the eight data input/output pins. The input/output pins remain in a high-impedance state unless the chip is selected, outputs are enabled, and Write Enable (WE) is HIGH. The WCFS0808V1E is available in 28-pin standard 300-mil-wide SOJ and TSOP Type I packages. Logic Block Diagram Pin Configurations SOJ Top View I/O0 INPUT BUFFER I/O1 ROW DECODER I/O2 SENSE AMPS A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 32K x 8 ARRAY I/O3 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 I/O0 I/O1 I/O2 GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 VCC WE A4 A3 A2 A1 OE A0 CE I/O7 I/O6 I/O5 I/O4 I/O3 I/O4 I/O5 CE WE POWER DOWN COLUMN DECODER I/O6 I/O7 A 14 A 12 A 13 A 11 A 10 OE Selection Guide Maximum Access Time (ns) WCFS0808V1E 12ns WCFS0808V1E 15ns 12 15 Maximum Operating Current (mA) 55 50 Maximum CMOS Standby Current (µA) 500 500 Document #: 38-05225 Rev. ** Revised February 11, 2002 WCFS0808V1E Pin Configuration TSOP Top View OE A1 A2 A3 A4 WE VCC A5 A6 A7 A8 A9 A10 A11 21 22 23 20 19 18 17 16 15 14 13 12 11 10 9 8 24 25 26 27 28 1 2 3 4 5 6 7 Maximum Ratings A0 CE I/O7 I/O6 I/O5 I/O4 I/O3 GND I/O2 I/O1 I/O0 A14 A13 A12 Output Current into Outputs (LOW)............................. 20 mA (Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature ................................. –65°C to +150°C Ambient Temperature with Power Applied............................................. –55°C to +125°C Static Discharge Voltage........................................... >2001V (per MIL-STD-883, Method 3015) Latch-Up Current.................................................... >200 mA Operating Range Supply Voltage on VCC to Relative GND[1] .... –0.5V to +4.6V Range Ambient Temperature VCC DC Voltage Applied to Outputs in High Z State[1] ....................................–0.5V to VCC + 0.5V Commercial 0°C to +70°C 3.3V ±300 mV DC Input Voltage[1].................................–0.5V to VCC + 0.5V Electrical Characteristics Over the Operating Range[1] WCFS0808V1E 12ns Parameter Description Test Conditions Min. Max. 2.4 Unit VOH Output HIGH Voltage VCC = Min., IOH = –2.0 mA V VOL Output LOW Voltage VCC = Min., IOL = 4.0 mA 0.4 V VIH Input HIGH Voltage 2.2 VCC +0.3V V VIL Input LOW Voltage –0.3 0.8 V IIX Input Load Current –1 +1 µA IOZ Output Leakage Current GND ≤ VI ≤ VCC, Output Disabled –5 +5 µA IOS Output Short Circuit Current[2] VCC = Max., VOUT = GND –300 mA ICC VCC Operating Supply Current VCC = Max., IOUT = 0 mA, f = fMAX = 1/tRC 55 mA ISB1 Automatic CE Power-Down Current — TTL Inputs Max. VCC, CE ≥ VIH, VIN ≥ VIH, or VIN ≤ VIL,f = fMAX 5 mA ISB2 Automatic CE Power-Down Current — CMOS Inputs[3] Max. VCC, CE ≥ VCC – 0.3V, VIN ≥ VCC – 0.3V, or VIN ≤ 0.3V, WE ≥VCC – 0.3V or WE ≤0.3V, f = fMAX 500 µA Notes: 1. Minimum voltage is equal to – 2.0V for pulse durations of less than 20 ns. 2. Not more than one output should be shorted at one time. Duration of the short circuit should not exceed 30 seconds. 3. Device draws low standby current regardless of switching on the addresses. Document #: 38-05225 Rev. ** Page 2 of 10 WCFS0808V1E Electrical Characteristics Over the Operating Range (continued) WCFS0808V1E 15ns Parameter Description Test Conditions VOH Output HIGH Voltage VCC = Min., IOH = –2.0 mA VOL Output LOW Voltage VCC = Min., IOL = 4.0 mA VIH Input HIGH Voltage VIL Min. Max. Unit 2.4 V 0.4 V 2.2 VCC +0.3V V Input LOW Voltage –0.3 0.8 V IIX Input Load Current –1 +1 µA IOZ Output Leakage Current GND ≤ VI ≤ VCC, Output Disabled –5 +5 µA IOS Output Short Circuit Current[2] VCC = Max., VOUT = GND –300 mA ICC VCC Operating Supply Current VCC = Max., IOUT = 0 mA, f = fMAX = 1/tRC 50 mA ISB1 Automatic CE Power-Down Current — TTL Inputs Max. VCC, CE ≥ VIH, VIN ≥ VIH, or VIN ≤ VIL, f = fMAX 5 mA ISB2 Automatic CE Power-Down Current — CMOS Inputs[3] Max. VCC, CE ≥ VCC–0.3V, VIN ≥ VCC – 0.3V, or VIN ≤ 0.3V, WE≥VCC–0.3V or WE≤ 0.3V, f=fMAX 500 µA Capacitance[4] Parameter Description CIN: Addresses Input Capacitance Test Conditions Max. Unit TA = 25°C, f = 1 MHz, VCC = 3.3V 5 pF 6 pF 6 pF CIN: Controls COUT Output Capacitance AC Test Loads and Waveforms R1 317Ω 3.3V ALL INPUT PULSES OUTPUT 3.0V R2 351Ω CL INCLUDING JIG AND SCOPE Equivalent to: GND 10% ≤ 3 ns 90% 90% 10% ≤ 3 ns THÉVENIN EQUIVALENT 167Ω OUTPUT 1.73V Note: 4. Tested initially and after any design or process changes that may affect these parameters. Document #: 38-05225 Rev. ** Page 3 of 10 WCFS0808V1E Switching Characteristics Over the Operating Range[5] WCFS0808V1E 12ns Parameter Description Min. Max. Unit READ CYCLE tRC Read Cycle Time tAA Address to Data Valid 12 tOHA Data Hold from Address Change tACE CE LOW to Data Valid tDOE OE LOW to Data Valid tLZOE OE LOW to Low Z[6] [6] CE LOW to Low Z tHZCE CE HIGH to High Z tPU CE LOW to Power-Up tPD 12 ns 5 ns ns 5 3 [6, 7] ns ns 6 0 CE HIGH to Power-Down ns ns 0 OE HIGH to High Z tLZCE WRITE 3 [6, 7] tHZOE ns 12 ns ns 12 ns CYCLE[8, 9] tWC Write Cycle Time 12 ns tSCE CE LOW to Write End 8 ns tAW Address Set-Up to Write End 8 ns tHA Address Hold from Write End 0 ns tSA Address Set-Up to Write Start 0 ns tPWE WE Pulse Width 8 ns tSD Data Set-Up to Write End 7 ns tHD Data Hold from Write End 0 ns Z[8] tHZWE WE LOW to High tLZWE WE HIGH to Low Z[6] 7 3 ns ns Notes: 5. Test conditions assume signal transition time of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified IOL/IOH and capacitance CL = 30 pF. 6. At any given temperature and voltage condition, tHZCE is less than tLZCE, tHZOE is less than tLZOE, and tHZWE is less than tLZWE for any given device. 7. tHZOE, tHZCE, tHZWE are specified with CL = 5 pF as in AC Test Loads. Transition is measured ±500 mV from steady state voltage. 8. The internal write time of the memory is defined by the overlap of CE LOW and WE LOW. Both signals must be LOW to initiate a write and either signal can terminate a write by going HIGH. The data input set-up and hold timing should be referenced to the rising edge of the signal that terminates the write. 9. The minimum write cycle time for write cycle #3 (WE controlled, OE LOW) is the sum of tHZWE and tSD. Document #: 38-05225 Rev. ** Page 4 of 10 WCFS0808V1E Switching Characteristics Over the Operating Range[5] (Continued) WCFS0808V1E 15ns Parameter Description Min. Max. Unit READ CYCLE tRC Read Cycle Time 15 tAA Address to Data Valid tOHA Data Hold from Address Change tACE CE LOW to Data Valid 15 ns tDOE OE LOW to Data Valid 6 ns 15 OE LOW to Low Z ns 0 ns [6, 7] tHZOE OE HIGH to High Z tLZCE CE LOW to Low Z[6] 6 CE HIGH to High tPU CE LOW to Power-Up tPD CE HIGH to Power-Down ns 3 ns Z[6, 7] tHZCE ns 3 [6] tLZOE ns 7 ns 0 ns 15 ns WRITE CYCLE[8, 9] tWC Write Cycle Time 15 ns tSCE CE LOW to Write End 10 ns tAW Address Set-Up to Write End 10 ns tHA Address Hold from Write End 0 ns tSA Address Set-Up to Write Start 0 ns tPWE WE Pulse Width 10 ns tSD Data Set-Up to Write End 8 ns tHD Data Hold from Write End 0 ns tHZWE tLZWE WE LOW to High Z[8] WE HIGH to Low Z[6] 7 ns 3 ns Data Retention Characteristics (Over the Operating Range) Parameter Description VDR VCC for Data Retention tCDR Chip Deselect to Data Retention Time tR Operation Recovery Time Document #: 38-05225 Rev. ** Conditions VCC = VDR = 2.0V, CE > VCC – 0.3V, VIN > VCC – 0.3V or VIN < 0.3V Min. Max. Unit 2.0 V 0 ns tRC ns Page 5 of 10 WCFS0808V1E Data Retention Waveform DATA RETENTION MODE 3.0V VCC 3.0V VDR > 2V tCDR tR CE Switching Waveforms Read Cycle No. 1[10, 11] tRC ADDRESS tOHA DATA OUT tAA PREVIOUS DATA VALID DATA VALID Read Cycle No. 2[11, 12] tRC CE tACE OE tHZOE tHZCE tDOE DATA OUT tLZOE HIGH IMPEDANCE tLZCE VCC SUPPLY CURRENT HIGH IMPEDANCE DATA VALID tPD tPU ICC 50% 50% ISB Notes: 10. Device is continuously selected. OE, CE = VIL. 11. WE is HIGH for read cycle. 12. Address valid prior to or coincident with CE transition LOW. Document #: 38-05225 Rev. ** Page 6 of 10 WCFS0808V1E Switching Waveforms (continued) Write Cycle No. 1 (WE Controlled)[8, 13, 14] tWC ADDRESS CE tAW tHA tSA WE tPWE OE tSD DATA I/O NOTE 15 tHD DATAINVALID tHZOE Write Cycle No. 2 (CE Controlled)[8, 13, 14] tWC ADDRESS tSCE CE tSA tAW tHA WE tSD DATA I/O tHD DATAINVALID Write Cycle No. 3 (WE Controlled, OE LOW)[9, 14] tWC ADDRESS CE tAW WE tHA tSA tSD DATA I/O tHD DATA IN VALID NOTE 15 tHZWE tLZWE Notes: 13. Data I/O is high impedance if OE = VIH. 14. If CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state. 15. During this period, the I/Os are in the output state and input signals should not be applied. Document #: 38-05225 Rev. ** Page 7 of 10 WCFS0808V1E Truth Table CE WE OE Input/Output Mode Power H X X High Z Deselect/Power-Down Standby (ISB) L H L Data Out Read Active (ICC) L L X Data In Write Active (ICC) L H H High Z Deselect, Output Disabled Active (ICC) Ordering Information Speed (ns) Ordering Code 12 WCFS0808V1E–JC12 15 Package Name Package Type J 28-Lead Molded SOJ WCFS0808V1E–JC15 J 28-Lead Molded SOJ WCFS0808V1E–TC15 T 28-Lead Thin Small Outline Package Document #: 38-05225 Rev. ** Operating Range Commercial Page 8 of 10 WCFS0808V1E Package Diagrams 28-Lead (300-Mil) Molded SOJ J 28-Lead Thin Small Outline Package Type 1 (8x13.4 mm) T Document #: 38-05225 Rev. ** Page 9 of 10 WCFS0808V1E Revision History Document Title: WCFS0808V1E 32K x 8 3.3V Static RAM Document Number: Document #: 38-05225 Rev. ** REV. ECN NO. ISSUE DATE ORIG. OF CHANGE ** 113103 1/25/2002 XFL Document #: 38-05225 Rev. ** DESCRIPTION OF CHANGE New Datasheet Page 10 of 10