HANBIT HMS1M32M8L-55

HANBit
HMS1M32M8L
SRAM MODULE 4Mbyte(1Mx32Bit) ,LOW POWER,72Pin SIMM,5V
Part No. HMS1M32M8L, HMS1M32Z8L
GENERAL DESCRIPTION
The HMS1M32M8L is a static random access memory (SRAM) module containing 1,048,576 bits organized in a x32-bit
configuration. The module consists of eight 512K x 8 SRAMs mounted on a 72-pin, double-sided, FR4-printed circuit board.
The HMS1M32M8L also support low data retention voltage for battery back-up operations with low data retention current. Eight
chip enable inputs, (/CE_UU1, /CE_UM1, /CE_LM1, /CE_LL1, /CE_UU2, /CE_UM2, /CE_LM2, /CE_LL2) are used to enable
the module’s 4M bytes independently. Output enable(/OE) and write enable(/WE) can set the memory input and output.
Data is written into the SRAM memory when write enable (/WE) and chip enable (/CE) inputs are both LOW.
Reading is
accomplished when /WE remains HIGH and /CE and output enable (/OE) are LOW.
For reliability, this SRAM module is designed as multiple power and ground pin. All module components may be powered from
a single +5V DC power supply and all inputs and outputs are fully TTL-compatible.
FEATURES
PIN ASSIGNMENT
w Part identification
- HMS1M32M8L : SIMM design
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
- HMS1M32Z8L : ZIP design
The both are Pin to Pin Compatible
w Access times : 55ns, 70ns
w High-density 4MByte design
w High-reliability, low-power design
w Single + 5V ±0.5V power supply
w Low data retention voltage : 2V(min)
w Three state output and TTL-compatible
w FR4-PCB design
w Low profile 72-Pin SIMM
OPTIONS
MARKING
w Timing
55ns access
-55
70ns access
-70
w Packages
72-pin SIMM
M
72-pin ZIP
Z
SYMBOL
Vss
A3
A2
A1
A0
Vcc
A11
/OE
A10
Vcc
/CE_LL2
/CE_LL1
DQ7
DQ0
DQ1
DQ2
DQ6
DQ5
DQ4
DQ3
A15
A17
/WE
A13
PIN
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
SYMBOL
Vcc
DQ8
DQ9
DQ10
/CE_LM2
Vcc
/CE_LM1
DQ15
DQ14
DQ13
DQ12
DQ11
A18
A16
Vss
A6
Vcc
A5
A4
Vcc
/CE_UM2
/CE_UM1
DQ23
DQ16
PIN
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
SYMBOL
DQ17
DQ18
DQ22
DQ21
DQ20
DQ19
Vcc
A14
A12
A7
Vcc
A8
A9
DQ24
DQ25
DQ26
/CE_UU2
/CE_UU1
DQ31
DQ30
DQ29
DQ28
DQ27
Vss
SIMM
TOP VIEW
URL: www.hbe.co.kr
Rev. 1.0 (September / 2002)
1
HANBit Electronics Co.,Ltd.
HANBit
HMS1M32M8L
FUNCTIONAL BLOCK DIAGRAM
DQ 0-DQ31
A0-A18
32
19
A0-18
A0-18
/WE
DQ24-31
U4
/OE
DQ24-31
/WE
U8
/OE
/CE
/CE
/CE-UU2
/CE-UU1
A0-18
/WE
A0-18
DQ16-23
/WE
U3
/OE
/CE
/CE
/CE-UM2
A0-18
A0-18
/WE
DQ 8-15
/WE
U2
/OE
/OE
/CE
A0-18
DQ 0-7
/WE
U1
/OE
/WE
DQ 0-7
U5
/OE
/CE
/CE
/CE-LL1
Rev. 1.0 (September / 2002)
U6
/CE-LM2
A0-18
/WE
DQ 8-15
/OE
/CE
/CE-LM1
URL: www.hbe.co.kr
U7
/OE
/CE-UM1
/OE
DQ16-23
/CE-LL2
2
HANBit Electronics Co.,Ltd.
HANBit
HMS1M32M8L
TRUTH TABLE
MODE
/OE
/CE
/WE
DQ
POWER
STANDBY
X
H
X
HIGH-Z
STANDBY
NOT SELECTED
H
L
H
HIGH-Z
ACTIVE
READ
L
L
H
Q
ACTIVE
WRITE or ERASE
X
L
L
D
ACTIVE
NOTE: X means don’t care
ABSOLUTE MAXIMUM RATINGS
PARAMETER
SYMBOL
RATING
VIN,OUT
-0.5V to +7.0V
Voltage on Vcc Supply Relative to Vss
VCC
-0.5V to +7.0V
Power Dissipation
PD
8W
o
-65 C to +150oC
0oC to +70oC
Voltage on Any Pin Relative to Vss
Storage Temperature
TSTG
Operating Temperature
TA
w Stresses greater than those listed under " Absolute Maximum Ratings" may cause permanent damage to the device.
This is a stress rating only and functional operation of the device at these or any other conditions above those indicated
in the operating section of this specification is not implied. Exposure to absolute maximum rating conditions for extended
periods may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS ( TA=0 to 70 o C )
PARAMETER
*
SYMBOL
MIN
TYP.
MAX
Supply Voltage
VCC
4.5V
5.0V
5.5V
Ground
VSS
0
0
0
Input High Voltage
VIH
2.2
-
Vcc+0.5V**
Input Low Voltage
VIL
-0.5*
-
0.8V
VIL(Min.) = -2.0V (Pulse Width ≤ 10ns) for I ≤ 20 mA
** VIH(Min.) = Vcc+2.0V (Pulse Width ≤ 10ns) for I ≤ 20 mA
DC AND OPERATING CHARACTERISTICS (1)
(0oC ≤ TA ≤ 70 oC ; Vcc = 5V ± 0.5V )
PARAMETER
Input Leakage Current
Output Leakage Current
TEST CONDITIONS
VIN = Vss to Vcc
/CE=VIH or /OE =VIH or /WE=VIL
VOUT=Vss to VCC
SYMBOL
MIN
MAX
UNITS
ILI
-32
32
µA
IL0
-32
32
µA
2.4
Output High Voltage
IOH = -4.0mA
VOH
Output Low Voltage
IOL = 8.0mA
VOL
V
0.4
V
* Vcc=5.0V, Temp=25 oC
URL: www.hbe.co.kr
Rev. 1.0 (September / 2002)
3
HANBit Electronics Co.,Ltd.
HANBit
HMS1M32M8L
DC AND OPERATING CHARACTERISTICS (2)
DESCRIPTION
TEST CONDITIONS
Power Supply
-70
lCC
480
480
mA
/CE=VIH, Other inputs=VIL or VIH
lSB
96
96
mA
/CE≥Vcc-0.2V, Other inputs=0~Vcc
lSB1
400
400
µA
VIH, Read
Power Supply
Current:Standby
UNIT
-55
IIO=0mA,/CE=VIL, VIN=VIL or
Current:Operating
MAX
SYMBOL
CAPACITANCE
DESCRIPTION
Input /Output Capacitance
Input Capacitance
TEST CONDITIONS
SYMBOL
MAX
UNIT
VI/O=0V
CI/O
248
pF
CIN
320
pF
VIN=0V
* NOTE : Capacitance is sampled and not 100% tested
AC CHARACTERISTICS (0oC ≤ TA ≤ 70 oC ; Vcc = 5V ± 0.5V, unless otherwise specified)
Test conditions
PARAMETER
VALUE
Input Pulse Level
0.8 to 2.4V
Input Rise and Fall Time
5ns
Input and Output Timing Reference Levels
1.5V
Output Load
CL=100pF + 1TTL
* See test condition of DC and Operating characteristics
Output Load (B)
Output Load (A)
for tHZ, tLZ, tWHZ, tOW, tOLZ & tOHZ
VL=1.5V
+3.3V
50Ω
DOUT
319Ω
DOUT
Z0=50Ω
30pF
URL: www.hbe.co.kr
Rev. 1.0 (September / 2002)
4
353Ω
5pF*
HANBit Electronics Co.,Ltd.
HANBit
HMS1M32M8L
READ CYCLE
-55
PARAMETER
-70
SYMBOL
UNIT
MIN
MAX
55
MIN
MAX
Read Cycle Time
tRC
Address Access Time
tAA
55
70
70
ns
ns
Chip Select to Output
tCO
55
70
ns
Output Enable to Output
tOE
25
35
ns
Output Enable to Low-Z Output
tOLZ
5
5
ns
Chip Enable to Low-Z Output
tLZ
10
10
ns
Output Disable to High-Z Output
tOHZ
0
20
0
25
ns
Chip Disable to High-Z Output
tHZ
0
20
0
25
ns
Output Hold from Address Change
tOH
10
10
ns
WRITE CYCLE
PARAMETER
-55
SYMBOL
MIN
-70
MAX
MIN
MAX
UNIT
Write Cycle Time
tWC
55
70
ns
Chip Select to End of Write
tCW
45
60
ns
Address Set-up Time
tAS
0
0
ns
Address Valid to End of Write
tAW
45
60
ns
Write Pulse Width
tWP
40
50
ns
Write Recovery Time
tWR
0
0
ns
Write to Output High-Z
tWHZ
0
Data to Write Time Overlap
tDW
25
20
0
30
25
ns
ns
Data Hold from Write Time
tDH
0
0
ns
End of Write to Output Low-Z
tOW
5
5
ns
TIMING DIAGRAMS
Please refer to timing diagram chart(II)
URL: www.hbe.co.kr
Rev. 1.0 (September / 2002)
5
HANBit Electronics Co.,Ltd.
HANBit
HMS1M32M8L
FUNCTIONAL DESCRIPTION
/CE
/WE
/OE
MODE
I/O PIN
SUPPLY CURRENT
H
X*
X
Not Select
High-Z
l SB, l SB1
L
H
H
Output Disable
High-Z
lCC
L
H
L
Read
DOUT
lCC
L
L
X
Write
DIN
lCC
Note: X means Don't Care
DATA RETENTION CHARACTERISTICS* (TA = 0 to 70 ℃ )
PARAMETER
SYMBOL
TEST CONDITION
MIN
MAX
UNIT
VCC for Data Retention
VDR
/CE≥ VCC-0.2V
2
5.5
V
Data Retention Current
IDR
VCC=3.0V, /CE≥ VCC-0.2V
-
400
µA
VIN≥ VCC-0.2V or VIN≤ 0.2V
Data Retention Set-up Time
Recovery Time
tSDR
See Data Retention
0
-
ns
tRDR
Wave forms(below)
5
-
ns
* L-Version Only
DATA RETENTION WAVEFORM 1 (/CE Controlled)
tSDR
Data Retention Mode
tRDR
Vcc
4.5V
2.2V
VDR
/CE
/CE≥ Vcc- 0.2V
Vss
URL: www.hbe.co.kr
Rev. 1.0 (September / 2002)
6
HANBit Electronics Co.,Ltd.
HANBit
HMS1M32M8L
PACKAGING DIMENSIONS
SIMM Design
2.54 mm
MIN
0.25 mm MAX
1.29±0.08 mm
Gold : 1.04±0.10 mm
Solder : 0.914±0.10 mm
1.27
(Solder & Gold Plating Lead)
ORDERING INFORMATION
Component
Part Number
Density
Org.
Package
HMS1M32M8L-55
4MByte
1M×32bit
72Pin-SIMM
8EA
HMS1M32M8L-70
4MByte
1M×32bit
72Pin--SIMM
8EA
HMS1M32Z8L-55
4MByte
1M×32bit
72Pin-ZIP
8EA
HMS1M32Z8L-70
4MByte
1M×32bit
72Pin-ZIP
8EA
URL: www.hbe.co.kr
Rev. 1.0 (September / 2002)
7
Number
Vcc
SPEED
5.0V
55ns
5.0V
70ns
5.0V
55ns
5.0V
70ns
HANBit Electronics Co.,Ltd.