MP6002 Monolithic Flyback/Forward DC-DC Converter The Future of Analog IC Technology DESCRIPTION FEATURES The MP6002 is a monolithic Flyback/Forward DC-DC converter which includes a 150V power switch and is capable of delivering up to 30W output power. It can also be used for boost and SEPIC applications. The MP6002 uses the fixed-frequency peak current mode primary controller architecture. It has an internal soft-start, auto-retry, and incorporates over current, short circuit, and over-voltage protection. The MP6002 can also skip cycles to maintain zero load regulation. It has a direct optocoupler interface which bypasses the internal error amplifier when an isolated output is desired. Integrated 0.45Ω 150V Power Switch Cycle-by-Cycle Current Limiting Programmable Switching Frequency Duty Cycle Limiting with Line Feed Forward Integrated 100V Startup Circuit Internal Slope Compensation Disable Function Built-in Soft-Start Line Under Voltage Lockout Line Over Voltage Protection Auto-Restart for Opened/Shorted Output Zero Load Regulation Thermal Shutdown APPLICATIONS The MP6002 is ideal for telecom applications, and is available in a compact, thermally enhanced SO8 package with an exposed pad. Telecom Equipment VoIP Phones, Power over Ethernet (PoE) Distributed Power Conversion All MPS parts are lead-free and adhere to the RoHS directive. For MPS green status, please visit MPS website under Products, Quality Assurance page. “MPS” and “The Future of Analog IC Technology” are registered trademarks of Monolithic Power Systems, Inc. TYPICAL APPLICATION Efficiency vs Load Current VOUT +VIN D2 B330A 36V~72V D1 1N4148 5V @ 3A R6 30.1kΩ R7 402Ω C2 470μ F EFFICIENCY R1 249kΩ PC357 2 C1 2.2μ F x 2 6 3 R2 9.76kΩ 4 C4 10μ F R8 1MΩ SW LINE VIN VCC MP6002 GND FB COMP R9 475kΩ RT R10 20.5kΩ 8 7 C3 1 R3 10nF 5.6kΩ 5 R4 1 kΩ TL431 R5 10kΩ -VIN 0 0.5 1 1.5 2 2.5 3 3.5 LOAD CURRENT (A) MP6002 Rev. 1.0 12/4/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 1 MP6002 – MONOLITHIC FLYBACK/FORWARD DC-DC CONVERTER ORDERING INFORMATION Part Number* Package Top Marking Temperature MP6002DN SOIC8E MP6002DN –40C to +85C * For Tape & Reel, add suffix –Z (eg. MP6002DN–Z). For RoHS compliant packaging, add suffix –LF (eg. MP6002DN–LF–Z) PACKAGE REFERENCE TOP VIEW GND 1 8 SW LINE 2 7 VIN FB 3 6 VCC COMP 4 5 RT ABSOLUTE MAXIMUM RATINGS (1) VSW .............................................–0.5V to +180V VIN .............................................–0.3V to +120V All Other Pins ..............................–0.3V to +6.5V (2) Continuous Power Dissipation (TA = +25°C) ............................................................. 2.5W Junction Temperature ...............................150°C Lead Temperature ....................................260°C Storage Temperature.............. –65°C to +150°C Recommended Operating Conditions (3) Supply Voltage VCC ...........................4.5 V to 6V Output Voltage VSW ....................–0.5V to +150V Input Voltage VIN .........................+10V to +100V Operating Temperature............. –40C to +85C MP6002 Rev. 1.0 12/4/2013 Thermal Resistance (4) θJA θJC SOIC8E (Exposed Pad) ..........50 ...... 10 ... C/W Notes: 1) Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature TJ(MAX), the junction-toambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD(MAX)=(TJ(MAX)TA)/ θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) The device is not guaranteed to function outside of its operating conditions. 4) Measured on JESD51-7 4-layer board. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 2 MP6002 – MONOLITHIC FLYBACK/FORWARD DC-DC CONVERTER ELECTRICAL CHARACTERISTICS VCC = 5.0V, VLINE = 1.8V, RT = 20k, TA = +25C, unless otherwise noted. Parameter Quiescent Supply Current Line OV Threshold Voltage Line OV Hysteresis Line UV Threshold Voltage Line UV Hysteresis VCC Upper Threshold Voltage VCC Lower Threshold Voltage VCC Over Voltage Threshold Voltage Feedback Voltage Feedback Input Current Error Amplifier Gain Bandwidth (5) Error Amplifier DC Gain (5) Comp Output Source Current Comp Output Sink Current Switch-On Resistance Switch Leakage Current Minimum Oscillating Frequency Maximum Oscillating Frequency Thermal Shutdown (5) Thermal Shutdown Hysteresis (5) Current Limit (5) Startup Current Symbol Condition ICC 1.2V < VLINE < 3.2V, VFB = 1.3V VCC = 5.0V VCC = 5.0V VCC = 5.0V VCC = 5.0V VFB IFB GBW AV IOH IOL RON ILK FMIN FMAX ILIM Ist Min 5.75 4.30 Typ 1.0 3 300 1.21 100 6.0 4.50 6.25 4.70 Units mA V mV V mV V V 6.3 6.6 6.9 V 1.16 1.21 50 1.26 V nA MHz dB mA mA Ω µA kHz kHz C C A mA 2.85 1.16 VFB = 1.2V 1 60 VFB = 1.0V, VCOMP = 0.5V VFB = 1.4V, VCOMP = 2.5V VSW = 0.1V VSW = 150V RT = 100k RT = 10k VIN = 20V, VCC = 4.0V 2 2 0.45 1 55 550 150 30 4 3 Max 1.5 3.15 1.26 Note: 5) Guaranteed by design, not production tested. MP6002 Rev. 1.0 12/4/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 3 MP6002 – MONOLITHIC FLYBACK/FORWARD DC-DC CONVERTER PIN FUNCTIONS Pin # 1 2 3 4 5 6 7 8 Name Description GND LINE Ground. Power return and reference node. UV/OV Set Point. Short to ground to turn the controller off. Regulation Feedback Input. Inverting input of the error amplifier. The non-inverting is internally FB connected to 1.2V COMP Error Amplifier Output. Oscillator Resistor and Synchronous Clock Pin. Connect an external resistor to GND for RT oscillator frequency setting. It can be used as a synchronous input from external oscillator clock. VCC Supply Bias Voltage. A capacitor no less than 1uF is recommended to connect between GND. VIN High Voltage Startup Circuit Supply. Output Switching Node. High voltage power N-Channel MOSFET drain output. The internal SW start bias current is supplied from this pin. MP6002 Rev. 1.0 12/4/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 4 MP6002 – MONOLITHIC FLYBACK/FORWARD DC-DC CONVERTER TYPICAL PERFORMANCE CHARACTERISTICS VIN = 48V, VOUT = 5V, TA = +25ºC, unless otherwise noted. Steady State Test Synchronize Programmable Synchronize Programmable VIN = 48V, VOUT = 5V, IOUT = 3A FSW = 55KHz, FSYNC=60KHz. FSW = 55KHz, FSYNC=550KHz VOUT AC Coupled 50mV/div. VOUT 5V/div. VOUT 5V/div. VSYNC 5V/div. VSYNC 5V/div. VSW 50V/div. VSW 50V/div. IPRI 1A/div. VSW 50V/div. IPRI 500mA/div. IPRI 1A/div. 1us/div. 10us/div. Short Circuit State VIN = 48V, IOUT = 3A 2us/div. Short Circuit Entry Short Circuit Recovery VIN = 48V, IOUT = 3A VIN = 48V, IOUT = 3A VOUT 5V/div. VOUT 2V/div. VCC 2V/div. VSW 100V/div. VCC 2V/div. VOUT 5V/div. VCC 2V/div. VSW 100V/div. VSW 100V/div. IPRI 2A/div. IPRI 2A/div. 40ms/div. IPRI 2A/div. 20ms/div. Load Transient Response 40ms/div. Current Limit vs Duty Cycle VIN = 48V, VOUT = 5V, IOUT = 1.5A~3A @ 2.5A/us 5.00 Current Limit (A) 4.75 VOUT 50mV/div. IPRI 1A/div. 400υs/div. 4.50 4.25 4.00 3.75 3.50 3.25 3.00 10 20 30 40 50 60 70 Duty Cycle(%) MP6002 Rev. 1.0 12/4/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 5 MP6002 – MONOLITHIC FLYBACK/FORWARD DC-DC CONVERTER TYPICAL PERFORMANCE CHARACTERISTICS VIN = 48V, VOUT = 5V, TA = +25ºC, unless otherwise noted. MP6002 Rev. 1.0 12/4/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 6 MP6002 – MONOLITHIC FLYBACK/FORWARD DC-DC CONVERTER OPERATION The MP6002 uses programmable fixedfrequency, peak current-mode PWM with a single-ended primary architecture to regulate the output voltage. The MP6002 incorporates features such as protection circuitry and an integrated high voltage power switch into a small 8-pin SOIC. This product targets high performance, cost effective DC-DC converter applications. 6 VCC + 6.5V 4.5V -LINE 2 + 3.0V 1.2V OVLO -- REGULATOR IBIAS REF + STARTUP UVLO -- 7 VIN 8 SW THERMAL MONITOR COMP 4 ERROR AMPLIFIER 1.2V FB 3 + CONTROL LOGIC -- EA -- + 1 GND PWM COMPARATOR SOFT-START CURRENT LIMIT CLOCK RT 5 -+ CURRENT LIMIT COMPARATOR + 1.0V -- OSC SLOPE COMP Σ LEB CURRENT SENSE Figure 1—Functional Block Diagram MP6002 Rev. 1.0 12/4/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 7 MP6002 – MONOLITHIC FLYBACK/FORWARD DC-DC CONVERTER High Voltage Startup The MP6002 features a 100V startup circuit, see Figure 1. When power is applied, the capacitor at the VCC pin is charged through the VIN pin. When the voltage at the VCC pin crosses 6.0V without fault, the controller is enabled. The VCC pin is then disconnected from the VIN pin and VCC voltage is discharged via the operating current. When VCC drops to 4.5V, the VCC pin is reconnected to the VIN pin and VCC will be recharged. The voltage at the VCC pin repeats this ramp cycle between 4.5V and 6.0V. VIN needs to be higher than 10V in order to keep high voltage startup circuit working properly. This can be guaranteed by setting input UVLO≥10V. It is also recommended that the capacitor at VCC pin be no less than 1uF to achieve stable operation. The VCC pin can be powered with a voltage higher than 4.5V from an auxiliary winding to reduce the power dissipated in the internal start-up circuit. The VCC pin is internally clamped at 8V. Under-Voltage and Over-Voltage Detection The MP6002 includes a line monitor circuit. Two external resistors form a voltage divider from the input voltage to GND; its tap connects to the LINE pin. The controller is operational when the voltage at the UV/OV pin is between 1.2V and 3V. When the voltage at the UV/OV pin goes out of this operating range, the controller is disabled and goes into standby mode. The LINE pin can also be used as a remote enable. Grounding the UV/OV pin will disable the controller. Error Amplifier The MP6002 includes an error amplifier with its non-inverting input connected to internal 1.2V reference voltage. The regulated voltage is fed back through a resistor network or an optocoupler to the FB pin. Figure 2 shows some common error amplifier configurations. 6 VCC D1 1.2V C1 + EA -- R1 FB COMP 3 4 C2 PRIMARY WINDING R3 C3 R2 (a) Using Primary winding to provide feedback 6 VCC 1.2V + EA -- C2 COMP FB 3 4 R3 R2 (b) Feedback is from Secondary (Common Collector) Figure 2—Error Amplifier Configurations Synchronize Programmable Oscillator The MP6002 oscillating frequency is set by an external resistor from the RT pin to ground. The value of RT can be calculated from: RT 10k 550KHz fS The MP6002 can be synchronized to an external clock pulse. The frequency of the clock pulse must be higher than the internal oscillator frequency. The clock pulse width should be within 50ns to 150ns. The external clock can be coupled to the RT pin with a 100pF capacitor and a peak level greater than 3.5V. Duty Cycle Limiting with Line Feed Forward The MP6002 has a DMAX (maximum duty cycle) limit at 67.5% when the LINE pin voltage is equal to 1.3V. As VLINE increases, DMAX reduces. Maximum duty cycle can be calculated by: 2 .7 V D MAX 100% 2.7 V VLINE MP6002 Rev. 1.0 12/4/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 8 MP6002 – MONOLITHIC FLYBACK/FORWARD DC-DC CONVERTER Limiting the duty cycle at high line voltage protects against magnetic saturation and minimizes the output sensitivity to line transients. Auto-Restart When VCC is biased from an auxiliary winding and an open loop condition occurs, the voltage at the VCC pin increases to 6.5V. When VCC crosses the threshold voltage, the auto-restart circuit turns off the power switch and puts the controller in standby mode. When VCC drops to 4.5V, the startup switch turns on to charge VCC up again. When VCC crosses 6.0V, the switch turns off and the standby current discharges VCC back to 4.5V. After repeating the ramp cycles between the two threshold voltages 15 times, the auto-restart circuit is disabled and the controller begins soft-start. Over Current Protection The MP6002 has cycle-by-cycle over current limit when the internal switch current peak value exceeds the set current limit threshold. Meanwhile, the output voltage starts to drop until FB is below the Under-Voltage (UV) threshold, typically 33% below the FB reference. Once a UV is triggered, the MP6002 enters hiccup mode to periodically restart the part (the MP6002 turns off the switch until Vcc repeats the ramp cycles between 4.5V to 6V for 15 times). This protection mode is especially useful when the output is dead-short to ground. The average short circuit input current is greatly reduced to alleviate the thermal issue and protect the regulator. The MP6002 exits the hiccup mode once the over current condition is removed. MP6002 Rev. 1.0 12/4/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 9 MP6002 – MONOLITHIC FLYBACK/FORWARD DC-DC CONVERTER APPLICATION INFORMATION Switching Frequency The frequency (fS), has big effects on the selection of the transformer (Tr), the output cap, (C2), and the input cap, (C1). The higher the frequency, the smaller the sizes for Tr, C2, and C1. However, a higher frequency also leads to higher AC power losses in the power switch, control circuitry, transformer, and in the external interconnection. The general rule states that lower the output power, higher the optimum switching frequency. For low current (<10A) applications, fS is usually 200KHz to 300KHz if synchronous rectifiers are used and 300KHz to 500KHz if Schottky rectifiers are used. Fundamental Equations The transformer turns ratio N is defined as: N NP NS Where NP and NS are the number of turns of the primary and secondary side windings, respectively. The output voltage VO is estimated to be: VO V D IN 1 D N The steady-state drain to source voltage of the primary power switch when it is off is estimated as: VDS VIN N VO VD2 VO For a 5V power supply design, with VIN=36V~75V, below table shows the voltage stresses of the power switch (S) and the rectifier (D2). Table 1—Main Switch (S) and Rectifier (D2) Voltage Stress vs. Transformer Turns Ratio Where D is the duty cycle. The steady-state reverse voltage Schottky diode D2 is estimated as: Transformer (Coupled Inductor) Design 1. Transformer Turns Ratio The transformer turns ratio determines the duty cycle range, selection of the rectifier (D2), primary side peak current, primary snubber loss, and the current as well as voltage stresses on the power switch (S). It also has effects on the selection of C1 and C2. A higher transformer turns ratio (N) means the following: Higher Duty Cycle Higher voltage stress on S (VDS), but lower voltage stress on D2 (VD2). Lower primary side RMS current (IS(RMS)), but higher secondary side RMS current (ID2(RMS)). Use of a smaller input capacitor but bigger output capacitor. Lower primary side peak current (IS(PEAK)) and lower primary snubber loss. Lower main switch (S) turn-on loss of the VIN N The output current is calculated as: IO ID (1 D) N DMAX 4 5 6 7 8 9 10 11 0.36 0.41 0.45 0.49 0.53 0.56 0.58 0.60 VDS (V) 119 125 131 138 144 150 156 163 VDS/0.9 (V) 132 139 146 153 160 167 174 181 VD2 (V) 38 32 28 25 23 21 20 19 VD2/0.9 (V) 42 36 31 28 26 24 22 21 Note: The voltage spike due to the leakage inductance of the transformer and device’s voltage rating/derating factors were considered. See power switch selection and snubber design for more information. Where ID is the average current through Schottky diode when it is conducting. The input current is calculated as: IIN IS D Where IS is the average current through the primary power switch when it is conducting. MP6002 Rev. 1.0 12/4/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 10 MP6002 – MONOLITHIC FLYBACK/FORWARD DC-DC CONVERTER 2. Ripple Factor of the Magnetizing Current The conduction loss in S, D2, the transformer, the snubber, and in the ESR of the input/output capacitors will increase as the ripple of the magnetizing current increases. The ripple factor (Kr) is defined as the ratio of the peak-to-peak ripple current vs. the average current as shown in Figure 3. Kr IM IM The number of primary turns can be determined by: Where IM can be derived either from input or output current; IM 4. Winding Selection Solid wire, Litz wire, PCB winding, Flex PCB winding or any combination thereof can be used as transformer winding. For low current applications, solid wire is the most cost effective choice. Consider using several wires in parallel and interleaving the winding structure for better performance of the transformer. IIN I0 D N (1 D) ID2/N NP Where BMAX is the allowed maximum flux density (usually below 300mT) and AE is the effective area of the core. The air gap can be estimated by: IM Gap IM 0 DTS TS Figure 3—Magnetic Current of Flyback Transformer (Reflected to Primary Side) The input/output ripple voltage will also increase with a high ripple factor, which makes the filter bigger and more expensive. On the other hand, it can help to minimize the turn-on loss of S and reverse-recovery loss due to D2. With nominal input voltage, Kr can be selected at 60%~120% for most DC-DC converters. The primary side (or magnetizing) inductance can be determined by: LF L F IP B MAX A E VIN D TS K r IM 3. Core Selection Pick a core based on experience or through a catalog (Refer to http://www.ferroxcube.com). o N2 A E LF 5. Right Half Plane Zero A Flyback converter operating in continuous mode has a right half plane (RHP) zero. In the frequency domain, this RHP zero adds not only a phase lag to the control characteristics but also increases the gain of the circuit. Typical rule of thumb states that the highest usable loop crossover frequency is limited to one third the value of the RHP zero. The expression for the location of the RHP zero in a continuous mode flyback is given by: fRHPZ R LOAD (1 D) 2 N2 2 L F D Where RLOAD is the load resistance, LF is the magnetizing inductance on transformer primary side, and N is the transformer’s turn ratio. Reducing the primary inductance increases the RHP zero frequency which results in higher crossover frequencies. Select an ER, EQ, PQ, or RM core to minimize the transformer’s leakage inductance. MP6002 Rev. 1.0 12/4/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 11 MP6002 – MONOLITHIC FLYBACK/FORWARD DC-DC CONVERTER Duty Cycle Range The duty cycle range is determined once N is selected. In general, the optimum operating duty cycle should be smaller for high input/low output than low input/high output applications. Except for high output voltage or wide input range applications, the maximum D usually does not exceed 60%. Voltage Stress of the Internal Power Switch & External Schottky Diode For the internal power switch, the voltage stress is given by: VDS VIN VO N VP Where VP is a function of LLK (leakage inductrance), fS, R, C, CDS, VIN, IO, etc. Please refer to Figure 4. The lower the LLK and Io, the lower the Vp. Smaller R can reduce Vp, but power loss will increase. See Snubber Design for details. Typically VP can be selected as 20~40% of (VIN+NVO). LLK VC -- C + R D2 Tr C2 can be selected (VO+VIN/N), thus: VPD2 as 40~100% of VDS(MAX) K s ( VIN(MAX) NV0 ) Where KS=1.2~1.4, and VD 2(MAX ) K D 2 ( V0 VIN(MAX ) N ) Where KD2=1.4~2. For example, VIN(MAX ) 75 V, N 8, K S 1.25, K D2 1.6, VO 5 V So VDS 1.25 (75 V 8 5 V ) 144 V VD2 1.6 (5 V 75 V 8) 23 V the power switch rating should be higher than 144V, and the rated voltage for the synchronous rectifier or Schottky diode should be higher than 23V. Snubber Design (Passive) Snubber for Power Switch Figure 5 shows four different ways to clamp the voltage on the power device. RCD type of snubber circuit is widely used in many applications. D C1 ID2 IS + VDS -- S S RD S DZ CD (A) VP VC (B) VDS CD RD DZ S S VIN 0 Figure 4—Key Operation Waveform For the rectifier, D2, the voltage stress is given by: VD2 VO (C) (D) Figure 5—Snubber Designs VIN VPD 2 N Use of a R-C or R-C-D type snubber circuit for D2 is recommended. MP6002 Rev. 1.0 12/4/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 12 MP6002 – MONOLITHIC FLYBACK/FORWARD DC-DC CONVERTER RCD Type of Snubber Design Procedure: 1. Setting VP Higher VP means higher voltage stress on the power switch, but lower power loss. Usually, VP can be set as 20%~40% of (VIN+ NxVO). VP VC N x VO VIN For a given AC ripple voltage, ΔVIN_PP, C1 can be derived from: C1 IIN (1 D) TS VIN _ PP ΔVIN_PP may affect the C1 voltage rating and converter stability. C1 RMS current has to be considered: (1 D) D IRMS _ C1 IIN C1 has to have enough RMS current rating. VDS 0 Figure 6—Voltage Waveform of Primary Power Switch Shown in Figure 5(C) 2. Estimated RCD snubber loss is given by: PRCD _ LOSS PLK (1 N VO ) VP Where: PLK 1 2 L LK IP f C 2 PLK is the energy stored in the leakage inductance (LLK), which carries the peak current at the power switch turn-off. 3. Calculate values of the RD and CD of RCD snubber by: RD VP 2 PRCD _ LOSS R D C D 1 fS Input Capacitor The input capacitors (C1) are chosen based upon the AC voltage ripple on the input capacitors, RMS current ratings, and voltage rating of the input capacitors. MP6002 Rev. 1.0 12/4/2013 Output Filter The simplest filter is an output capacitor (C2), whose capacitance is determined by the output ripple requirement. The current waveform in the output capacitor is mostly in rectangular shape. The full load current is drawn from the capacitors during the primary switch on time. The worse case for the output ripple occurs under low line and full load conditions. The ripple voltage can be estimated by: V0 PP C IO D C2 f S ESR also needs to be specified for the output capacitors. This is due to the step change in D2 current results in a ripple voltage that is proportional to the ESR. Assuming that the D2 current waveform is in rectangular shape, the ESR requirement is then obtained by given the output ripple voltage. VO PP _ RESR IO ESR (1 D) The total ripple voltage can be estimated by: VO PP VO PP C VO PP _ ESR www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 13 MP6002 – MONOLITHIC FLYBACK/FORWARD DC-DC CONVERTER Control Design Generally, telecom power supplies require the galvanic isolation between a relatively high input voltage and low output voltages. The most widely used devices to transfer signals across the isolation boundary are pulse transformers and optocouplers. VO D Tr VIN RESR CO + -- RLOAD The MP6002 uses current mode control to achieve easy compensation and fast transient response. A type II compensation network which has two poles and one zero is needed to stabilize the system. The practical compensation parameters are provided in the EV6002DN datasheet. Boost Controller Application The MP6002 can be used as a boost controller as shown in Figure 8. D1 200V/1A VIN d S VCC 1 R5 R1 + 2 GND SW LINE VIN 8 7 MP6002 R6 -- 180V 20mA R2 C1 R3 -- 3 + 4 VREF R4 TL431 FB COMP VCC RT 6 5 Rb Figure 7—Simplified Circuit of Isolated Power Supply with Optocoupler Feedback Figure 8—High Voltage LED Boost Controller Circuit MP6002 Rev. 1.0 12/4/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 14 MP6002 – MONOLITHIC FLYBACK/FORWARD DC-DC CONVERTER PACKAGE INFORMATION SOIC8E 0.189(4.80) 0.197(5.00) 8 0.124(3.15) 0.136(3.45) 5 0.150(3.80) 0.157(4.00) PIN 1 ID 1 0.228(5.80) 0.244(6.20) 0.089(2.26) 0.101(2.56) 4 TOP VIEW BOTTOM VIEW SEE DETAIL "A" 0.013(0.33) 0.020(0.51) 0.051(1.30) 0.067(1.70) SEATING PLANE 0.000(0.00) 0.006(0.15) 0.0075(0.19) 0.0098(0.25) SIDE VIEW 0.050(1.27) BSC FRONT VIEW 0.010(0.25) x 45o 0.020(0.50) GAUGE PLANE 0.010(0.25) BSC 0.050(1.27) 0.024(0.61) 0o-8o 0.016(0.41) 0.050(1.27) 0.063(1.60) DETAIL "A" 0.103(2.62) 0.213(5.40) NOTE: 0.138(3.51) RECOMMENDED LAND PATTERN 1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN BRACKET IS IN MILLIMETERS. 2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. 3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. 4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.004" INCHES MAX. 5) DRAWING CONFORMS TO JEDEC MS-012, VARIATION BA. 6) DRAWING IS NOT TO SCALE. NOTICE: The information in this document is subject to change without notice. Please contact MPS for current specifications. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MP6002 Rev. 1.0 12/4/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 15