Product specification IRLML6302PbF l l l l l l l l HEXFET® Power MOSFET Generation V Technology Ultra Low On-Resistance P-Channel MOSFET SOT-23 Footprint Low Profile (<1.1mm) Available in Tape and Reel Fast Switching Lead-Free * VDSS = -20V ' 6 RDS(on) = 0.60Ω Description Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. A customized leadframe has been incorporated into the standard SOT-23 package to produce a HEXFET Power MOSFET with the industry's smallest footprint. This package, dubbed the Micro3, is ideal for applications where printed circuit board space is at a premium. The low profile (<1.1mm) of the Micro3 allows it to fit easily into extremely thin application environments such as portable electronics and PCMCIA cards. Micro3TM Absolute Maximum Ratings Parameter I D @ TA = 25°C I D @ TA = 70°C IDM PD @TA = 25°C VGS dv/dt TJ, TSTG Max. Continuous Drain Current, VGS @ -4.5V Continuous Drain Current, VGS @ -4.5V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery dv/dt Junction and Storage Temperature Range Units -0.78 -0.62 -4.9 540 4.3 ± 12 -5.0 -55 to + 150 A mW mW/°C V V/ns °C Thermal Resistance Parameter RθJA Maximum Junction-to-Ambient http://www.twtysemi.com [email protected] Typ. Max. 230 Units °C/W 1 of 2 Product specification IRLML6302PbF Electrical Characteristics @ TJ = 25°C (unless otherwise specified) Parameter Drain-to-Source Breakdown Voltage ∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient V(BR)DSS RDS(ON) Static Drain-to-Source On-Resistance VGS(th) gfs Gate Threshold Voltage Forward Transconductance IDSS Drain-to-Source Leakage Current I GSS Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Min. -20 -0.70 0.56 Typ. -4.9 2.4 0.56 1.0 13 18 22 22 97 53 28 Max. Units Conditions V VGS = 0V, ID = -250µA mV/°C Reference to 25°C, ID = -1mA 0.60 VGS = -4.5V, ID = -0.61A Ω 0.90 VGS = -2.7V, ID = -0.31A -1.5 V VDS = VGS, ID = -250µA S VDS = -10V, ID = -0.31A -1.0 VDS = -16V, VGS = 0V µA -25 VDS = -16V, VGS = 0V, TJ = 125°C -100 VGS = -12V nA 100 VGS = 12V 3.6 ID = -0.61A 0.84 nC VDS = -16V 1.5 VGS = -4.5V, See Fig. 6 and 9 VDD = -10V ID = -0.61A ns RG = 6.2Ω RD = 16Ω, See Fig. 10 VGS = 0V pF VDS = -15V = 1.0MHz, See Fig. 5 Source-Drain Ratings and Characteristics IS I SM VSD trr Q rr Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Min. Typ. Max. Units -0.54 -4.9 ––– ––– ––– ––– 35 26 -1.2 53 39 A V ns nC Conditions MOSFET symbol showing the integral reverse p-n junction diode. TJ = 25°C, IS = -0.61A, VGS = 0V TJ = 25°C, IF = -0.61A di/dt = -100A/µs D G S Notes: Repetitive rating; pulse width limited by max. junction temperature. ( See fig. 11 ) ISD ≤ -0.61A, di/dt ≤ 76A/µs, VDD≤V(BR)DSS, TJ ≤ 150°C http://www.twtysemi.com Pulse width ≤ 300µs; duty cycle ≤ 2%. Surface mounted on FR-4 board, t ≤ 5sec. [email protected] 2 of 2