ANPEC APW7215QBI-TRG

APW7215
Fixed 600kHz Step-UP Converter for White LEDs
Features
General Description
•
Wide Input Voltage from 2.7V to 6V
•
Fixed 600kHz Switching Frequency
The APW7215 is a current-mode and fixed frequency
600kHz boost converter with an integrated N-FET to drive
•
Reference Voltage : 0.2V
•
PWM brightness control with wide frequency
white LEDs.
The series connection allows the LED current to be identical for uniform brightness. Its low on-resistance of NFET
and low feedback voltage reduce power loss and achieve
range of 5KHz to 100KHz
•
Build-in Power MOSFET: 0.3Ω
•
Over-Voltage Protection
•
Under Voltage Lockout Protection
•
Over Temperature Protection
•
<1µA Quiescent Current during Shutdown
•
TDFN2x2-6 Package
•
Halogen and Lead Free Available (RoHS
high efficiency. 600kHz Constant switching frequency allows using small-size inductor and both of input and output capacitors. An over voltage protection function, which
monitors the output voltage via LX pin, stops switching of
the IC if the LX voltage exceeds the over voltage threshold.
An internal soft-start circuit eliminates the inrush current
during start-up.
The APW7215 also integrates under-voltage lockout and
Compliant)
over-temperature protection to protect the IC in abnormal
conditions. The APW7215 is available in TDFN2x2-6
Applications
package.
•
White LED Display Backlighting
•
Cell Phone and Smart Phone
•
PDA, PMP, MP3
•
Digital Camera
Pin Configuration
FB 1
6 VIN
NC 2
5 EN
GND 3
4 LX
APW7215
TDFN2x2-6
Top View
Simplified Application Circuit
VIN
VOUT
L1
22µH
C1
1µF
VIN
LX
C2
1µF
10 strings
GND
EN
FB
PWM Dimming
R1
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and
advise customers to obtain the latest version of relevant information to verify before placing orders.
Copyright  ANPEC Electronics Corp.
Rev. A.2 - Oct., 2012
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APW7215
Ordering and Marking Information
Package Code
QB: TDFN2x2-6
APW7215
Assembly Material
Handling Code
Temperature Range
Package Code
APW7215QB:
W15
X
Operating Ambient Temperature Range
I : -40 to 85oC
Handling Code
TR : Tape & Reel
Assembly Material
G : Halogen and Lead Free Device
X - Date Code
Note: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which
are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020D for
MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant) and halogen
free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by
weight).
Absolute Maximum Ratings
Symbol
(Note 1)
Rating
Unit
VIN Pin to GND
-0.3 to 7
V
FB and EN to GND
-0.3 ~ VIN
V
VLX
LX Pin to GND
-0.3 to 40
V
PD
Power Dissipation
TJ
Maximum Junction Temperature
VIN
Parameter
TSTG
Storage Temperature Range
TSDR
Maximum Lead Soldering Temperature, 10 Seconds
Internally Limit
W
150
°C
-65 to 150
°C
260
°C
Note1: Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are
stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device
reliability
Thermal Characteristics
Symbol
θJA
θJC
Parameter
Typical Value
Junction-to-Ambient Resistance in free air (Note 2)
Junction-to-Case Resistance
TDFN2x2-6
TDFN2x2-6
Unit
165
o
20
o
C/W
C/W
Note 2: θJA is measured with the component mounted on a high effective thermal conductivity test board in free air.
Copyright  ANPEC Electronics Corp.
Rev. A.2 - Oct., 2012
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APW7215
Recommended Operating Conditions (Note 3)
Symbol
Parameter
Range
Unit
VIN
VIN Input Voltage
2.7 ~ 6
V
CIN
Input Capacitor
1~
µF
Output Capacitor
1~
µF
COUT
L1
Converter Output Inductor
4.7 ~ 22
µH
TA
Ambient Temperature
-40 ~ 85
°C
TJ
Junction Temperature
-40 ~ 125
°C
Note 3: Please refer to the typical application circuit.
Electrical Characteristics
Refer to the typical application circuits. These specifications apply over. VIN=3.6V, TA=25°C.
Symbol
Parameter
APW7215
Test Conditions
Unit
Min.
Typ.
Max.
2.7
-
6
SUPPLY VOLTAGE AND CURRENT
VIN
Input Voltage Range
VFB = 0.4V, no switching
-
-
800
µA
VFB = GND, switching
-
1.2
1.7
mA
EN = GND
-
-
1
µA
UVLO Threshold Voltage
VIN Rising
2.2
2.4
2.6
V
UVLO Hysteresis Voltage
VIN Falling
50
100
200
mV
Regulated Feedback Voltage
VIN=2.7V ~ 6V, TA = 25°C
194
200
206
mV
FB Input Current
VFB=1.23V
-1
-
1
µA
540
600
660
kHz
VIN=3.6V
-
0.3
0.7
VIN=3V
-
-
0.7
VEN=0V, VLX=35V, VIN = 6V
-
-
100
µA
92
95
98
%
36
38
40
V
1.5
-
-
A
IDD1
IDD2
V
Input DC Bias Current
ISD
UNDER-VOLTAGE LOCKOUT
REFERENCE AND OUTPUT VOLTAGES
VREF
IFB
INTERNAL POWER SWITCH
FSW
Switching Frequency
RON
Power Switch On Resistance
LX Leakage Current
DMAX
LX Maximum Duty Cycle
Ω
OUTPUT OVER VOLTAGE PROTECTION
VLX_OVP
Over Voltage Threshold
VLX Rising
POWER SWITCH CURRENT LIMIT
ILIM
N-Channel MOSFET Current Limit
Copyright  ANPEC Electronics Corp.
Rev. A.2 - Oct., 2012
Duty = DMAX
3
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APW7215
Electrical Characteristics(Cont.)
Refer to the typical application circuits. These specifications apply over. VIN=3.6V, TA=25°C.
Symbol
Parameter
APW7215
Test Conditions
Min.
Typ.
Unit
Max.
ENABLE AND SHUTDOWN
Enable Voltage Threshold
VEN Rising
1
-
-
V
Shutdown Voltage Threshold
VEN Falling
-
-
0.4
V
EN Pulled Low Resistance
-
800
-
kΩ
Use VEN=3V to enable to device, PWM
Dimmimg Frequency=5k to 100k Hz
-
4.7
-
%
Over-Temperature Protection (Note 4)
TJ Rising
-
150
-
°C
Over-Temperature Protection
Hysteresis (Note 4)
TJ Falling
-
40
-
°C
EN Minimum On Pulsed Width
OVER-TEMPERATURE PROTECTION
TOTP
Note 4: Guaranteed by design, not production tested.
Pin Description
PIN.
FUNCTION
TDFN-2x2-6
NAME
1
FB
Feedback Pin. Connect this pin to cathode of the lowest LED and current-sense resistor
(R1). Calculate resistor value according to R1=VREF/ILED.
2
NC
3
GND
No Commend.
4
LX
Switch pin. Connect this pin to inductor/diode here.
5
EN
Enable Control Input. Forcing this pin above 1.0V enables the device, or forcing this pin
below 0.4V to shut it down. In shutdown, all functions are disabled to decrease the supply
current below 1µA.
6
VIN
Main Supply Pin. Must be closely decoupled to GND with a 1µF or greater ceramic
capacitor.
Exposed Pad
GND
Connecting this pad to GND.
Power and signal ground pin.
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Rev. A.2 - Oct., 2012
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APW7215
Typical Operating Characteristics
EN Dimming Cycle vs. LED Current
Vin Input Voltage vs. Efficiency
21
100.0
18
LED Current (mA)
Efficiency (%)
90.0
80.0
70.0
15
12
9
- 5K Hz
- 50K Hz
- 100K Hz
6
60.0
3
50.0
2.5
3
3.5
4
4.5
5
5.5
0
6
0
10
20
30
Vin Input Voltage (V)
60
70
80
90 100
100
Maximum Duty Cycle (%)
20.5
20.3
LED Current (mA)
50
Vin Input Voltage vs. Max Duty Cycle
Vin Input Voltage vs. LED Current
20.1
19.9
19.7
19.5
3
40
EN Dimming Cycle (%)
3.25
3.5
3.75
4
4.25
4.5
4.75
99.5
99
98.5
98
97.5
97
2.5
5
3
3.5
4
4.5
5
5.5
6
6.5
Vin Input Voltage (V)
Vin Input voltage (V)
EN Dimming cycle vs. Feedback Voltage
Vin Input Voltage vs. RON
200
0.5
180
Feedback Voltage(mV)
RON (ohm)
0.4
0.3
0.2
0.1
160
140
120
100
80
60
- 5K Hz
- 50K Hz
- 100K Hz
40
20
0
2.5
0
3
3.5
4
4.5
5
5.5
6
20
40
60
80
100
EN Dimming cycle (%)
Vin Input Voltage (V)
Copyright  ANPEC Electronics Corp.
Rev. A.2 - Oct., 2012
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APW7215
Typical Operating Characteristics
Efficiency vs. LED Current
100
Efficiency (%)
90
80
70
60
- Vin=4.2V
- Vin=3.6V
50
40
10
20
30
40
50
60
70
80
90
100 110
LED Current (mA)
Copyright  ANPEC Electronics Corp.
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APW7215
Operating Waveforms
Dimming, 100K [email protected]% duty
Normal Operation
1
CH1
3
CH3
4
CH4
2
CH2
CH1:VOUT-20V/div
CH2:Lx-20V/div
CH3:VFB-200mV/div
CH4:IL-500mA/div
Time:2us/div
CH1:VOUT-20V/div
CH2:VLX-20V/div
CH3:VEN-2V/div
CH4:IL-500mA/div
Time:2us/div
OVP
Power On
CH1
CH1
CH3
CH3
CH4
CH4
CH2
CH2
CH1:VOUT-20V/div
CH2:VLX-20V/div
CH3:VEN-2V/div
CH4:IL-2A/div
Time:2ms/div
Copyright  ANPEC Electronics Corp.
Rev. A.2 - Oct., 2012
CH1:VOUT-20V/div
CH2:VLX-20V/div
CH3:VEN-2V/div
CH4:IL-1A/div
Time:4ms/div
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APW7215
Operating Waveforms
Power Off
CH1
CH3
CH4
CH2
CH1:VOUT-20V/div
CH2:VLX-20V/div
CH3:VEN-2V/div
CH4:IL-500mA/div
Time:200ms/div
Copyright  ANPEC Electronics Corp.
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APW7215
Block Diagram
VIN
VLX_OVP
UVLO
LX
EN
Control Logic
Thermal
Shutdown
Σ
Oscillator
ICMP
EAMP
FB
GND
COMP
VREF
NC
Soft-start
Typical Application Circuits
VIN
ILED
L1
VOUT
22µH
C1
1µF
VIN
LX
C2
1µF
10 strings
GND
EN
FB
PWM
Dimming
Control
Copyright  ANPEC Electronics Corp.
Rev. A.2 - Oct., 2012
R1
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APW7215
Function Description
Main Control Loop
Over-Temperature Protection (OTP)
The APW7215 is a constant frequency current-mode
The over-temperature circuit limits the junction tempera-
switching regulator. During normal operation, the internal N-channel power MOSFET is turned on each cycle
ture of the APW7215. When the junction temperature exceeds 150 oC, a thermal sensor turns off the power
when the oscillator sets an internal RS latch and turned
off when an internal comparator (ICMP) resets the latch.
MOSFET, allowing the device to cool. The thermal sensor allows the converter to start a soft-start process and
The peak inductor current at which ICMP resets the RS
latch is controlled by the voltage on the internal COMP
regulate the LEDs current again after the junction temperature cools by 40oC. The OTP is designed with a 40oC
node, which is the output of the error amplifier (EAMP). An
external current-sense resistor connected between cath-
hysteresis to lower the average Junction Temperature
(TJ) during continuous thermal overload conditions, in-
ode of the lowest LED and ground allows the EAMP to
receive a current feedback voltage VFB at FB pin. When the
creasing the lifetime of the device.
Enable/Shutdown
LEDs voltage decreases to cause the LEDs current to
decrease, it causes a slightly decrease in VFB relative to
Driving EN to ground places the APW7215 in shutdown
the reference voltage, which in turn causes the internal
COMP voltage to increase until the LEDs current reaches
mode. When in shutdown, the internal power MOSFET
turns off, all internal circuitry shuts down and the quies-
the set point.
cent supply current reduces to 1µA maximum. This pin
also could be used as a digital input allowing brightness
VIN Under-Voltage Lockout (UVLO)
controlled by using a PWM signal with frequency from
5kHz to 100kHz. The 0% duty cycle of PWM signal corre-
The Under-Voltage Lockout (UVLO) circuit compares the
input voltage at VIN with the UVLO threshold (2.4V rising,
typical) to ensure the input voltage is high enough for
sponds to zero LEDs current and 100% corresponds to
full one. If use EN Pin to enable the device, suggestion
reliable operation. The 100mV (typ) hysteresis prevents
supply transients from causing a restart. Once the input
dimmimg duty range is from 15% to 100% at 100kHz
dimmimg frequency.
voltage exceeds the UVLO rising threshold, startup begins.
When the input voltage falls below the UVLO falling
Open-LED Protection
threshold, the controller turns off the converter.
In driving LED applications, the feedback voltage on FB
Soft-Start
The APW7215 has a built-in soft-start to control the N chan-
pin falls down if one of the LEDs, in series, is failed.
Meanwhile, the converter unceasingly boosts the output
nel MOSFET current raises during start-up. During softstart, an internal ramp voltage connected to one of the
voltage like an open-loop operation. Therefore, an overvoltage protection monitoring the output voltage via LX
inverting inputs of the current limit comparator. The inductor current limit is proportional to the voltage. When
pin prevents the LX and the output voltages from exceeding their maximum voltage ratings. Once the voltage on
the threshold voltage of the internal soft-start comparator
is reached, the full current limit is released.
the LX pin rises above the OVP threshold, the converter
stops switching and prevents the output voltage from
Current-Limit Protection
rising. The converter can work again when the LX voltage
falls below the falling of OVP voltage threshold.
The APW7215 monitors the inductor current flowing
through the N-channel MOSFET, and limits the current
peak at current-limit level to prevent loads and the device
from damages in overload conditions.
Copyright  ANPEC Electronics Corp.
Rev. A.2 - Oct., 2012
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APW7215
Application Information
Input Capacitor Selection
The peak inductor current is calculated as the following
equation:
1 V ⋅ (VOUT − VIN )
IPEAK = IIN(MAX ) + ⋅ IN
2 VOUT ⋅ L ⋅ FSW
The input capacitor (CIN) reduces the ripple of the input
current drawn from the input supply and reduces noise
injection into the IC. The reflected ripple voltage will be
smaller when an input capacitor with larger capacitance
is used. For reliable operation, it is recommended to
VIN
select the capacitor with maximum voltage rating at least
1.2 times of the maximum input voltage. The capacitors
IL
IIN
LX
N-FET
CIN
IOUT
D1
VOUT
ESR
ISW
should be placed close to the VIN and the GND.
COUT
Inductor Selection
IL
Selecting an inductor with low dc resistance reduces conduction losses and achieves high efficiency. The efficiency
ILIM
is moderated whilst using small chip inductor which op-
IPEAK
∆IL
erates with higher inductor core losses. Therefore, it is
necessary to take further consideration while choosing
IIN
an adequate inductor. Mainly, the inductor value determines the inductor ripple current: larger inductor value
ISW
results in smaller inductor ripple current and lower conduction losses of the converter. However, larger inductor
value generates slower load transient response. A reasonable design rule is to set the ripple current, ∆IL, to be
30% to 50% of the maximum average inductor current,
IL(AVG). The inductor value can be obtained as below,
 V
L ≥  IN
 VOUT
ID
2

VOUT − VIN
η
 ×
×
 F ⋅I


SW OUT (MAX )

 ∆IL 
 IL (AVG ) 


IOUT
Output Capacitor Selection
where
The current-mode control scheme of the APW7215 al-
VIN = input voltage
lows the usage of tiny ceramic capacitors. The higher
capacitor value provides good load transients response.
VOUT = output voltage
FSW = switching frequency in MHz
Ceramic capacitors with low ESR values have the lowest
output voltage ripple and are recommended. If required,
IOUT = maximum output current in amp.
η = Efficiency
tantalum capacitors may be used as well. The output ripple
is the sum of the voltages across the ESR and the ideal
∆IL /IL(AVG) = inductor ripple current/average current
output capacitor.
(0.3 to 0.5 typical)
To avoid the saturation of the inductor, the inductor should
be rated at least for the maximum input current of the
Δ VOUT = ΔVESR + ΔVCOUT
∆VCOUT ≈
converter plus the inductor ripple current. The maximum
input current is calculated as below:
IIN(MAX ) =
V
− VIN 

⋅  OUT

V
⋅
 OUT FSW 
∆VESR ≈ IPEAK ⋅ RESR
IOUT (MAX ) ⋅ VOUT
VIN ⋅ η
Copyright  ANPEC Electronics Corp.
Rev. A.2 - Oct., 2012
IOUT
COUT
where IPEAK is the peak inductor current.
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APW7215
Application Information (Cont.)
Output Capacitor Selection (Cont.)
Recommended Minimum Footprint
For ceramic capacitor application, the output voltage ripple
The via diameter= 0.012
is dominated by the ∆VCOUT. When choosing the input and
output ceramic capacitors, the X5R or X7R with their good
Hole size =0.008
t e m p e r a t u r e an d v o l t a g e c h a r ac t e r i s t i c s a r e
recommended.
0.012
0.051
Output Voltage Setting
In figure 1, the converter regulates the voltage on FB pin,
connected with the cathode of the lowest LED and the
0.026
current- sense resistor R1 at VREF. Therefore, the current
(ILED), flowing via the LEDs and the R1, is calculated by
0.0315
the following equation:
ILED =
0.00875
0.0216
Unit: Inch
TDFN 2x2-6
VREF
R1
layout
The via diameter= 0.3048
Hole size =0.2032
Layout Consideration
0.2222
5
0.54864
0.3048
For all switching power supplies, the layout is an important step in the design especially at high peak currents
1.2954
and switching frequencies. If the layout is not carefully
done, the regulator might show noise problems and duty
cycle jitter.
0.6604
1. The input capacitor should be placed close to the VIN
0.8
and the GND without any via holes for good input voltage filtering.
Unit : mm
TDFN2x2-6
2. To minimize copper trace connections that can inject
noise into the system, the inductor should be placed as
close as possible to the LX pin to minimize the noise
coupling into other circuits.
3. Since the feedback pin and network is a high impedance circuit the feedback network should be routed away
from the inductor. The feedback pin and feedback network should be shielded with a ground plane or trace to
minimize noise coupling into this circuit.
4. A star ground connection or ground plane minimizes
ground shifts and noise is recommended.
Copyright  ANPEC Electronics Corp.
Rev. A.2 - Oct., 2012
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APW7215
Package Information
TDFN2x2-6
A
b
E
D
D2
A1
A3
L
K
E2
Pin 1 Corner
e
TDFN2x2-6
S
Y
M
B
O
L
MIN.
MAX.
MIN.
MAX.
A
0.70
0.80
0.028
0.031
A1
0.00
0.05
0.000
0.002
0.007
MILLIMETERS
A3
INCHES
0.20 REF
0.008 REF
0.012
b
0.18
0.30
D
1.90
2.10
0.075
0.083
0.063
D2
1.00
1.60
0.039
E
1.90
2.10
0.075
0.083
E2
0.60
1.00
0.024
0.039
0.45
0.012
e
0.65 BSC
L
0.30
K
0.20
0.026 BSC
0.018
0.008
Note : 1. Followed from JEDEC MO-229 WCCC.
Copyright  ANPEC Electronics Corp.
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APW7215
Carrier Tape & Reel Dimensions
P0
P2
P1
A
B0
W
F
E1
OD0
K0
A0
A
OD1 B
B
T
SECTION A-A
SECTION B-B
H
A
d
T1
Application
TDFN2x2-6
A
H
T1
C
d
D
W
E1
F
330.0±2.00
50 MIN.
12.4+2.00
-0.00
13.0+0.50
-0.20
1.5 MIN.
20.2 MIN.
12.0±0.30
1.75±0.10
5.5±0.05
P0
P1
P2
D0
D1
T
A0
B0
K0
2.0±0.05
1.5+0.10
-0.00
1.5 MIN.
0.6+0.00
-0.40
2.35+0.20
2.35+0.20
1.30±0.20
4.0±0.10
8.0±0.10
(mm)
Devices Per Unit
Package Type
Unit
Quantity
TDFN2x2-6
Tape & Reel
3000
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APW7215
Taping Direction Information
TDFN2x2-6
USER DIRECTION OF FEED
Classification Profile
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APW7215
Classification Reflow Profiles
Profile Feature
Sn-Pb Eutectic Assembly
Pb-Free Assembly
100 °C
150 °C
60-120 seconds
150 °C
200 °C
60-120 seconds
3 °C/second max.
3°C/second max.
183 °C
60-150 seconds
217 °C
60-150 seconds
See Classification Temp in table 1
See Classification Temp in table 2
Time (tP)** within 5°C of the specified
classification temperature (Tc)
20** seconds
30** seconds
Average ramp-down rate (Tp to Tsmax)
6 °C/second max.
6 °C/second max.
6 minutes max.
8 minutes max.
Preheat & Soak
Temperature min (Tsmin)
Temperature max (Tsmax)
Time (Tsmin to Tsmax) (ts)
Average ramp-up rate
(Tsmax to TP)
Liquidous temperature (TL)
Time at liquidous (tL)
Peak package body Temperature
(Tp)*
Time 25°C to peak temperature
* Tolerance for peak profile Temperature (Tp) is defined as a supplier minimum and a user maximum.
** Tolerance for time at peak profile temperature (tp) is defined as a supplier minimum and a user maximum.
Table 1. SnPb Eutectic Process – Classification Temperatures (Tc)
Package
Volume mm
Thickness
<350
<2.5 mm
235 °C
≥2.5 mm
220 °C
Table 2. Pb-free Process – Classification Temperatures (Tc)
Package
Thickness
<1.6 mm
1.6 mm – 2.5 mm
≥2.5 mm
Volume mm
<350
260 °C
260 °C
250 °C
3
3
Volume mm
≥350
220 °C
220 °C
Volume mm
350-2000
260 °C
250 °C
245 °C
3
3
Volume mm
>2000
260 °C
245 °C
245 °C
3
Reliability Test Program
Test item
SOLDERABILITY
HOLT
PCT
TCT
HBM
MM
Latch-Up
Method
JESD-22, B102
JESD-22, A108
JESD-22, A102
JESD-22, A104
MIL-STD-883-3015.7
JESD-22, A115
JESD 78
Copyright  ANPEC Electronics Corp.
Rev. A.2 - Oct., 2012
16
Description
5 Sec, 245°C
1000 Hrs, Bias @ Tj=125°C
168 Hrs, 100%RH, 2atm, 121°C
500 Cycles, -65°C~150°C
VHBM≧2KV
VMM≧200V
10ms, 1tr≧100mA
www.anpec.com.tw
APW7215
Customer Service
Anpec Electronics Corp.
Head Office :
No.6, Dusing 1st Road, SBIP,
Hsin-Chu, Taiwan, R.O.C.
Tel : 886-3-5642000
Fax : 886-3-5642050
Taipei Branch :
2F, No. 11, Lane 218, Sec 2 Jhongsing Rd.,
Sindian City, Taipei County 23146, Taiwan
Tel : 886-2-2910-3838
Fax : 886-2-2917-3838
Copyright  ANPEC Electronics Corp.
Rev. A.2 - Oct., 2012
17
www.anpec.com.tw