TOSHIBA TLCS-90 Series TMP90CM40 CMOS 8–Bit Microcontrollers (2) TMP90CM40N/TMP90CM40F (3) (4) (5) 1. Outline and Characteristics The TMP90CM40 is a high-speed advanced 8-bit microcontroller applicable to a variety of equipment. With its 8-bit CPU, ROM, RAM, A/D converter, multi-function timer/event counter and general-purpose serial interface integrated into a single CMOS chip, the TMP90C640A allows the expansion of external memories for programs (up to 31K byte) and data (1M byte). The TMP90CM40N is a 64-pin shrink DIP product. (SDIP64-P750) The TMP90CM40F is a 64-pin flat package product. (QFP64-P1420A) (1) The characteristics of the TMP90CM40 include: Powerful instructions: 163 basic instructions, including Multiplication, division, 16-bit arithmetic operations, bit manipulation instructions (6) (7) (8) (9) 10) (11) (12) (13) (14) (15) Minimum instruction executing time: 320ns (at 12.5MHz oscillation frequency) Internal ROM: 32K byte Internal RAM: 1K byte Memory expansion Program memory: 64K byte Data memory: 1M byte 8-bit A/D converter (6 channels) General-purpose serial interface Asynchronous mode, I/O interface mode Multi-function 16-bit timer/event counter (1 channel) 8-bit timers (4 channels) Stepping motor control port (2 channels) Input/Output ports (54 pins) Interrupt function: 10 internal interrupts and 4 external interrupts Micro Direct Memory Access (µDMA) function (11 channels) Watchdog timer Standby function (4 HALT modes) The information contained here is subject to change without notice. The information contained herein is presented only as guide for the applications of our products. No responsibility is assumed by TOSHIBA for any infringements of patents or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of TOSHIBA or others. These TOSHIBA products are intended for usage in general electronic equipments (office equipment, communication equipment, measuring equipment, domestic electrification, etc.) Please make sure that you consult with us before you use these TOSHIBA products in equipments which require high quality and/or reliability, and in equipments which could have major impact to the welfare of human life (atomic energy control, spaceship, traffic signal, combustion control, all types of safety devices, etc.). TOSHIBA cannot accept liability to any damage which may occur in case these TOSHIBA products were used in the mentioned equipments without prior consultation with TOSHIBA. TOSHIBA CORPORATION 1/12 TMP90CM40 Figure 1. TMP90CM40 Block Diagram 2/12 TOSHIBA CORPORATION TMP90CM40 2. Pin Assignment and Functions The assignment of input/output pins, their names and functions are described below. 2.1 Pin Assignment Figure 2.1 (1) shows pin assignment of the TMP90CM40N. Figure 2.1 (1). Pin Assignment (Shrink Dual Inline Package) Figure 2.1 (2) shows pin assignment of the TMP90CM40F. TOSHIBA CORPORATION 3/12 TMP90CM40 Figure 2.1 (2). Pin Assignment (Flat Package) 2.2 Pin Names and Functions The names of input/output pins and their functions are summarized in Table 2.2. Table 2.2 Pin Names and Functions (1/3) 4/12 Pin Name No. of pins P00 ~ P07 /D0 ~ D7 8 I/O 3 states I/O 3 states I/O P10 ~ P17 /A0 ~ A7 8 P20 ~ P27 /A8 ~ A15 8 P30 /RxD 1 Input P31 /RxD 1 Input Output I/O Output Function Port 0: 8-bit I/O port that allows selection of input/output on byte basis Data bus: Also functions as 8-bit bidirectional data bus for external memory Port 1: 8-bit I/O port that allows selection on byte basis Address bus: The lower 8 bits address bus for external memory Port 2: 8-bit I/O port that allows selection on bit basis Address bus: The upper 8 bits address bus for external memory Port 30: 1-bit input port Receiver Serial Data Port 31: 1-bit input port Receiver Serial Data Port 32: 1-bit input port P32 /TxD /RTS /SCLK 1 P33 /TxD 1 Output P34 /CTS 1 Input P35 /RD 1 Output P36 /WR 1 Output Output Transmitter Serial Data Request to send Serial data Serial clock output Port 33: 1-bit output port Transmitter Serial Data Port 34: 1-bit input port Clear to send Serial data Port 35: 1-bit output port Read: Generates strobe signal for reading external memory Port 36: 1-bit output port Write: Generates strobe signal for writing into external memory TOSHIBA CORPORATION TMP90CM40 Table 2.2 Pin Names and Functions (2/3) Pin Name No. of Pins I/O 3 states P37 /WAIT 1 Input Function Port 37: 1-bit input port Wait: Input pin for connecting slow speed memory or peripheral LSI Port 4: 4-bit output port that allows selection of Port/Address Bus on bit basis P40 ~ P43 /A16 ~ A19 4 Output P50 ~ P55 /AN0 ~ AN5 6 Input VREF 1 – Input of reference voltage to A/D converter AGND 1 – Ground pin for A/D converter P60 ~ P63 /M00 ~ M03 /TO1 I/O Port 6: 4-bit I/O port that allows I/O selection on bit basis 4 Output P70 ~ P73 /M10 ~ M13 /TO3 Output I/O 4 Output Output Address bus: Also functions as address bus for external memory (4 bits of bank address) Port 5: 6-bit input port Analog input: 6 analog input to A/D converter Stepping motor control port 0 Timer output 1: Output of Timer 0 or 1 Port 7: 4-bit I/O port that allows I/O selection on bit basis Stepping motor control port 1 Timer output 3: Output of Timer 2 or 3 Port 80: 1-bit input port P80 /INTO 1 Input Interrupt request pin 0: Interrupt request pin (Level/rising edge is programmable) Port 81: 1-bit input port P81 /INT1 /TI4 1 Input Interrupt request pin 1: Interrupt request pin (Rising/falling edge is programmable) Timer input 4: Counter/capture trigger signal for Timer 4 Port 82: 1-bit input port P82 /INT2 /TI5 1 P82 /TO3/T04 1 Output NMI 1 Input CLK 1 Output Clock output: Generates clock pulse at 1/4 frequency of clock oscillation. It is Pulled up internally during resetting. EA 1 Input External access: Connect to the VCC pin in the internal ROMis used, connect to the GND pin when an external memory is used. RESET 1 Input Reset: Initializes the TMP 90CM40A. (Built-in pull-up resistor) X1/X2 2 Input/ Output Pin for quartz crystal or ceramic resonator VCC 1 – Power supply (+5V) VSS (GND) 1 – Ground (0V) Input Interrupt request pin 2: rising edge interrupt request pin Timer input 5: capture trigger signal for Timer 4 Port 83: 1-bit output port Timer output 3/4: Output of Timer 2, 3 or 4 Non-maskable interrupt request pin: Falling edge interrupt request pin TOSHIBA CORPORATION 5/12 TMP90CM40 3. Operation The following explains the TMP90CM40 function and basic operations. The CPU functions and internal I/O functions of the TMP90CM40 are the same as the TMP90C840A. Refer to the “TMP90C840A” section concerning functions which are not explained in the following. The addresses 0010H to 007FH in this internal ROM area are used for the entry area for the interrupt processing. (2) The TMP90CM40 also contains a 1K byte RAM, which is allocated to the address space from FBC0H to FFBFH. The CPU allows the access to a certain RAM area (FF00H to FFBFH, 192 bytes) by a short operation code (opcode) in a “direct addressing mode”. The addresses FF10H to FF7FH in this internal RAM area can be used as parameter area for micro DMA processing (and for any other purpose when the micro DMA function is not used). 3.1 CPU The TMP90CM40 has an internal high-performance 8-bit CPU. Refer to the book TLCS 90 Series CPU Core Architecture concerning CPU operation. 3.2 Memory Map The TMP90CM40 supports a program memory of up to 64K bytes and a data memory of maximum 1Mbytes. The program memory may be assigned to the address space from 00000H to 0FFFFH, while the data memory can be allocated to any address from 00000H to FFFFFH. (1) Internal ROM The TMP90CM40 internally contains a 32K byte ROM. The address space from 0000H to 7FFFH is provided to the ROM. The CPU starts executing a program from 0000H by resetting. 6/12 Internal RAM (3) Internal I/O The TMP90CM40 provides a 48-byte address space as an internal I/O area, whose addresses range from FFC0H to FFEFH. This I/O area can be accessed by the CPU using a short opcode in the “direct addressing mode”. Figure 3.1 (1) is a memory map indicating the areas accessible by the CPU in the respective addressing mode. TOSHIBA CORPORATION TMP90CM40 Figure 3.2. Memory Map TOSHIBA CORPORATION 7/12 TMP90CM40 4. Electrical Characteristics TMP90CM40N/TMP90CM40F 4.1 Absolute Maximum Ratings Symbol Parameter VCC Supply voltage VIN Input voltage Rating Unit -0.5 ~ + 7 V -0.5 ~ VCC + 0.5 V F 500 Power dissipation (Ta = 85°C) PD mW N 600 260 °C TSTG Storage temperature -65 ~ 150 °C TOPR Operating temperature -40 ~ 85 °C TSOLDER Soldering temperature (10s) 4.2 DC Characteristics VCC = 5V ± 10% TA = -40 ~ 85°C (1 ~ 10MHz) TA = -20 ~ 70°C (10 ~ 12.5MHz) Typical Values are for TA = 25°C VCC = 5V. Symbol Parameter Min Max Unit Test Conditions -0.3 0.2VCC - 0.1 V – VIL Input Low Voltage (P0) VIL1 P1, P2, P3, P4, P5, P6, P7, P8 -0.3 0.3VCC V – VIL2 RESET, INT0 (P80), NMI -0.3 0.25VCC V – VIL3 EA -0.3 0.3 V – VIL4 X1 -0.3 0.2VCC V – VIH Input High Voltage (P0) 0.2VCC + 1.1 VCC + 0.3 V – VIH1 P1, P2, P3, P4, P5, P6, P7, P8 0.7VCC VCC + 0.3 V – VIH2 RESET, INT0 (P80), NMI 0.75VCC VCC + 0.3 V – VIH3 EA VCC - 0.3 VCC + 0.3 V – VIH4 X1 0.8VCC VCC + 0.3 V VOL Output Low Voltage – 0.45 V IOL = 1.6mA VOH VOH1 VOH2 Output High Voltage 2.4 0.75VCC 0.9VCC – V V V IOH = -400µA IOH = -100µA IOH = -20µA IDAR Darlington Drive Current (8 I/O pins) (Note) -1.0 -3.5 mA VEXT = 1.5V REXT = 1.1kΩ – ILI Input Leakage Current 0.02 (Typ) ±5 µA 0.0 ≤ Vin ≤ VCC ILO Output Leakage Current 0.05 (Typ) ±10 µA 0.2 ≤ Vin ≤ VCC - 0.2 ICC Operating Current (RUN) Idle 1 Idle 2 20 (Typ) 1.5 (Typ) 8 (Typ) 40 5 15 mA mA mA tosc = 10MHz (25% up @ 12.5MHz) 0.2 (Typ) 50 10 µA µA 0.2 ≤ Vin ≤ VCC - 0.2 6 V VIL2 = 0.2VCC, VIH2 = 0.8VCC STOP (TA = -40 ~ 85°C) STOP (TA = 0 ~ 50°C) VSTOP Power Down Voltage (@STOP) 2 RAM BACK UP RRST RESET Pull Up Register 50 150 KΩ CIO Pin Capacitance – 10 pF VTH Schmitt width RESET, NMI, INT0 0.4 1.0 (Typ) V – testfreq = 1MHz – Note: IDAR is guaranteed for a total of up to 8 optional ports. 8/12 TOSHIBA CORPORATION TMP90CM40 4.3 AC Characteristics VCC = 5V ± 10% TA = -40 ~ 85°C (1 ~ 10MHz) CL = 50pF TA = -20 ~ 70°C (10 ~ 12.5MHz) Variable Symbol tOSC 10MHz Clock 12.5MHz Clock Parameter OSC. Period = x Unit Min Max Min Max Min Max 80 1000 100 – 80 – ns tCYC CLK Period 4x 4x 400 – 320 – ns tWL CLK Low width 2x - 40 – 160 – 120 – ns tWH CLK High width 2x - 40 – 160 – 120 – ns tAC Address Setup to RD, WR x - 45 – 55 – 35 – ns tRR RD Low width 2.5x - 40 – 210 – 160 – ns tCA Address Hold Time After RD, WR 0.5x - 30 – 20 – 10 – ns tAD Address to Valid Data In – 3.5x - 95 – 255 – 185 ns tRD RD to Valid Data In – 2.5x - 80 – 170 – 120 ns tHR Input Data Hold After RD 0 – 0 – 0 – ns tWW WR Low width tDW Data Setup to WR tWD Data Hold After WR tCWA RD, WR to Valid WAIT tAWA 2.5x - 40 – 210 – 160 – ns 2x - 50 – 150 – 110 – ns 30 90 30 90 30 90 ns – 1.5x - 100 – 50 – 20 ns Address to Valid WAIT – 2.5x - 130 – 120 – 70 ns tWAS WAIT Setup to CLK 70 – 70 – 70 – ns tWAH WAIT Hold After CLK 0 – 0 – 0 – ns 1.5x - 35 – 115 – 85 – ns tRV RD, WR Recovery Time tCPW CLK to Port Data Output – x + 200 – 300 – 280 ns tPRC Port Data Setup to CLK 200 – 200 – 200 – ns tCPR Port Data Hold After CLK 100 – 100 – 100 – ns tCHCL RD/WR Hold After CLK x - 60 – 40 – 20 – ns tCLC RD/WR Setup to CLK 1.5x - 50 – 100 – 70 – ns tCLHA Address Hold After CLK 1.5x - 80 – 70 – 40 – ns tACL Address Setup to CLK 2.5x - 80 – 170 – 120 – ns tCLD Data Setup to CLK x - 50 – 50 – 30 – ns • AC output level High 2.2V/Low 0.8V • AC input level High 2.4V/Low 0.45V (D0 – D7) High 0.8VCC/Low 0.2VCC (excluding D0 – D7) TOSHIBA CORPORATION 9/12 TMP90CM40 4.4 A/D Conversion Characteristics VCC = 5V ± 10% TA = -40 ~ 85°C (1 ~ 10MHz) TA = -20 ~ 70°C (10 ~ 12.5MHz) Symbol Parameter Min Typ Max VCC VREF Analog reference voltage VCC - 1.5 VCC AGND Analog reference voltage VSS VSS VSS VAIN Allowable analog input voltage VSS – VCC IREF Supply current for analog reference voltage – 0.5 1.0 Error Total error (TA = 25°C, VCC = VREF = 5.0V) – – 1.0 Total error – – 2.5 Unit V mA LSB 4.5 Zero-Cross Characteristics VCC = 5V ± 10% TA = -40 ~ 85°C (1 ~ 10MHz) TA = -20 ~ 70°C (10 ~ 12.5MHz) Symbol Parameter VZX Zero-cross detection input AZX Zero-cross accuracy FZX Zero-cross detection input frequency Condition Min Max Unit AC coupling C = 0.1µF 1 1.8 VAC p - p 50/60Hz sine wave – 135 mV – 0.04 1 kHz 4.6 Serial Channel Timing-I/O Interface Mode VCC = 5V ± 10% TA = -40 ~ 85°C (1 ~ 10MHz) CL = 50pF TA = -20 ~ 70°C (10 ~ 12.5MHz) Variable Symbol 10MHz Clock 12.5MHz Clock Parameter tSCY Serial Port Clock Cycle Time Unit Min Max Min Max Min Max 8x – 800 – 640 – ns tOSS Output Data Setup SCLK Rising Edge 6x - 150 – 450 – 330 – ns tOHS Output Data Hold After SCLK Rising Edge 2x - 120 – 80 – 40 – ns tHSR Input Data Hold After SCLK Rising Edge 0 – 0 – 0 – ns tSRD SCLK Rising Edge to Input DATA Valid – 6x - 150 – 450 – 330 ns 4.7 16-bit Event Counter VCC = 5V ± 10% TA = -40 ~ 85°C (1 ~ 10MHz) TA = -20 ~ 70°C (10 ~ 12.5MHz) Variable Symbol 10MHz Clock 12.5MHz Clock Parameter Unit Min Max Min Max Min Max tVCK TI4 clock cycle 8x + 100 – 900 – 740 – ns tVCKL TI4 Low clock pulse width 4x + 40 – 440 – 360 – ns tVCKH TI4 High clock pulse width 4x + 40 – 440 – 360 – ns 10/12 TOSHIBA CORPORATION TMP90CM40 4.8 Interrupt Operation VCC = 5V ± 10% TA = -40 ~ 85°C (1 ~ 10MHz) TA = -20 ~ 70°C (10 ~ 12.5MHz) Variable Symbol 10MHz Clock 12.5MHz Clock Parameter Unit Min Max Min Max Min Max 4x – 400 – 320 – ns 4x – 400 – 320 – ns 8x + 100 – 900 – 740 – ns 8x + 100 – 900 – 740 – ns NMI, INT0 Low level pulse width tINTAL NMI, INT0 High level pulse width tINTAH INT1, INT2 Low level pulse width tINTBL INT1, INT2 High level pulse width tINTBH (Reference) Definition of IDAR 4.9 I/O Interface Mode Timing TMP90CM40A I/O Interface Mode Timing Waveforms TOSHIBA CORPORATION 11/12 TMP90CM40 4.10 Timing Chart 12/12 TOSHIBA CORPORATION