CS8182
CS8182
Micropower 200mA Low Dropout
Tracking Regulator/Line Driver
Description
The CS8182 is a monolithic integrated low dropout tracking regulator
designed to provide an adjustable
buffered output voltage that closely
tracks (±10mV) the reference input.
The output delivers up to 200mA
while being able to be configured
higher, lower or equal to the reference voltage.
The output has been designed to
operate over a wide range (2.8V to
40V) while still maintaining excellent DC characteristics. The CS8182
is protected from reverse battery,
Features
short circuit and thermal runaway
conditions. The device also can
withstand 45V load dump transients and –50V reverse polarity
input voltage transients. This makes
it suitable for use in automotive
environments.
■ 200mA Source Capability
The VREF/ENABLE lead serves two
purposes. It is used to provide the
input voltage as a reference for the
output and it also can be pulled low
to place the device in sleep mode
where it nominally draws less than
10µA from the supply.
■ Low Quiescent Current
■ Output Tracks within
±10mV Worst Case
■ Low Dropout (0.35V typ.
@ 200mA)
■ Thermal Shutdown
■ Short Circuit Protection
■ Wide Operating Range
Block Diagram
VIN
VOUT
Package Options
8 Lead SO Narrow
ESD
VOUT
Current Limit &
SAT Sense
Adj
–
1
VIN
Gnd
Gnd
Gnd
Gnd
Adj
VREF/ENABLE
ESD
ENABLE
+
VREF/ENABLE
Tab (Gnd)
ESD
Thermal
Shutdown
5 Lead D2 PAK
1
2
3
4
5
+
Gnd
–
VIN
VOUT
Gnd
Adj
VREF
1
2.0V
Consult Factory for 8 Lead SOIC with
exposed pad.
ON Semiconductor
2000 South County Trail, East Greenwich, RI 02818
Tel: (401)885–3600 Fax: (401)885–5786
N. American Technical Support: 800-282-9855
Web Site: www.onsemi.com
September, 2000 - Rev. 8
1
CS8182
Absolute Maximum Ratings
Storage Temperature..............................................................................................................................................−65°C to 150°C
Supply Voltage Range (continuous) .........................................................................................................................−15V to 40V
Supply Voltage Range (normal, continuous) ...........................................................................................................3.4V to 40V
Peak Transient Voltage (VIN = 14V, Load Dump Transient = 31V) ...................................................................................45V
Voltage Range (Adj, VOUT, VREF/ENABLE) ...........................................................................................................−10V to 45V
Maximum Junction Temperature.........................................................................................................................................150°C
ESD Capability (Human Body Model) ...................................................................................................................................2kV
Lead Temperature Soldering
Wave Solder(through hole styles only) ......................................................................................10 sec. max, 260°C peak
Reflow (SMD styles only).......................................................................................60 sec. max above 183°C, 230°C peak
Electrical Characteristics: VIN = 14V; VREF/ENABLE > 2.75V; −40°C < TJ < 125°C;
COUT ≥ 10µF; 0.1Ω ≤ COUT-ESR ≤ 10Ω @ 10kHz, unless otherwise specified.
PARAMETER
■
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Regulator Output
4.5V ≤ VIN ≤ 26V,
VREF – VOUT
VOUT Tracking Error
−10
10
mV
150
600
mV
mV
10
mV
100µA ≤ IOUT ≤ 200mA (Note 1)
Dropout Voltage
(VIN – VOUT)
IOUT = 100µA
IOUT = 200mA
100
350
Line Regulation
4.5V ≤ VIN ≤ 26V (Note 1)
Load Regulation
100µA ≤ IOUT ≤ 200mA (Note 1)
Adj Lead Current
Loop in Regulation
Current Limit
VIN = 14V, VREF = 5V, VOUT = 90% VREF
(Note 1)
Quiescent Current
(IIN – IOUT)
VIN = 12V, IOUT = 200mA
VIN = 12V, IOUT = 100µA, TJ ≤ 85°C
VIN = 12V, VREF/ENABLE = 0V, TJ ≤ 85°C
Reverse Current
VOUT = 5V, VIN = 0V
Ripple Rejection
f = 120Hz, IOUT = 200mA,
4.5V ≤ VIN ≤ 26V
60
Thermal Shutdown
GBD
150
180
210
°C
0.80
2.00
2.75
V
1
µA
■
10
mV
1.0
µA
700
mA
15
50
10
25
100
30
mA
µA
µA
0.2
1.5
mA
0.2
225
dB
VREF/ENABLE
Enable Voltage
Input Bias Current
VREF/ENABLE
0
Note 1: VOUT connected to Adj lead.
Package Lead Description
PACKAGE LEAD #
LEAD SYMBOL
FUNCTION
5 Lead D2PAK
1
8 Lead SOIC
Narrow
8
VIN
2
1
VOUT
Regulated output.
3
2, 3, 6, 7
Gnd
Ground.
4
4
Adj
Adjust lead.
5
5
VREF/ENABLE
Input voltage.
Reference voltage and ENABLE input.
2
CS8182
Circuit Description
ENABLE Function
By pulling the VREF/ENABLE lead below 2V typically,
(see Figure 4 or Figure 5), the IC is disabled and enters a
sleep state where the device draws less than 10µA from
supply. When the VREF/ENABLE lead is greater than
2.75V, VOUT tracks the VREF/ENABLE lead normally.
VOUT, 200mA
VIN
VOUT
C2**
10µF
Gnd
B+
C1*
0.1µF
Gnd
CS8182
Gnd
Gnd
R
VREF/
ENABLE
Adj
VREF
Output Voltage
from MCU
The output is capable of supplying 200mA to the load
while configured as a similar (Figure 1), lower (Figure 3),
or higher (Figure 2) voltage as the reference lead. The Adj
lead acts as the inverting terminal of the op amp and the
VREF lead as the non-inverting.
The device can also be configured as a high-side driver as
displayed in Figure 6.
Figure 4: Tracking regulator with ENABLE circuit.
VOUT, 200mA
Loads
VIN
VOUT
C2**
10µF
Gnd
Gnd
VIN
6 – 40V
B+
C1*
0.1µF
VREF (5V)
CS8101
100nF
CS8182
Gnd
Gnd
5V
VREF/
ENABLE
Adj
To Load
(e.g. sensor)
5V
VOUT
VIN
Gnd
Gnd
µC
10µF
CS8182
Gnd
Gnd
VOUT = VREF
VREF/
ENABLE
Adj
I/O
Figure 1: Tracking regulator at the same voltage.
VOUT, 200mA
Loads
C2**
10µF
RF
VOUT
VIN
Gnd
Gnd
C1*
0.1µF
Figure 5: Alternative ENABLE circuit.
B+
CS8182
Gnd
Gnd
200mA
VREF/
ENABLE
Adj
VREF
VIN
VOUT
Gnd
B+
Gnd
CS8182
RA
Gnd
R
Gnd
VOUT = VREF(1 + RAF )
Adj
Figure 2: Tracking regulator at higher voltages.
VOUT = B+ − VSAT
Figure 6: High-Side Driver.
VOUT, 200mA
Loads
C2**
10µF
VOUT
VIN
Gnd
Gnd
B+
C1*
0.1µF
CS8182
Gnd
Adj
VREF/
ENABLE
Gnd
R1
VREF/
ENABLE
VREF
R2
VOUT = VREF( R1R2
)
+ R2
Figure 3: Tracking regulator at lower voltages.
* C1 is required if the regulator is far from the power source filter.
** C2 is required for stability.
3
MCU
CS8182
Application Notes
External Capacitors
The output capacitor for the CS8182 is required for stability. Without it, the regulator output will oscillate. Actual
size and type may vary depending upon the application
load and temperature range. Capacitor effective series
resistance (ESR) is also a factor in the IC stability. Worstcase is determined at the minimum ambient temperature
and maximum load expected.
IIN
VIN
}
The output capacitor can be increased in size to any
desired value above the minimum. One possible purpose
of this would be to maintain the output voltage during
brief conditions of negative input transients that might be
characteristic of a particular system.
Control
Features
Heatsinks
A heatsink effectively increases the surface area of the
package to improve the flow of heat away from the IC and
into the surrounding air.
Each material in the heat flow path between the IC and the
outside environment will have a thermal resistance. Like
series electrical resistances, these resistances are summed
to determine the value of RΘJA.
Calculating Power Dissipation
in a Single Output Linear Regulator
The maximum power dissipation for a single output regulator (Figure 1) is:
RΘJA = RΘJC + RΘCS + RΘSA
(1)
(3)
where:
RΘJC = the junction–to–case thermal resistance,
where:
VIN(max) is the maximum input voltage,
VOUT(min) is the minimum output voltage,
IOUT(max) is the maximum output current for the application, and
IQ is the quiescent current the regulator consumes at
IOUT(max).
Once the value of PD(max) is known, the maximum permissible value of RΘJA can be calculated:
150°C - TA
PD
VOUT
Figure 1. Single output regulator with key performance parameters
labeled.
More information on capacitor selection for Smart
Regulators™ is available in the Smart Regulator application note, “Compensation for Linear Regulators.”
RΘJA =
IOUT
IQ
The capacitor must also be rated at all ambient temperatures expected in the system. To maintain regulator stability down to -40°C, a capacitor rated at that temperature
must be used.
PD(max) = {VIN(max) - VOUT(min)}IOUT(max) + VIN(max)IQ
Smart
Regulator
RΘCS = the case–to–heatsink thermal resistance, and
RΘSA = the heatsink–to–ambient thermal resistance.
RΘJC appears in the package section of the data sheet. Like
RΘJA, it is a function of package type. RΘCS and RΘSA are
functions of the package type, heatsink and the interface
between them. These values appear in heat sink data
sheets of heatsink manufacturers.
(2)
The value of RΘJA can then be compared with those in
the package section of the data sheet. Those packages
with RΘJA's less than the calculated value in equation 2
will keep the die temperature below 150°C.
In some cases, none of the packages will be sufficient to
dissipate the heat generated by the IC, and an external
heatsink will be required.
4
CS8182
Package Specification
PACKAGE THERMAL DATA
PACKAGE DIMENSIONS IN mm (INCHES)
D
Lead Count
8 Lead SOIC Narrow
Metric
Max
Min
5.00
4.80
Thermal Data
English
Max Min
.197 .189
RΘJC
RΘJA
5 Lead
D2PAK
4.0
10-50*
typ
typ
8 Lead
SOIC Narrow
45
165
°C/W
°C/W
* Depending on thermal properties of substrate. RΘJA = RΘJC + RΘCA
Surface Mount Narrow Body (D); 150 mil wide
4.00 (.157)
3.80 (.150)
6.20 (.244)
5.80 (.228)
0.51 (.020)
0.33 (.013)
1.27 (.050) BSC
1.75 (.069) MAX
1.57 (.062)
1.37 (.054)
1.27 (.050)
0.40 (.016)
0.25 (.010)
0.19 (.008)
D
0.25 (0.10)
0.10 (.004)
REF: JEDEC MS-012
5 Lead D2PAK (DP)
10.31 (.406)
10.05 (.396)
1.40 (.055)
1.14 (.045)
1.68 (.066)
1.40 (.055)
8.53 (.336)
8.28 (.326)
15.75 (.620)
14.73 (.580)
2.74(.108)
2.49(.098)
0.91 (.036)
0.66 (.026)
2.79 (.110)
2.29 (.090)
1.70 (.067) REF
4.57 (.180)
4.31 (.170)
.254 (.010) REF
0.10 (.004)
0.00 (.000)
Ordering Information
Part Number
CS8182YDP5
CS8182YDPR5
CS8182YD8
CS8182YDR8
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further notice to any products herein. For additional information and the latest available information, please contact
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Description
5 Lead D2PAK
5 Lead D2PAK (tape & reel)
8 Lead SOIC Narrow
8 Lead SOIC Narrow (tape & reel)
5
© Semiconductor Components Industries, LLC, 2000
Notes
Notes
Notes