MDTIC MDT10P20

深圳市美芯微电子有限公司
深圳市美芯微电子有限公司
麦肯单片机授权一级代理商
麦肯单片机授权一级代理商
电话:0755-36857609/27945552/29491882
电话:0755-36857609/27945551/29491882
地址:深圳市宝安区宝源路名优产品采购中心B1区721室
1. General Description
This EPROM-Based 8-bit micro-controller
uses a fully static CMOS design
technology combines higher speed and
smaller size with the low power and high
noise immunity of CMOS.
On chip memory system includes 2.0 K
bytes of ROM, and 80 bytes of static
RAM.
2. Features
The followings are some of the features
on the hardware and software :
Fully CMOS static design
8-bit data bus
On chip ROM size : 2 K words
Internal RAM size : 80 bytes
(72 general purpose, 8 special registers)
36 single word instructions
14-bit instructions
2-level stacks
Operating voltage : 2.3 V ~ 6.0 V
Operating frequency : 0 ~ 20 MHz
The most fast execution time is 200
ns under 20 MHz in all single cycle
instructions except the branch
instruction.
Addressing modes include direct,
indirect and relative addressing
modes
MDT10P20(BF)
Power-on Reset (POR), only available
while PED is Disable
Power Edge-detector Reset
Sleep mode for power saving
4 oscillator start-up time :
150 μs, 20 ms, 40 ms, 80 ms
8-bit real time clock/counter(RTCC)
with 8-bit programmable prescaler
4 types of oscillator can be selected
by code options :
RC-Low cost RC oscillator
LFXT-Low frequency crystal
oscillator
XTAL-Standard crystal oscillator
HFXT-High frequency crystal
oscillator
On-chip RC oscillator based
Watchdog Timer(WDT) can be operated
freely
20 I/O pins with their own
independent direction control
3. Applications
The application areas of this MDT10P20
range from appliance motor control and
high speed automotive to low power
remote transmitters/receivers, pointing
devices,
and
telecommunications
processors, such as Remote controller,
small
instruments,
chargers,
toy,
automobile and PC peripheral … etc.
This specification are subject to be changed without notice. Any latest information please preview
http;//www.mdtic.com.tw
http;//www.mx
mcu.com.cn
P. 1
2007/8 VER 1.5
MDT10P20(BF)
4. Pin Assignment
DIP / SOP / SKINNY
RTCC 1
Vdd
N/C
Vss
N/C
PA0
PA1
PA2
PA3
PB0
PB1
PB2
PB3
PB4
2
3
4
5
6
7
8
9
10
11
12
13
14
SSOP
28 /MCLR
27
26
25
24
23
22
21
20
19
18
17
16
15
VSS 1
OSC1
OSC2
PC7
PC6
PC5
PC4
PC3
PC2
PC1
PC0
PB7
PB6
PB5
RTCC
VDD
VDD
PA0
PA1
PA2
PA3
PB0
PB1
PB2
PB3
PB4
VSS
28 /MCLR
2
3
4
5
6
7
8
9
10
11
12
13
14
27
26
25
24
23
22
21
20
19
18
17
16
15
OSC1
OSC2
PC7
PC6
PC5
PC4
PC3
PC2
PC1
PC0
PB7
PB6
PB5
5. Pin Function Description
Pin Name
I/O
Function Description
PA0~PA3
I/O
Port A, TTL input level
PB0~PB7
I/O
Port B, TTL input level
PC0~PC7
I/O
Port C, TTL input level
RTCC
I
Real Time Clock/Counter, Schmitt Trigger input levels
/MCLR
I
Master Clear, Schmitt Trigger input levels
OSC1
I
Oscillator Input
OSC2
O
Oscillator Output
Vdd
Power supply
Vss
Ground
This specification are subject to be changed without notice. Any latest information please preview
http;//www.mdtic.com.tw
http;//www.mx
mcu.com.cn
P. 2
2007/8 VER 1.5
MDT10P20(BF)
6. Memory Map
(A) Register Map
Address
Description
00
Indirect Addressing Register
01
RTCC
02
PC
03
STATUS
04
MSR
05
Port A
06
Port B
07
Port C
08~0F
Internal RAM, General Purpose Register
10~1F
Internal Memory Select Register
30~3F
Internal Memory Select Register
50~5F
Internal Memory Select Register
70~7F
Internal Memory Select Register
(1) IAR ( Indirect Address Register) : R0
(2) RTCC (Real Time Counter/Counter Register) : R1
(3) PC (Program Counter) : R2
Write PC, CALL --- always 0
LJUMP, JUMP, LCALL --- from instruction word
RTWI, RET --- from STACK
A10
A9
A8
A7~A0
Write PC, JUMP, CALL --- from STATUS b6 b5
LJUMP, LCALL --- from instruction word
RTWI, RET --- from STACK
Write PC --- from ALU
LJUMP, JUMP, LCALL, CALL --- from instruction word
RTWI, RET --- from STACK
This specification are subject to be changed without notice. Any latest information please preview
http;//www.mx
http;//www.mdtic.com.tw
mcu.com.cn
P. 2
2007/8 VER 1.5
MDT10P20(BF)
(4) STATUS (Status register) : R3
Bit
Symbol
Function
0
C
Carry bit
1
HC
Half Carry bit
2
Z
Zero bit
3
PF
Power loss Flag bit
4
TF
Time overflow Flag bit
page
Page select bit :
6—5
00 : 000H --- 1FFH
01 : 200H --- 3FFH
10 : 400H --- 5FFH
11 : 600H --- 7FFH
——
7
General purpose bit
(5) MSR (Memory Select Register) : R4
Memory Select Register :
00 : 10~1F
01 : 30~3F
10 : 50~5F
11 : 70~7F
b7
b6
b5
b4
b3
b2
b1
Read only “1”
Indirect Addressing Mode
(6) PORT A : R5
PA3~PA0, I/O Register
(7) PORT B : R6
PB7~PB0, I/O Register
(8) PORT C : R7
PC7~PC0, I/O Register
This specification are subject to be changed without notice. Any latest information please preview
http;//www.mdtic.com.tw
http;//www.mx
mcu.com.cn
P. 3
2007/8 VER 1.5
b0
MDT10P20(BF)
(9) TMR (Time Mode Register)
Bit
Symbol
Function
Prescaler Value
2—0
PS2—0
3
PSC
4
TCE
5
TCS
RTCC rate
WDT rate
0 0 0
1:1
1:2
0 0 1
1:2
1:4
0 1 0
1:4
1:8
1:8
1 : 16
0 1 1
1 : 16
1 : 32
1 0 0
1 : 64
1 0 1
1 : 32
1 : 128
1 1 0
1 : 64
1 : 256
1 1 1
1 : 128
Prescaler assignment bit :
0 — RTCC
1 — Watchdog Timer
RTCC signal Edge :
0 — Increment on low-to-high transition on RTCC pin
1 — Increment on high-to-low transition on RTCC pin
RTCC signal set :
0 — Internal instruction cycle clock
1 — Transition on RTCC pin
(10) CPIO A, CPIO B, CPIO C (Control Port I/O Mode Register)
The CPIO register is “write-only”
=“0”, I/O pin in output mode;
=“1”, I/O pin in input mode.
(11) EPROM Option by Writer Programming:
Oscillator Type
RC
Oscillator
Oscillator Start-up Time
150 μs,20ms,40ms,80ms
HFXT Oscillator
20 ms,40ms,80ms
XTAL Oscillator
20ms,40 ms,80ms
LFXT Oscillator
40ms,80 ms
Watchdog Timer control
Watchdog timer disable all the time
Watchdog timer enable all the time
This specification are subject to be changed without notice. Any latest information please preview
http;//www.mdtic.com.tw
http;//www.mx
mcu.com.cn
P. 4
2007/8 VER 1.5
MDT10P20(BF)
Power Edge Detect
Security bit
PED Disable
Security weak Disable
PED Enable
Security Disable
Security Enable
7. Reset Condition for all Registers
Register
Address
Power-On Reset
/MCLR or WDT Reset
CPIO A
--
1111 1111
1111 1111
CPIO B
--
1111 1111
1111 1111
CPIO C
--
1111 1111
1111 1111
TMR
--
--11 1111
--11 1111
IAR
00h
-
-
RTCC
01h
xxxx xxxx
uuuu uuuu
PC
02h
1111 1111
1111 1111
STATUS
03h
0001 1xxx
000# #uuu
MSR
04h
100x xxxx
100u uuuu
PORT A
05h
- - - - xxxx
- - - - uuuu
PORT B
06h
xxxx xxxx
uuuu uuuu
PORT C
07h
xxxx xxxx
uuuu uuuu
Note : u = unchanged, x = unknown, - = unimplemented, read as “0”
# = value depends on the condition of the following table
Condition
Status: bit 4
Status: bit 3
/MCLR reset (not during SLEEP)
u
u
/MCLR reset during SLEEP
1
0
WDT reset (not during SLEEP)
0
1
WDT reset during SLEEP
0
0
This specification are subject to be changed without notice. Any latest information please preview
http;//www.mdtic.com.tw
http;//www.mx
mcu.com.cn
P. 5
2007/8 VER 1.5
MDT10P20(BF)
8. Instruction Set
Instruction Code
Mnemonic
Operands
Function
Operating
Status
010000 00000000 NOP
No operation
None
010000 00000001 CLRWT
Clear Watchdog timer
0→WT
TF, PF
010000 00000010 SLEEP
Sleep mode
0→WT,stop OSC
TF, PF
010000 00000011 TMODE
Load W to TMODE register W→TMODE
None
010000 00000100 RET
Return
Stack→PC
None
Control I/O port register
W→CPIO
Store W to register
W→R
010000 00000rrr
CPIO
R
010001 1rrrrrrr
STWR
011000 trrrrrrr
LDR R, t
Load register
R→t
Z
111010 iiiiiiii
LDWI I
Load immediate to W
I→W
None
010111 trrrrrrr
SWAPR R,t Swap halves register
[R(0~3) ↔
R(4~7)]→t
None
011001 trrrrrrr
INCR R,t
011010 trrrrrrr
INCRSZ R,
R
None
None
R + 1→t
Z
R + 1→t
None
011011 trrrrrrr
Increment register,skip if
zero
ADDWR R,t Add W and register
W + R→t
C,HC,Z
011100 trrrrrrr
SUBWR R,t Subtract W from register
R ﹣W→t
(R+/W+1→t)
C,HC,Z
011101 trrrrrrr
DECR R,t
011110 trrrrrrr
010010 trrrrrrr
DECRSZ R,t Decrement register,
skip if zero
ANDWR R,t AND W and register
R ∩ W→t
Z
110100 iiiiiiii
ANDWI I
AND W and immediate
I ∩ W→W
Z
010011 trrrrrrr
IORWR R,t
Inclu. OR W and register
R ∪ W→t
Z
110101 iiiiiiii
IORWI I
Inclu. OR W and immediate I ∪ W→W
Z
010100 trrrrrrr
XORWR R,t Exclu. OR W and register
R ♁ W→t
Z
110110 iiiiiiii
XORWI I
Exclu. OR W and immediate I ♁ W→W
Z
011111 trrrrrrr
COMR R, t
Complement register
/R→t
Z
010110 trrrrrrr
RRR R,t
Rotate right register
R(n)→R(n-1),
C→R(7) R(0)→C
C
010101 trrrrrrr
RLR R, t
Rotate left register
R(n)→(n+1),
C→R(0) R(7)→C
C
010000 1xxxxxxx
CLRW
Clear working register
0→W
Z
010001 0rrrrrrr
CLRR
Clear register
0→R
Z
0000bb brrrrrrr
BCR R, b
Bit clear
0→R(b)
None
0010bb brrrrrrr
BSR R, b
Bit set
1→R(b)
None
R
Increment register
r
Decrement register
R ﹣1→t
Z
R ﹣1→t
None
This specification are subject to be changed without notice. Any latest information please preview
http;//www.mdtic.com.tw
http;//www.mx
mcu.com.cn
P. 6
2007/8 VER 1.5
MDT10P20(BF)
Instruction Code Mnemonic
Operands
Function
Operating
Status
0001bb brrrrrrr
BTSC R, b Bit Test,skip if clear
Skip if R(b)=0
None
0011bb brrrrrrr
BTSS R, b Bit Test,skip if set
Skip if R(b)=1
None
100nnn nnnnnnnn LCALL n
Long CALL subroutine
n→PC,
PC+1→Stack
None
101nnn nnnnnnnn LJUMP n
Long JUMP to address
n→PC
None
110000 nnnnnnnn CALL
Call subroutine
n→PC,
PC+1→Stack
None
Return, place immediate to
W
Stack→PC,
i→W
None
JUMP to address
n→PC
None
110001 iiiiiiii
n
RTWI i
11001n nnnnnnnn JUMP n
Note :
W
WT
TMODE
CPIO
TF
PF
PC
OSC
Inclu.
Exclu.
AND
:
:
:
:
:
:
:
:
:
:
:
Working register
Watchdog timer
TMODE mode register
Control I/O port register
Timer overflow flag
Power loss flag
Program Counter
Oscillator
Inclusive ‘∪’
Exclusive ‘♁’
Logic AND ‘∩’
b
t
:
:
0
1
R :
C :
HC :
Z :
/
:
x
:
i
:
n :
Bit position
Target
: Working register
: General register
General register address
Carry flag
Half carry
Zero flag
Complement
Don’t care
Immediate data ( 8 bits )
Immediate address
9. Electrical Characteristics
(A) Operating Voltage & Frequency
Vdd ﹕2.3 V ~ 6.0 V
Frequency﹕0 Hz ~ 20 MHz
(B) Input Voltage
@ Vdd=5.0 V, Temperature=25 ℃
Vil
Vih
Port
Min.
Max.
PA, PB, PC
Vss
1.0 V
RTCC, /MCLR
Vss
1.0 V
PA, PB, PC
2.0 V
Vdd
RTCC, /MCLR
3.3 V
Vdd
*Threshold Voltage :
This specification are subject to be changed without notice. Any latest information please preview
http;//www.mdtic.com.tw
http;//www.mx
mcu.com.cn
P. 7
2007/8 VER 1.5
MDT10P20(BF)
Port A, Port B, Port C Vth=1.5 V
RTCC, /MCLR Vil=1.2 V, Vih=3.1V
(Schmitt Trigger)
(C) Output Voltage
@ Vdd=5.0 V, Temperature=25 ℃, the typical value as followings :
PA, PB, PC Port
Ioh=-20.0 mA
Voh=3.40 V
Iol=20.0 mA
Vol=0.50 V
Ioh=-5.0 mA
Voh=4.50 V
Iol=5.0 mA
Vol=0.10 V
(D) Leakage Current
@ Vdd=5.0 V, Temperature=25 ℃, the typical value as followings :
Iil
- 0.1μA (Max.)
Iih
+ 0.1 μA (Max.)
(E) Sleep Current
@WDT-Disable, Temperature=25 ℃, the typical value as followings :
Vdd=2.3 V
Idd<1.0 μA
Vdd=3.0 V
Idd<1.0 μA
Vdd=4.0 V
Idd<1.0 μA
Vdd=5.0 V
Idd<1.0 μA
Vdd=6.0 V
Idd<1.0 μA
@WDT-Enable, Temperature=25 ℃, the typical value as followings :
Vdd=2.3 V
Idd<1.0 μA
Vdd=3.0 V
Idd=3.0 μA
Vdd=4.0 V
Idd=6.0 μA
Vdd=5.0 V
Idd=11.0 μA
Vdd=6.0 V
Idd=17.0 μA
This specification are subject to be changed without notice. Any latest information please preview
http;//www.mdtic.com.tw
http;//www.mx
mcu.com.cn
P. 8
2007/8 VER 1.5
MDT10P20(BF)
F) Operating Current
Temperature=25℃, the typical value as followings :
(i) OSC Type=RC; WDT-Enable; @ Vdd=5.0 V PED=Disable
Cext. (F)
3P
20P
100P
300P
Rext. (Ohm)
Frequency (Hz)
Current (A)
4.7 K
11.24 M
1.2 mA
10.0 K
5.92 M
650 µA
47.0 K
1.38M
230 μA
100.0 K
658 K
165 μA
300.0 K
224 K
130 μA
470.0 K
141 K
120 μA
4.7 K
5.44 M
610 µA
10.0 K
2.75 M
366 μA
47.0 K
624 K
166 μA
100.0 K
295 K
138 μA
300.0 K
100 K
120 μA
470.0 K
63 K
117 μA
4.7 K
1.77 M
288 μA
10.0 K
884 K
200 μA
47.0 K
195 K
140 μA
100.0 K
92 K
128 μA
300.0 K
31 K
125 μA
470.0 K
20 K
122 μA
4.7 K
684 K
187 μA
10.0 K
336 K
155 μA
47.0 K
74 K
130 μA
100.0 K
35 K
127 μA
300.0 K
12 K
126 μA
470.0 K
7K
125 μA
This specification are subject to be changed without notice. Any latest information please preview
http;//www.mdtic.com.tw
http;//www.mx
mcu.com.cn
P. 9
2007/8 VER 1.5
MDT10P20(BF)
(ii) OSC Type=LF (OSC1&OSC2 External Cap about 10P); WDT-Disable﹔
PED=Disable
Voltage/Frequency
32
455 K (Ext50P)
K(Ext100P)
[email protected] μA
1M
Sleep
40.0 μA
<1.0 μA
2.3 V
7.0 μA
3.0 V
15.0 μA
45.0 μA
65.0 μA
<1.0 μA
4.0 V
35.0μA
85.0 μA
115.0 μA
<1.0 μA
5.0 V
70.0 μA
140.0 μA
180.0 μA
<1.0 μA
6.0 V
130.0 μA
215.0 μA
260.0 μA
<1.0 μA
(iii) OSC Type=XT (OSC1&OSC2 External Cap about 10P); WDT-Enable﹔
PED=Disable
Voltage/Frequency
1M
4M
2.1 V
50.0 μA
120.0 μA
290 μA
<1.0 μA
3.0 V
100.0 μA
230.0 μA
490 μA
3.0 μA
4.0 V
210.0 μA
400.0 μA
650 μA
6.0 μA
5.0 V
375.0 μA
590.0 µA
1.3 mA
11.0 μA
6.0 V
645.0 μA
850.0 µA
1.6 mA
17.0 μA
(iv) OSC Type=HF (OSC1&OSC2 External Cap about 10P);
10 M
Sleep
WDT-Enable﹔PED=Disable
Voltage/Frequency
4M
10 M
20 M
Sleep
2.1 V
150.0 μA
320.0 μA
X
<1.0 μA
3.0 V
280.0 μA
550.0 µA
950.0 µA
3.0 μA
4.0 V
510.0 μA
910.0 µA
1.5 mA
6.0 μA
5.0 V
800.0 μA
1.4 mA
2.3 mA
11.0 μA
6.0 V
1.3 mA
1.9 mA
3.2 mA
17.0 μA
This specification are subject to be changed without notice. Any latest information please preview
http;//www.mdtic.com.tw
http;//www.mx
mcu.com.cn
P. 10
2007/8 VER 1.5
MDT10P20(BF)
(G) Power Edge-detector Reset Voltage (Not in Sleep Mode), @ Vdd=5.0 V (PED : Enable)
Vpr≦1.6~1.8 V
Vpr ﹕Vdd (Power Supply)
PS. If PED_Enable then Internal Power_on_reset will be off
(H) The basic WDT time-out cycle time
@Temperature=25 ℃, the typical value as followings :
Vdd =5.0 V, Temperature=25℃,the typical value as followings:
Voltage (V)
Basic WDT time-out cycle time (ms)
2.3
25.2
3.0
22.4
4.0
20.4
5.0
18.8
6.0
18.0
This specification are subject to be changed without notice. Any latest information please preview
http;//www.mdtic.com.tw
http;//www.mx
mcu.com.cn
P. 11
2007/8 VER 1.5
MDT10P20(BF)
10. Port A ,Port B and Port C Equivalent Circuit
Working Register
QB
D
Data I/P
I/O
Control
Latch
I/O Control
CK
Q
Port I/O Pin
D
Data O/P
Latch
Write
CK
Q
Data Bus
D
QB
Read
Data I/P
Latch
Input Resistor
TTL Input Level
CK
This specification are subject to be changed without notice. Any latest information please preview
http;//www.mdtic.com.tw
http;//www.mx
mcu.com.cn
P. 12
2007/8 VER 1.5
MDT10P20(BF)
11. MCLRB and RTCC Input Equivalent Circuit
R≒1K
MCLRB
Schmitt Trigger
R≒1K
RTCC
Schmitt Trigger
This specification are subject to be changed without notice. Any latest information please preview
http;//www.mdtic.com.tw
http;//www.mx
mcu.com.cn
P. 13
2007/8 VER 1.5
MDT10P20(BF)
12. Block Diagram
Stack Two Levels
RAM
72*8
EPROM
2048×14
Port
PA0~PA3
4 bits
Port A
11 bits
11 bits
Program Counters
14 bits
Instruction
Register
Special Register
OSC1 OSC2
MCLR
Oscillator Circuit
D0~D7
Instruction
Decoder
Port B
Port
PB0~PB7
8 bits
Control Circuit
Data 8-bit
Power on Reset
Power Down Reset
Working Register
ALU
Status Register
Port
PC0~PC7
8 bits
Port C
8-bit Timer/Counter
Prescale
WDT/OST
Timer
RTCC
This specification are subject to be changed without notice. Any latest information please preview
http;//www.mdtic.com.tw
http;//www.mx
mcu.com.cn
P. 14
2007/8 VER 1.5
MDT10P20(BF)
13. External Capacitor Selection For Crystal Oscillator
@ Vdd=3.0 V~ 5.0 V
Osc. Type
HF
XT
LF
Resonator Freq.
C1
C2
20 MHz
5 pF ~10 pF
10 pF~30 pF
10 MHz
10 pF ~50 pF
20 pF ~100 pF
4 MHz
10 pF ~50 pF
20 pF ~100 pF
10 MHz
10 pF ~30 pF
10 pF ~50 pF
4 MHz
10 pF ~50 pF
20 pF ~100 pF
1 MHz
10 pF ~30 pF
20 pF ~50 pF
1 MHz
3 pF ~5 pF
3 pF ~5 pF
455 K
10 pF ~30 pF
20 pF ~50 pF
32 K
10 pF ~20 pF
15 pF ~30 pF
MDT10P20
OSC1
C1
OSC2
C2
To increase the stability of oscillator and the ability of anti-noise, the above values of the
external capacitor range can be recommended for reference, but the higher capacitance also
increases the start-up time.
This specification are subject to be changed without notice. Any latest information please preview
http;//www.mdtic.com.tw
http;//www.mx mcu.com.cn
P. 15
2007/8 VER 1.5