MDT2030 u 1. General Description 4 oscillator start-up time can be selected by programming option: 150 µs, 20 ms, 40 ms, 80 ms This ROM-Based 8-bit micro-controller uses a fully static CMOS technology process to achieve high u speed, small size, the low power and high noise programmable prescaler u immunity. On chip memory includes 2K words EPROM, and On-chip RC oscillator based Watchdog Timer(WDT) u 80 bytes static RAM. 8-bit real time clock/counter(RTCC) with 8-bit 12 I/O pins with their own independent direction control 2. Features 3. Applications The followings are some of the features on the hardware and software : The application areas of this MDT2030 range from appliance motor control and high speed automotive u Fully CMOS static design u 8-bit data bus u On chip EPROM size : 2.0 K words u Internal RAM size : 80 bytes to low power remote transmitters/receivers, pointing devices, and telecommunications processors, such as Remote controller, small instruments, chargers, toy, automobile and PC peripheral … etc. (73 general purpose registers, 7 special registers) u 36 single word instructions u 14-bit instructions u 2-level stacks u Operating voltage : 2.3 V ~ 5.5 V u Operating frequency : 0 ~ 20 MHz u The most fast execution time is 200 ns under 4. Pin Assignment 20 MHz in all single cycle instructions except the branch instruction u Addressing modes include direct, indirect and relative addressing modes u Power-on Reset u Power edge-detector Reset u Sleep Mode for power saving u 4 types of oscillator can be selected by PA2 PA3 RTCC /MCLR Vss PB0 PB1 PB2 PB3 1 2 3 4 5 6 7 8 9 18 17 16 15 14 13 12 11 10 PA1 PA0 OSC1 OSC2 Vdd PB7 PB6 PB5 PB4 programming option: RC－Low cost RC oscillator LFXT－Low frequency crystal oscillator XTAL－Standard crystal oscillator HFXT－High frequency crystal oscillator This specification are subject to be changed without notice. Any latest information please preview http;//www.mdtic.com.tw P. 1 2004/1 Ver. 1.3 MDT2030 5. Block Diagram EPROM Stack Two Levels Port PA 0~P A3 4 bits RAM 73×8 2048×14 Port A 11 bits 14 bits 11 bits Program Counters Instruction Register Special Register D0~D 7 OS OS C1 C2 MC LR Oscillator Circuit Port PB0 ~P B7 8 bits Port B Instruction Decoder Control Circuit Data 8-bit Power on Reset Power Down Reset Working Register Status Register ALU 8-bit Timer/Counter WDT/OST Timer Prescale RTCC This specification are subject to be changed without notice. Any latest information please preview http;//www.mdtic.com.tw P. 2 2004/1 Ver. 1.3 MDT2030 6. Pin Function Description Pin Name I/O Function Description PA0~PA3 I/O Port A, TTL input level PB0~PB7 I/O Port B, TTL input level RTCC I Real Time Clock/Counter, Schmitt Trigger input levels /MCLR I Master Clear, Schmitt Trigger input levels OSC1 I Oscillator Input OSC2 O Oscillator Output Vdd Power supply Vss Ground 7. Memory Map (A) Register Map Address Description 00 Indirect Addressing Register 01 RTCC 02 PC 03 STATUS 04 MSR 05 Port A 06 Port B 07~1F Internal RAM, Memory bank 0 30~3F Internal RAM, Memory bank 1 50~5F Internal RAM, Memory bank 2 70~7F Internal RAM, memory bank 3 (1) IAR ( Indirect Address Register) : R0 (2) RTCC (Real Time Counter/Counter Register) : R1 This specification are subject to be changed without notice. Any latest information please preview http;//www.mdtic.com.tw P. 2 2004/1 Ver. 1.3 MDT2030 (3) PC (Program Counter) : R2 Write PC, CALL --- always 0 JUMP --- from instruction word RTIW, RET --- from STACK A10 A9 A8 A7~A0 Write PC, JUMP, CALL --- from STATUS b6 b5 RTIW, RET --- from STACK Write PC --- from ALU JUMP, CALL --- from instruction word RTIW, RET --- from STACK (4) STATUS (Status register) : R3 Bit Symbol Function 0 C Carry bit 1 HC Half Carry bit 2 Z Zero bit 3 PF Power loss Flag bit 4 TF WDT Timer overflow Flag bit page ROM page select bit : 6—5 00 : Page 0, 000H --- 1FFH 01 : Page 1, 200H --- 3FFH 10 : Page 2, 400H --- 5FFH 11 : Page 3, 600H --- 7FFH 7 —— General purpose bit This specification are subject to be changed without notice. Any latest information please preview http;//www.mdtic.com.tw P. 3 2004/1 Ver. 1.3 MDT2030 (5) MSR (Memory Bank Select Register) : R4 Memory Bank Select Register : 00 : 10~1F 01 : 30~3F 10 : 50~5F 11 : 70~7F b7 b6 b5 b4 b3 b2 b1 b0 Read only “1” Indirect Addressing Mode (6) PORT A : R5 PA3~PA0, I/O Register (7) PORT B : R6 PB7~PB0, I/O Register (8) TMR (Time Mode Register) Bit Symbol Function Prescaler Value 2—0 PS2—0 3 PSC 4 TCE 5 TCS RTCC rate WDT rate 0 0 0 1:2 1:1 0 0 1 1:4 1:2 0 1 0 1:8 1:4 0 1 1 1 : 16 1:8 1 0 0 1 : 32 1 : 16 1 0 1 1 : 64 1 : 32 1 1 0 1 : 128 1 : 64 1 1 1 1 : 256 1 : 128 Prescaler assignment bit : 0 — RTCC 1 — Watchdog Timer RTCC signal Edge : 0 — Increment on low-to-high transition on RTCC pin 1 — Increment on high-to-low transition on RTCC pin RTCC signal set : 0 — Internal instruction cycle clock 1 — Transition on RTCC pin (9) CPIO A, CPIO B (Control Port I/O Mode Register) The CPIO register is “write-only” ＝“0”, I/O pin in output mode; ＝“1”, I/O pin in input mode. This specification are subject to be changed without notice. Any latest information please preview http;//www.mdtic.com.tw P. 4 2004/1 Ver. 1.3 MDT2030 (10) Configurable options for EPROM (Set by writer) : Oscillator Type RC Oscillator Start-up Time 150 µs,20ms,40ms,80ms Oscillator HFXT Oscillator 20 ms,40ms,80ms XTAL Oscillator 20ms,40 ms,80ms LFXT Oscillator 40 ms,80 ms Watchdog Timer control Watchdog timer disable all the time Watchdog timer enable all the time Power Edge Detect Security state PED Disable Security weak Disable PED Enable Security Disable Security Enable The default security state of EPROM is weak disable. Once the IC was set to enable or disable, it’s forbidden to change. (B) Program Memory Address Description 000-7FF Program memory 7FF The starting address of power on, external reset or WDT time-out reset. 8. Reset Condition for all Registers Register Address Power-On Reset /MCLR or WDT Reset CPIO A －－ 1111 1111 1111 1111 CPIO B －－ 1111 1111 1111 1111 TMR －－ --11 1111 --11 1111 IAR 00h － － RTCC 01h xxxx xxxx uuuu uuuu PC 02h 1111 1111 1111 1111 STATUS 03h 0001 1xxx 000# #uuu MSR 04h 100x xxxx 100u uuuu This specification are subject to be changed without notice. Any latest information please preview http;//www.mdtic.com.tw P. 5 2004/1 Ver. 1.3 MDT2030 Register Address Power-On Reset /MCLR or WDT Reset PORT A 05h - - - - xxxx - - - - uuuu PORT B 06h xxxx xxxx uuuu uuuu Note : u＝unchanged, x＝unknown, - ＝unimplemented, read as “0” #＝value depends on the condition of the following table Condition Status: bit 4 Status: bit 3 /MCLR reset (not during SLEEP) u u /MCLR reset during SLEEP 1 0 WDT reset (not during SLEEP) 0 1 WDT reset during SLEEP 0 0 9. Instruction Set : Instruction Code Mnemonic Operands Function Operating Status 010000 00000000 NOP No operation None 010000 00000001 CLRWT Clear Watchdog timer 0→WT TF, PF 010000 00000010 SLEEP Sleep mode 0→WT, stop OSC TF, PF 010000 00000011 TMODE Load W to TMODE register W→TMODE None 010000 00000100 RET Return Stack→PC None 010000 00000rrr CPIO R Control I/O port register W→CPIO r None 010001 1rrrrrrr STWR R Store W to register W→R None 011000 trrrrrrr LDR R, t Load register R→t Z 111010 iiiiiiii LDWI I Load immediate to W I→W None 010111 trrrrrrr SWAPR R, t Swap halves register [R(0~3) ↔R(4~7)] →t None 011001 trrrrrrr INCR R, t Increment register R + 1→t Z 011010 trrrrrrr INCRSZ R, t Increment register, skip if zero R + 1→t None 011011 trrrrrrr ADDWR R, t Add W and register W + R→t C, HC, Z 011100 trrrrrrr SUBWR R, t Subtract W from register R ﹣W→t or (R+/W+1→t) C, HC, Z 011101 trrrrrrr DECR R, t Decrement register R ﹣1→t Z 011110 trrrrrrr DECRSZ R, t Decrement register, skip if zero R ﹣1→t None 010010 trrrrrrr ANDWR R, t AND W and register R ∩ W→t Z 110100 iiiiiiii ANDWI i AND W and immediate i ∩ W→W Z 010011 trrrrrrr IORWR R, t Inclu. OR W and register R ∪ W→t Z 110101 iiiiiiii IORWI i Inclu. OR W and immediate i ∪ W→W Z This specification are subject to be changed without notice. Any latest information please preview http;//www.mdtic.com.tw P. 6 2004/1 Ver. 1.3 MDT2030 Instruction Code Mnemonic Operands Function Operating Status 010100 trrrrrrr XORWR R, t Exclu. OR W and register R ♁ W→t Z 110110 iiiiiiii XORWI i Exclu. OR W and immediate i ♁ W→W Z 011111 trrrrrrr COMR R, t Complement register /R→t Z 010110 trrrrrrr RRR Rotate right register R(n) →R(n-1), C R, t C→R(7), R(0)→C 010101 trrrrrrr RLR R, t Rotate left register R(n)→r(n+1), C C→R(0), R(7)→C 010000 1xxxxxxx CLRW Clear working register 0→W Z 010001 0rrrrrrr CLRR Clear register 0→R Z 0000bb brrrrrrr BCR R, b Bit clear 0→R(b) None 0010bb brrrrrrr BSR R, b Bit set 1→R(b) None 0001bb brrrrrrr BTSC R, b Bit Test, skip if clear Skip if R(b)=0 None 0011bb brrrrrrr BTSS R, b Bit Test, skip if set Skip if R(b)=1 None 1000nn nnnnnnnn LCALL n Long CALL subroutine n→PC, None R PC+1→Stack 1010nn nnnnnnnn LJUMP n Long JUMP to address n→PC None 110000 nnnnnnnn CALL Call subroutine n→PC, None n PC+1→Stack 110001 iiiiiiii RTIW 11001n nnnnnnnn JUMP i n Return, place immediate to W Stack→PC,i→W None JUMP to address n→PC None Note : W WT TMODE CPIO TF PF PC OSC Inclu. Exclu. AND : : : : : : : : : : : Working register Watchdog timer TMODE mode register Control I/O port register Timer overflow flag Power loss flag Program Counter Oscillator Inclusive ‘∪’ Exclusive ‘♁’ Logic AND ‘∩’ b t R C HC Z / x i n : : 0 1 : : : : : : : : Bit position Target : Working register : General register General register address Carry flag Half carry Zero flag Complement Don’t care Immediate data ( 8 bits ) Immediate address This specification are subject to be changed without notice. Any latest information please preview http;//www.mdtic.com.tw P. 7 2004/1 Ver. 1.3 MDT2030 10. Electrical Characteristics (Operating temperature at 25℃). Sym Description Condition Vdd Operating voltage VIL Min Typ Max Unit 2.3 6.3 V Input Low Voltage PA, PB Vdd=5V -0.6 1.0 V RTCC, /MCLR Vdd=5V -0.6 1.0 V PA, PB Vdd=5V 2.0 Vdd V RTCC, /MCLR Vdd=5V 3.2 Vdd V IIL Input leakage current Vdd=5V +/-1 µA VOL Output Low Voltage VIH Input high Voltage PA, PB Vdd=5V, IOL=20mA 0.4 V Vdd=5V, IOL=5mA 0.1 V Vdd=5V, IOH= -20mA 3.8 V Vdd=5V, IOH= -5mA 4.5 V VOH Output High Voltage PA, PB µA Islp Sleep current (WDT disable) Vdd＝2.3 ~ 6.3 V 0.1 Islp Sleep current (WDT enable) Vdd＝2.3 V 0.1 µA Vdd＝3.0 V 3 µA Vdd＝4.0 V 8 µA Vdd＝5.0 V 16 µA Vdd＝6.3 V 35 µA Vpr Power Edge-detector Reset Voltage Twdt The basic WDT time-out cycle time TFLT /MCLR filter 1.1 1.0 1.3 V Vdd＝2.3 V 26.4 mS Vdd＝3.0 V 22.7 mS Vdd＝4.0 V 20.1 mS Vdd＝5.0 V 18.1 mS Vdd＝6.3 V 16.4 mS Vdd＝5.0 V 600 nS This specification are subject to be changed without notice. Any latest information please preview http;//www.mdtic.com.tw P. 8 2004/1 Ver. 1.3 MDT2030 11. Operating Current Temperature＝25 ℃, the typical value as followings : 11.1 OSC Type＝RC ; WDT－Enable; @ Vdd＝5.0 V Cext. (F) 3P 20P 100P 300P Rext. (Ohm) Frequency (Hz) Current (A) 4.7 K 12.3 M 1.35 mA 10.0 K 7.2 M 750 µA 47.0 K 1.54 M 250 µA 100.0 K 700 K 180 µA 300.0 K 240 K 130 µA 470.0 K 150 K 120 µA 4.7 K 6.0 M 720 µA 10.0 K 3.0 M 440 µA 47.0 K 700 K 180 µA 100.0 K 320 K 145 µA 300.0 K 100 K 125 µA 470.0 K 70 K 120 µA 4.7 K 1.8 M 290 µA 10.0 K 880 K 190 µA 47.0 K 195 K 125 µA 100.0 K 95 K 110 µA 300.0 K 31 K 105 µA 470.0 K 20 K 105 µA 4.7 K 720 K 175 µA 10.0 K 350 K 135 µA 47.0 K 80 K 105 µA 100.0 K 36 K 105 µA 300.0 K 12 K 100 µA 470.0 K 8K 100 µA This specification are subject to be changed without notice. Any latest information please preview http;//www.mdtic.com.tw P. 9 2004/1 Ver. 1.3 MDT2030 11.2 OSC Type＝LF (C=20 p); WDT－Disable Voltage/Frequency 32 K 455 K 1M Sleep 2.1 V 2.2 µA 18 µA 33 µA 3.0 V 4.4 µA 33 µA 55 µA ＜1.0 µA 4.0 V 11 µA 55 µA 90 µA ＜1.0 µA 5.0 V 26 µA 86 µA 140 µA ＜1.0 µA 6.3 V 77 µA 150 µA 250 µA ＜1.0 µA ＜1.0 µA 11.3 OSC Type＝XT (C=10 p); WDT－Enable Voltage/Frequency 1M 4M 10 M Sleep 2.1 V 55 µA 140 µA 300 µA ＜1.0 µA 3.0 V 100 µA 260 µA 500 µA 2 µA 4.0 V 220 µA 420 µA 820 µA 8 µA 5.0 V 355 µA 670 µA 1.25 mA 16 µA 6.3 V 660 µA 1.1 mA 1.85 mA 35 µA 10 M 20 M 11.4 OSC Type＝HF (C=10 p); WDT－Enable Voltage/Frequency 4M Sleep 2.1 V 165 µA 310µA 660 µA ＜1.0 µA 3.0 V 310 µA 600 µA 1.1 mA 2 µA 4.0 V 510 µA 950 µA 1.8 mA 8 µA 5.0 V 800 µA 1.4 mA 2.5 mA 16 µA 6.3 V 1.35 mA 2.2 mA 3.8 mA 35 µA This specification are subject to be changed without notice. Any latest information please preview http;//www.mdtic.com.tw P. 10 2004/1 Ver. 1.3 MDT2030 12. Port A and Port B Equivalent Circuit D Q I/O Control Latch I/O Control QB CK Port I/O Pin D Data O/P Latch Write G QB Data Bus D QB Read Input Resistor Data I/P Latch TTL Input Level G This specification are subject to be changed without notice. Any latest information please preview http;//www.mdtic.com.tw P. 11 2004/1 Ver. 1.3 MDT2030 13. MCLRB and RTCC Input Equivalent Circuit MCLRB R≒1K Schmitt Trigger R≒1K RTCC Schmitt Trigger This specification are subject to be changed without notice. Any latest information please preview http;//www.mdtic.com.tw P. 12 2004/1 Ver. 1.3 MDT2030 14. External Capacitor Selection For Crystal Oscillator @ Vdd＝5.0 V Osc. Type Resonator Freq. Capacity Range 20 MHz 10 pF ~ 50 pF 10 MHz 20 pF ~ 50 pF 4 MHz 10 pF ~ 30 pF 10 MHz 10 pF ~ 50 pF 4 MHz 10 pF ~ 50 pF 1 MHz 20 pF ~50 pF 1 MHz 20 pF ~ 30 pF 455 K 20 pF ~30 pF 32 K 20 pF ~30 pF HF XT LF MDT2030 OSC1 C1 OSC2 C2 To increase the stability of oscillator and the ability of anti-noise, the above values of the external capacitor are for reference only, but the higher capacitance also increases the start-up time. This specification are subject to be changed without notice. Any latest information please preview http;//www.mdtic.com.tw P. 13 2004/1 Ver. 1.3