PHILIPS BUK563-48C

Philips Semiconductors
Product specification
PowerMOS transistor
Voltage clamped logic level FET
GENERAL DESCRIPTION
Protected N-channel enhancement
mode logic level field-effect power
transistor in a plastic envelope
suitable
for
surface
mount
applications.
The device is intended for use in
automotive applications. It has
built-in zener diodes providing active
drain voltage clamping.
PINNING - SOT404
PIN
BUK563-48C
QUICK REFERENCE DATA
SYMBOL
PARAMETER
V(CL)DSR
ID
Ptot
Tj
WDSRR
Drain-source clamp voltage
Drain current (DC)
Total power dissipation
Junction temperature
Repetitive clamped turn off
energy; Tj = 150˚C
Drain-source on-state
resistance; VGS = 5 V
RDS(ON)
PIN CONFIGURATION
MIN.
TYP.
40
48
MAX. UNIT
58
21
75
175
50
V
A
W
˚C
mJ
85
mΩ
SYMBOL
DESCRIPTION
d
mb
1
gate
2
drain
3
source
tab
drain
g
2
1
s
3
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL
PARAMETER
CONDITIONS
VDS
VDG
±VGS
ID
ID
IDM
Drain-source voltage
Drain-gate voltage
Gate-source voltage
Drain current (DC)
Drain current (DC)
Drain current (pulse peak
value)
Total power dissipation
Storage temperature
Junction temperature
Ptot
Tstg
Tj
MIN.
MAX.
UNIT
continuous
continuous
Tmb = 25 ˚C
Tmb = 100 ˚C
Tmb = 25 ˚C
-
30
30
15
21
15
84
V
V
V
A
A
A
Tmb = 25 ˚C
-
- 55
- 55
75
175
175
W
˚C
˚C
THERMAL RESISTANCES
SYMBOL
PARAMETER
CONDITIONS
Rth j-mb
Thermal resistance junction to
heatsink
Thermal resistance junction to
ambient
Rth j-a
February 1996
MIN.
TYP.
MAX.
UNIT
with heatsink compound
-
-
2
K/W
minimum footprint,
FR4 board (see fig. 18)
-
50
-
K/W
1
Rev 1.000
Philips Semiconductors
Product specification
PowerMOS transistor
Voltage clamped logic level FET
BUK563-48C
STATIC CHARACTERISTICS
Tj = 25 ˚C unless otherwise specified
SYMBOL
PARAMETER
CONDITIONS
V(BR)DG
Drain-gate zener voltage
VGS(TO)
VGS(ON)
Gate threshold voltage
Gate voltage
IDSS
IGSS
RDS(ON)
Zero gate voltage drain current
Gate source leakage current
Drain-source on-state
resistance
0.2 < -IG < 0.4 mA;
-55˚C < Tj < 150˚C
VDS = VGS; ID = 1 mA
VDS = 10 V; ID = 10 A;
-55˚C < Tj < 150˚C
VDS = 30 V; VGS = 0 V; Tj =150 ˚C
VGS = ±15 V; VDS = 0 V; Tj =150 ˚C
VGS = 5 V; ID = 10 A
MIN.
TYP.
MAX.
UNIT
38
45
54
V
1.0
2.0
1.5
3.1
2.0
4.0
V
V
-
0.01
0.1
65
1.0
10
85
mA
µA
mΩ
MIN.
TYP.
MAX.
UNIT
DYNAMIC CHARACTERISTICS
Tj = 25 ˚C unless otherwise specified
SYMBOL
PARAMETER
CONDITIONS
V(CL)DSR
Drain source clamp voltage
(peak value)
RG = 10 kΩ; ID = 10 A;
-55 < Tj < 150˚C; Inductive load.
40
48
58
V
gfs
Forward transconductance
VDS = 25 V; ID = 10 A
7
12
-
S
Ciss
Coss
Crss
Input capacitance
Output capacitance
Feedback capacitance
VGS = 0 V; VDS = 25 V; f = 1 MHz
-
550
240
100
825
350
160
pF
pF
pF
td on
tr
td off
tf
Turn-on delay time
Turn-on rise time
Turn-off delay time
Turn-off fall time
VDD = 12 V; ID = 5 A;
VGS = 5 V; RG = 10 kΩ;
-
3.5
22
16
18
-
µs
µs
µs
µs
Ld
Internal drain inductance
-
4.5
-
nH
Ls
Internal source inductance
Measured from drain lead 6 mm
from package to centre of die
Measured from source lead 6 mm
from package to source bond pad
-
7.5
-
nH
MIN.
TYP.
MAX.
UNIT
REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS
Tj = 25 ˚C unless otherwise specified
SYMBOL
PARAMETER
CONDITIONS
IDR
Continuous reverse drain
current
Pulsed reverse drain current
Diode forward voltage
-
-
-
21
A
IF = 21 A ; VGS = 0 V
-
1.3
84
1.7
A
V
IDRM
VSD
February 1996
2
Rev 1.000
Philips Semiconductors
Product specification
PowerMOS transistor
Voltage clamped logic level FET
BUK563-48C
CLAMPED ENERGY LIMITING VALUE
SYMBOL
PARAMETER
CONDITIONS
WDSRS
Non-repetitive drain-source
clamped inductive turn off
energy
WDSRR
120
MIN.
MAX.
UNIT
Tj = 25˚C prior to clamping;
ID = 10 A; VDD < 16 V; VGS = 5 V;
RG = 10 kΩ; inductive load
-
200
mJ
Drain-source repetitive clamped Tj = 150˚C prior to clamping;
inductive turn off energy
ID = 10 A; VDD < 16 V; VGS = 5 V;
RG = 10 kΩ; inductive load
-
50
mJ
Normalised Power Derating
PD%
110
110
100
100
90
90
80
80
70
70
60
60
50
50
40
40
30
30
20
20
10
10
0
0
20
40
60
80 100
Tmb / C
120
140
160
0
180
0
Fig.1. Normalised power dissipation.
PD% = 100⋅PD/PD 25 ˚C = f(Tmb)
100
ID
S/
=
N)
VD
1E+01
40
60
80 100
Tmb / C
120
140
160
180
ZTHX53
Zth j-mb / (K/W)
tp =
10 us
O
S(
20
Fig.3. Normalised continuous drain current.
ID% = 100⋅ID/ID 25 ˚C = f(Tmb); conditions: VGS ≥ 5 V
BUK553-48C
ID / A
Normalised Current Derating
ID%
120
1E+00
RD
0.5
0.2
100 us
0.1
10
1E-01
1 ms
DC
Self-clamped
1
1
10
VDS / V
PD
0.02
10 ms
100 ms
0
1E-02
1E-07
100
Fig.2. Safe operating area. Tmb = 25 ˚C
ID & IDM = f(VDS); IDM single pulse; parameter tp
February 1996
0.05
tp
D=
T
1E-05
1E-03
t/s
1E-01
tp
T
t
1E+01
Fig.4. Transient thermal impedance.
Zth j-mb = f(t); parameter D = tp/T
3
Rev 1.000
Philips Semiconductors
Product specification
PowerMOS transistor
Voltage clamped logic level FET
ID / A
40
BUK563-48C
BUK5Y3-48C
40
VGS / V = 5
ID / A
BUK5Y3-48C
10
4.5
30
30
4
20
20
3.5
3
10
10
Tmb / degC =
150
25
-55
2.5
0
0
2
4
6
8
0
10
0
1
2
VDS / V
Fig.5. Typical output characteristics, Tj = 25 ˚C.
ID = f(VDS); parameter VGS
2.5
3
3.5
5
6
7
Fig.8. Typical transfer characteristics.
ID = f(VGS) ; conditions: VDS = 25 V.
BUK5Y3-48C
RDS(ON) / Ohm
0.5
3
4
VGS / V
gfs / S
20
BUK5Y3-48C
VGS / V = 4
0.4
15
4.5
0.3
5
10
0.2
5
0.1
0
Tmb / degC =
150
25
-55
10
0
10
20
VDS / V
30
0
40
0
Fig.6. Typical on-state resistance, Tj = 25 ˚C.
RDS(ON) = f(ID); parameter VGS
51
V(CL)DSR / V
10
20
Id / A
30
40
Fig.9. Typical transconductance.
gfs = f(ID); conditions: VDS = 25 V
BUK5Y3-48C
58
50
V(CL)DSR / V
BUK5Y3-48C
Tmb / degC =
150
25
-55
56
49
54
48
52
47
50
46
Tmb / degC =
45
44
43
48
150
25
-55
0
2
4
6
ID / A
8
46
10
44
12
Fig.7. Typical clamping voltage
V(CL)DSR = f(ID) ; conditions: RG = 10 kΩ
February 1996
1
2
5
RG / kOhm
10
20
Fig.10. Typical clamping voltgage
V(CL)DSR = f(RG) ; conditions: ID = 10 A.
4
Rev 1.000
Philips Semiconductors
Product specification
PowerMOS transistor
Voltage clamped logic level FET
a
2.0
BUK563-48C
VGS(TO) / V
Normalised RDS(ON) = f(Tj)
max.
2
1.5
typ.
1.0
min.
1
0.5
0
0
-60
-20
20
60
Tj / C
100
140
-60
180
SUB-THRESHOLD CONDUCTION
ID / A
20
60
Tj / C
100
140
180
Fig.14. Gate threshold voltage.
VGS(TO) = f(Tj); conditions: ID = 1 mA; VDS = VGS
Fig.11. Normalised drain-source on-state resistance.
a = RDS(ON)/RDS(ON)25 ˚C = f(Tj); ID = 10 A; VGS = 5 V
1E-01
-20
40
IS / A
BUK5Y3-48C
Tmb / degC =
150
25
-55
1E-02
30
2%
1E-03
98 %
typ
20
1E-04
10
1E-05
1E-06
0
0.4
0.8
1.2
VGS / V
1.6
2
0
2.4
Fig.12. Sub-threshold drain current.
ID = f(VGS); conditions: Tj = 25 ˚C; VDS = VGS
2000
C / pF
0
0.5
VSDS / V
1
1.5
Fig.15. Typical reverse diode current.
IF = f(VSDS); conditions: VGS = 0 V; parameter Tj
BUK5Y3-48C
7
VGS / V
BUK5Y3-48C
VDD / V = 12
30
6
1000
5
Ciss
500
4
3
200
Coss
2
100
1
Crss
50
0.01
0.1
1
VDS / V
10
0
100
Fig.13. Typical capacitances, Ciss, Coss, Crss.
C = f(VDS); conditions: VGS = 0 V; f = 1 MHz
February 1996
0
5
10
QG / nC
15
20
Fig.16. Typical turn-on gate-charge characteristics.
VGS = f(QG); conditions: ID = 10 A; parameter VDS
5
Rev 1.000
Philips Semiconductors
Product specification
PowerMOS transistor
Voltage clamped logic level FET
BUK563-48C
I,V
VDD
V(CL)DSR
Load
5V
t p : adjust for correct Ic
ID
VDS
VGS
t
D.U.T.
P,E
PDS = ID x VDS
RG
E = PDS dt
VGE
WDSR
Id measure
0V
0R1
t
Fig.17. Inductive clamping test circuit.
February 1996
Fig.18. Typical Inductive Clamping waveforms
6
Rev 1.000
Philips Semiconductors
Product specification
PowerMOS transistor
Voltage clamped logic level FET
BUK563-48C
MECHANICAL DATA
Dimensions in mm
4.5 max
1.4 max
10.3 max
Net Mass: 1.4 g
11 max
15.4
2.5
0.85 max
(x2)
0.5
2.54 (x2)
Fig.19. SOT404 : centre pin connected to mounting base.
MOUNTING INSTRUCTIONS
Dimensions in mm
11.5
9.0
17.5
2.0
3.8
5.08
Fig.20. SOT404 : soldering pattern for surface mounting.
Notes
1. Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent
damage to MOS gate oxide.
2. Epoxy meets UL94 V0 at 1/8".
February 1996
7
Rev 1.000
Philips Semiconductors
Product specification
PowerMOS transistor
Voltage clamped logic level FET
BUK563-48C
DEFINITIONS
Data sheet status
Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification
This data sheet contains final product specifications.
Limiting values
Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and
operation of the device at these or at any other conditions above those given in the Characteristics sections of
this specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
 Philips Electronics N.V. 1996
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the
copyright owner.
The information presented in this document does not form part of any quotation or contract, it is believed to be
accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any
consequence of its use. Publication thereof does not convey nor imply any license under patent or other
industrial or intellectual property rights.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices or systems where malfunction of these
products can be reasonably expected to result in personal injury. Philips customers using or selling these products
for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting
from such improper use or sale.
February 1996
8
Rev 1.000