Order this document by MJW16212/D SEMICONDUCTOR TECHNICAL DATA NPN Bipolar Power Deflection Transistor For High and Very High Resolution Monitors The MJW16212 is a state–of–the–art SWITCHMODE bipolar power transistor. It is specifically designed for use in horizontal deflection circuits for 20 mm diameter neck, high and very high resolution, full page, monochrome monitors. • • • • 1500 Volt Collector–Emitter Breakdown Capability Typical Dynamic Desaturation Specified (New Turn–Off Characteristic) Application Specific State–of–the–Art Die Design Fast Switching: 200 ns Inductive Fall Time (Typ) 2000 ns Inductive Storage Time (Typ) • Low Saturation Voltage: 0.15 Volts at 5.5 Amps Collector Current and 2.5 A Base Drive • Low Collector–Emitter Leakage Current — 250 µA Max at 1500 Volts — VCES • High Emitter–Base Breakdown Capability For High Voltage Off Drive Circuits — 8.0 Volts (Min) ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ v ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ *Motorola Preferred Device POWER TRANSISTOR 10 AMPERES 1500 VOLTS – VCES 50 AND 150 WATTS MAXIMUM RATINGS Rating Symbol Value Unit Collector–Emitter Breakdown Voltage VCES 1500 Vdc Collector–Emitter Sustaining Voltage VCEO(sus) 650 Vdc VEBO 8.0 Vdc Emitter–Base Voltage RMS Isolation Voltage (2) (for 1 sec, TA = 25_C, Rel. Humidity < 30%) VISOL Per Fig. 14 Per Fig. 15 V — — Collector Current — Continuous Collector Current — Pulsed (1) IC ICM 10 15 Adc Base Current — Continuous Base Current — Pulsed (1) IB IBM 5.0 10 Adc W (BER) 0.2 mJ PD 150 39 1.49 Watts TJ, Tstg – 55 to 125 _C Symbol Max Unit RθJC 0.67 _C/W TL 275 _C Maximum Repetitive Emitter–Base Avalanche Energy Total Power Dissipation @ TC = 25_C Total Power Dissipation @ TC = 100_C Derated above TC = 25_C Operating and Storage Temperature Range CASE 340K–01 TO–247AE W/_C THERMAL CHARACTERISTICS Characteristic Thermal Resistance — Junction to Case Lead Temperature for Soldering Purposes 1/8″ from the case for 5 seconds (1) Pulse Test: Pulse Width = 5.0 ms, Duty Cycle 10%. (2) Proper strike and creepage distance must be provided. Preferred devices are Motorola recommended choices for future use and best overall value. SCANSWITCH and SWITCHMODE are trademarks of Motorola Inc. REV 2 Motorola, Inc. 1996 Motorola Bipolar Power Transistor Device Data 3–1 ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ v ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ MJW16212 ELECTRICAL CHARACTERISTICS (TC = 25_C unless otherwise noted) Characteristic Symbol Min Typ Max Unit Collector Cutoff Current (VCE = 1500 V, VBE = 0 V) Collector Cutoff Current (VCE = 1200 V, VBE = 0 V) ICES — — — — 250 25 µAdc Emitter–Base Leakage (VEB = 8.0 Vdc, IC = 0) IEBO — — 25 µAdc Emitter–Base Breakdown Voltage (IE = 1.0 mA, IC = 0) V(BR)EBO 8.0 11 — Vdc Collector–Emitter Sustaining Voltage (Table 1) (IC = 10 mAdc, IB = 0) VCEO(sus) 650 — — Vdc Collector–Emitter Saturation Voltage (IC = 5.5 Adc, IB = 2.2 Adc) Collector–Emitter Saturation Voltage (IC = 3.0 Adc, IB = 400 mAdc) VCE(sat) — — 0.15 0.14 1.0 1.0 Vdc Base–Emitter Saturation Voltage (IC = 5.5 Adc, IB = 2.2 Adc) VBE(sat) — 0.9 1.5 Vdc hFE — 4.0 24 6.0 — 10 — Dynamic Desaturation Interval (IC = 5.5 A, IB1 = 2.2 A, LB = 1.5 µH) tds — 350 — ns Output Capacitance (VCE = 10 Vdc, IE = 0, ftest = 100 kHz) Cob — 180 350 pF fT — 2.75 — MHz Emitter–Base Turn–Off Energy (EB(avalanche) = 500 ns, RBE = 22 Ω) EB(off) — 35 — µJ Collector–Heatsink Capacitance — MJF16212 Isolated Package (Mounted on a 1″ x 2″ x 1/16″ Copper Heatsink, VCE = 0, ftest = 100 kHz) Cc–hs — 5.0 — pF OFF CHARACTERISTICS (2) ON CHARACTERISTICS (2) DC Current Gain (IC = 1.0 A, VCE = 5.0 Vdc) DC Current Gain (IC = 10 A, VCE = 5.0 Vdc) DYNAMIC CHARACTERISTICS Gain Bandwidth Product (VCE = 10 Vdc, IC = 0.5 A, ftest = 1.0 MHz) SWITCHING CHARACTERISTICS Inductive Load (IC = 5.5 A, IB = 2.2 A), High Resolution Deflection Simulator Circuit Table 2 Storage Fall Time (2) Pulse Test: Pulse Width = 300 µs, Duty Cycle ns tsv tfi — — 2000 200 4000 350 2.0%. 100 50 18 20 10 µs 10 5 2 1 0.5 DC BONDING WIRE LIMIT THERMAL LIMIT SECOND BREAKDOWN TJ = 25°C 1 2 3 5 7 10 20 30 50 70 100 200 300 500 700 1K VCE, COLLECTOR–EMITTER VOLTAGE (V) Figure 1. Maximum Forward Bias Safe Operating Area 3–2 100 ns II 0.2 0.1 0.05 0.02 0.01 5 ms MJH16212 IC, COLLECTOR CURRENT (A) IC, COLLECTOR–EMITTER CURRENT (A) SAFE OPERATING AREA IC/IB = 5 TJ ≤ 100°C 14 10 6 2 0 300 600 900 1200 1500 VCE, COLLECTOR–EMITTER VOLTAGE (V) Figure 2. Maximum Reverse Bias Safe Operating Area Motorola Bipolar Power Transistor Device Data MJW16212 SAFE OPERATING AREA (continued) FORWARD BIAS 1 POWER DERATING FACTOR There are two limitations on the power handling ability of a transistor: average junction temperature and second breakdown. Safe operating area curves indicate IC – VCE limits of the transistor that must be observed for reliable operation; i.e., the transistor must not be subjected to greater dissipation than the curves indicate. The data of Figure 1 is based on TC = 25_C; T J(pk) is variable depending on power level. Second breakdown pulse limits are valid for duty cycles to 10% but must be derated when TC ≥ 25_C. Second breakdown limitations do not derate the same as thermal limitations. Allowable current at the voltages shown on Figure 1 may be found at any case temperature by using the appropriate curve on Figure 3. At high case temperatures, thermal limitations will reduce the power that can be handled to values less than the limitations imposed by second breakdown. SECOND BREAKDOWN DERATING 0.8 0.6 THERMAL DERATING 0.4 0.2 0 45 25 85 65 125 105 TC, CASE TEMPERATURE (°C) Figure 3. Power Derating REVERSE BIAS RC snubbing, load line shaping, etc. The safe level for these devices is specified as Reverse Biased Safe Operating Area and represents the voltage– current condition allowable during reverse biased turnoff. This rating is verified under clamped conditions so that the device is never subjected to an avalanche mode. Figure 2 gives the RBSOA characteristics. For inductive loads, high voltage and high current must be sustained simultaneously during turn–off, in most cases, with the base–to–emitter junction reverse biased. Under these conditions the collector voltage must be held to a safe level at or below a specific value of collector current. This can be accomplished by several means such as active clamping, Table 1. RBSOA/V(BR)CEO(SUS) Test Circuit 0.02 µF H.P. 214 OR EQUIV. P.G. 100 + V ≈ 11 V 2N6191 + 0 – 20 10 µF RB1 ≈ – 35 V A RB2 0.02 µF + – 50 2N5337 1 µF 500 100 T1 –V IC(pk) +V IC 0V *IC –V VCE(pk) L T1 (ICpk) [ LcoilVCC T1 adjusted to obtain IC(pk) T.U.T. A VCE MR856 50 *IB Vclamp IB1 VCC IB V(BR)CEO L = 10 mH RB2 = ∞ VCC = 20 Volts *Tektronix *P–6042 or *Equivalent Motorola Bipolar Power Transistor Device Data RBSOA L = 200 µH RB2 = 0 VCC = 20 Volts RB1 selected for desired IB1 IB2 Note: Adjust – V to obtain desired VBE(off) at Point A. 3–3 1 0.7 0.5 0.3 0.2 IC = 2 4 5.5 8 10 A TJ = 25°C 0.1 0.07 0.05 0.03 0.02 0.01 .01 .02 .03 .05 0.1 0.2 0.3 0.5 1 VCE , COLLECTOR–EMITTER VOLTAGE (V) VBE, BASE–EMITTER VOLTAGE (V) 10 7 5 3 2 IC/IB = 5 TJ = 100°C 3 2 = 25°C 1 0.7 0.5 IC/IB = 10 TJ = 100°C 0.3 0.2 = 25°C 0.2 0.3 0.5 0.7 1 2 3 IB, BASE CURRENT (A) IC, COLLECTOR CURRENT (A) Figure 4. Typical Collector–Emitter Saturation Region Figure 5. Typical Emitter–Base Saturation Voltage 5 7 IC/IB = 10 TJ = 100°C 3 2 = 25°C 1 0.7 0.5 IC/IB = 5 TJ = 100°C 0.3 = 25°C 0.2 0.2 0.3 4 VCE = 10 V f(test) = 1 MHz TC = 25°C 3 2 1 0 0.5 0.7 1 2 3 5 7 10 0 1 2 3 4 5 IC, COLLECTOR CURRENT (A) IC, COLLECTOR CURRENT (A) Figure 6. Typical Collector–Emitter Saturation Voltage Figure 7. Typical Transition Frequency C, CAPACITANCE (pF) 10000 5000 Cib 2000 1000 500 200 100 50 20 ftest = 1 MHz Cob 10 5 2 1 1 2 3 5 7 10 20 30 50 70 100 200 300 500 1000 VR, REVERSE VOLTAGE (V) Figure 8. Typical Capacitance 3–4 10 5 10 7 5 0.1 0.1 10 7 5 0.1 0.1 2 3 5 7 10 f τ , TRANSITION FREQUENCY VCE , COLLECTOR–EMITTER VOLTAGE (V) MJW16212 Motorola Bipolar Power Transistor Device Data 6 MJW16212 DYNAMIC DESATURATIION The SCANSWITCH series of bipolar power transistors are specifically designed to meet the unique requirements of horizontal deflection circuits in computer monitor applications. Historically, deflection transistor design was focused on minimizing collector current fall time. While fall time is a valid figure of merit, a more important indicator of circuit performance as scan rates are increased is a new characteristic, “dynamic desaturation.” In order to assure a linear collector current ramp, the output transistor must remain in hard saturation during storage time and exhibit a rapid turn–off transition. A sluggish transition results in serious consequences. As the saturation voltage of the output transistor increases, + 24 V Table 2. High Resolution Deflection Application Simulator U2 MC7812 VI G VO N D + R7 2.7 k R8 9.1 k C5 0.1 R3 250 SYNC Q1 (DC) R6 1k 8 7 OSC 6 VCC % OUT 1 GND R10 47 (IC) R5 1k (IB) + R9 470 C4 0.005 R2 R510 Q2 MJ11016 + C2 10 µF Q5 MJ11016 R1 1k 6.2 V C3 10 µF C6 100 µF + LY 100 V R11 470 1W Q3 MJE 15031 T1 U1 MC1391P 2 R12 470 1W BS170 T1: Ferroxcube Pot Core #1811 P3C8 Primary/Sec. Turns Ratio = 18:6 Gapped for LP = 30 µH CY D2 MUR460 VCE LB Q4 DUT R4 22 D1 MUR110 LB = 1.5 µH CY = 0.01 µF LY = 13 µH IB1 = 1.3 A IB2 = 4.9 A VCE , COLLECTOR–EMITTER VOLTAGE (V) C1 100 µF IB, BASE CURRENT (A) the voltage across the yoke drops. Roll off in the collector current ramp results in improper beam deflection and distortion of the image at the right edge of the screen. Design changes have been made in the structure of the SCANSWITCH series of devices which minimize the dynamic desaturation interval. Dynamic desaturation has been defined in terms of the time required for the VCE to rise from 1.0 to 5.0 volts (Figures 9 and 10) and typical performance at optimized drive conditions has been specified. Optimization of device structure results in a linear collector current ramp, excellent turn–off switching performance, and significantly lower overall power dissipation. 5 DYNAMIC DESATURATION TIME IS MEASURED FROM VCE = 1 V TO VCE = 5 V 4 3 2 1 tds 0 0 2 4 6 8 TIME (2 µs/DIV) TIME (ns) Figure 9. Deflection Simulator Circuit Base Drive Waveform Figure 10. Definition of Dynamic Desaturation Measurement Motorola Bipolar Power Transistor Device Data 10 3–5 15 1500 tf , RESISTIVE FALL TIME ( µs) ts , RESISTIVE STORAGE TIME ( µs) MJW16212 10 7 5 IB2 = IB1 3 βf = 5 TJ = 25°C 2 IB2 = 2 (IB1) 1 1 2 10 3 5 7 IC, COLLECTOR CURRENT (A) 1000 700 300 IB2 = 2 (IB1) 200 100 15 IB2 = IB1 500 βf = 5 TJ = 25°C 1 2 Figure 11. Typical Resistive Storage Time 3 5 7 10 IC, COLLECTOR CURRENT (A) 15 Figure 12. Typical Resistive Fall Time Table 3. Resistive Load Switching +15 ts and tf 1 µF 150 Ω 100 µF 100 Ω MTP8P10 V(off) adjusted to give specified off drive MTP8P10 RB1 MPF930 A +10 V MPF930 RB2 50 Ω VCC MUR105 MTP12N10 250 V RL 28 Ω IC 5.5 A IB1 1.1 A IB2 Per Spec RB1 3.3 Ω RB2 Per Spec MJE210 500 µF 1 µF 150 Ω Voff T.U.T. A *IC *IB RL VCC r(t), TRANSIENT THERMAL RESISTANCE (NORMALIZED) 1 0.5 0.2 0.1 D = 0.5 0.2 RθJC(t) = r(t) RθJC RθJC = 0.7°C/W MAX D CURVES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT t1 TJ(pk) – TC = P(pk) RθJC(t) 0.1 0.05 SINGLE PULSE 0.01 0.1 1 100 10 P(pk) t1 t2 DUTY CYCLE, D = t1/t2 1000 10000 t, TIME (ms) Figure 13. Thermal Response 3–6 Motorola Bipolar Power Transistor Device Data MJW16212 EMITTER–BASE TURN–OFF ENERGY, EB(off) Emitter–base turn–off energy is a new specification included on the SCANSWITCH data sheets. Typical techniques for driving horizontal outputs rely on a pulse transformer to supply forward base current, and a turnoff network that includes a series base inductor to limit the rate of transition from forward to reverse. An alternate drive scheme has been used to characterize the SCANSWITCH series of devices (see Figure 2). This circuit ramps the base drive to eliminate the heavy overdrive at the beginning of the collector current ramp and underdrive just prior to turn–off observed in typical drive topologies. This high performance drive has two additional important advantages. First, the configuration of T1 allows Lb to be placed outside the path of forward base current making it unnecessary to expend energy to reverse the current flow as in a series based inductor. Second, there is no base resistor to limit forward base current and hence no power loss associated with setting the value of the forward base current. The ramp generating process stores rather than dissipates energy. Tailoring the amount of energy stored in T1 to the amount of energy, EB (off), that is required to turn the output transistor off results in essentially lossless operation. [Note: B+ and the primary inductance of T1 (LP) are chosen such that 1/2LPlb2 = EB(off).] TEST CONDITIONS FOR ISOLATION TESTS* (MJF16212 ONLY) MOUNTED FULLY ISOLATED PACKAGE MOUNTED FULLY ISOLATED PACKAGE LEADS 0.099” MIN LEADS HEATSINK HEATSINK 0.110” MIN Figure 14. Screw or Clip Mounting Position for Isolation Test Number 1 Figure 15. Screw or Clip Mounting Position for Isolation Test Number 2 * Measurement made between leads and heatsink with all leads shorted together MOUNTING INFORMATION** (MJF16212 ONLY) 4–40 SCREW CLIP PLAIN WASHER HEATSINK COMPRESSION WASHER HEATSINK NUT Figure 16a. Screw–Mounted Figure 16b. Clip–Mounted Figure 16. Typical Mounting Techniques* Laboratory tests on a limited number of samples indicate, when using the screw and compression washer mounting technique, a screw torque of 6 to 8 in . lbs is sufficient to provide maximum power dissipation capability. The compression washer helps to maintain a constant pressure on the package over time and during large temperature excursions. Destructive laboratory tests show that using a hex head 4-40 screw, without washers, and applying a torque in excess of 20 in . lbs will cause the plastic to crack around the mounting hole, resulting in a loss of isolation capability. Additional tests on slotted 4-40 screws indicate that the screw slot fails between 15 to 20 in . lbs without adversely affecting the package. However, in order to positively ensure the package integrity of the fully isolated device, Motorola does not recommend exceeding 10 in . lbs of mounting torque under any mounting conditions. ** For more information about mounting power semiconductors see Application Note AN1040. Motorola Bipolar Power Transistor Device Data 3–7 MJW16212 PACKAGE DIMENSIONS 0.25 (0.010) M –T– –Q– T B M E –B– C 4 L U A R 1 K 2 3 –Y– P V H F G D 0.25 (0.010) M Y Q J NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. DIM A B C D E F G H J K L P Q R U V MILLIMETERS MIN MAX 19.7 20.3 15.3 15.9 4.7 5.3 1.0 1.4 1.27 REF 2.0 2.4 5.5 BSC 2.2 2.6 0.4 0.8 14.2 14.8 5.5 NOM 3.7 4.3 3.55 3.65 5.0 NOM 5.5 BSC 3.0 3.4 INCHES MIN MAX 0.776 0.799 0.602 0.626 0.185 0.209 0.039 0.055 0.050 REF 0.079 0.094 0.216 BSC 0.087 0.102 0.016 0.031 0.559 0.583 0.217 NOM 0.146 0.169 0.140 0.144 0.197 NOM 0.217 BSC 0.118 0.134 S STYLE 3: PIN 1. 2. 3. 4. BASE COLLECTOR EMITTER COLLECTOR CASE 340K–01 ISSUE O Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of others. 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How to reach us: USA / EUROPE / Locations Not Listed: Motorola Literature Distribution; P.O. Box 20912; Phoenix, Arizona 85036. 1–800–441–2447 or 602–303–5454 JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, 6F Seibu–Butsuryu–Center, 3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 03–81–3521–8315 MFAX: [email protected] – TOUCHTONE 602–244–6609 INTERNET: http://Design–NET.com ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298 3–8 ◊ *MJW16212/D* Motorola Bipolar Power Transistor Device Data MJW16212/D